Commit 335aa752 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Simplify snps/c10x DPLL state checker calling convetion

Passing in the atomic state + crtc state is a bit weird. The latter
can be just the crtc (which is the normal calling convention used
in a lot of other places).
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231004155607.7719-9-ville.syrjala@linux.intel.comReviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent c788479a
...@@ -3005,12 +3005,13 @@ intel_mtl_port_pll_type(struct intel_encoder *encoder, ...@@ -3005,12 +3005,13 @@ intel_mtl_port_pll_type(struct intel_encoder *encoder,
} }
void intel_c10pll_state_verify(struct intel_atomic_state *state, void intel_c10pll_state_verify(struct intel_atomic_state *state,
const struct intel_crtc_state *new_crtc_state) struct intel_crtc *crtc)
{ {
struct drm_i915_private *i915 = to_i915(state->base.dev); struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_c10pll_state mpllb_hw_state = { 0 }; struct intel_c10pll_state mpllb_hw_state = { 0 };
const struct intel_c10pll_state *mpllb_sw_state = &new_crtc_state->cx0pll_state.c10; const struct intel_c10pll_state *mpllb_sw_state = &new_crtc_state->cx0pll_state.c10;
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
struct intel_encoder *encoder; struct intel_encoder *encoder;
enum phy phy; enum phy phy;
int i; int i;
......
...@@ -16,6 +16,7 @@ struct drm_i915_private; ...@@ -16,6 +16,7 @@ struct drm_i915_private;
struct intel_atomic_state; struct intel_atomic_state;
struct intel_c10pll_state; struct intel_c10pll_state;
struct intel_c20pll_state; struct intel_c20pll_state;
struct intel_crtc;
struct intel_crtc_state; struct intel_crtc_state;
struct intel_encoder; struct intel_encoder;
struct intel_hdmi; struct intel_hdmi;
...@@ -34,7 +35,7 @@ void intel_c10pll_dump_hw_state(struct drm_i915_private *dev_priv, ...@@ -34,7 +35,7 @@ void intel_c10pll_dump_hw_state(struct drm_i915_private *dev_priv,
int intel_c10pll_calc_port_clock(struct intel_encoder *encoder, int intel_c10pll_calc_port_clock(struct intel_encoder *encoder,
const struct intel_c10pll_state *pll_state); const struct intel_c10pll_state *pll_state);
void intel_c10pll_state_verify(struct intel_atomic_state *state, void intel_c10pll_state_verify(struct intel_atomic_state *state,
const struct intel_crtc_state *new_crtc_state); struct intel_crtc *crtc);
void intel_c20pll_readout_hw_state(struct intel_encoder *encoder, void intel_c20pll_readout_hw_state(struct intel_encoder *encoder,
struct intel_c20pll_state *pll_state); struct intel_c20pll_state *pll_state);
void intel_c20pll_dump_hw_state(struct drm_i915_private *i915, void intel_c20pll_dump_hw_state(struct drm_i915_private *i915,
......
...@@ -237,8 +237,8 @@ void intel_modeset_verify_crtc(struct intel_crtc *crtc, ...@@ -237,8 +237,8 @@ void intel_modeset_verify_crtc(struct intel_crtc *crtc,
verify_connector_state(state, crtc); verify_connector_state(state, crtc);
verify_crtc_state(state, crtc); verify_crtc_state(state, crtc);
intel_shared_dpll_state_verify(state, crtc); intel_shared_dpll_state_verify(state, crtc);
intel_mpllb_state_verify(state, new_crtc_state); intel_mpllb_state_verify(state, crtc);
intel_c10pll_state_verify(state, new_crtc_state); intel_c10pll_state_verify(state, crtc);
} }
void intel_modeset_verify_disabled(struct drm_i915_private *dev_priv, void intel_modeset_verify_disabled(struct drm_i915_private *dev_priv,
......
...@@ -1993,12 +1993,13 @@ int intel_snps_phy_check_hdmi_link_rate(int clock) ...@@ -1993,12 +1993,13 @@ int intel_snps_phy_check_hdmi_link_rate(int clock)
} }
void intel_mpllb_state_verify(struct intel_atomic_state *state, void intel_mpllb_state_verify(struct intel_atomic_state *state,
const struct intel_crtc_state *new_crtc_state) struct intel_crtc *crtc)
{ {
struct drm_i915_private *i915 = to_i915(state->base.dev); struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_mpllb_state mpllb_hw_state = { 0 }; struct intel_mpllb_state mpllb_hw_state = { 0 };
const struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->mpllb_state; const struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->mpllb_state;
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
struct intel_encoder *encoder; struct intel_encoder *encoder;
if (!IS_DG2(i915)) if (!IS_DG2(i915))
......
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
struct drm_i915_private; struct drm_i915_private;
struct intel_atomic_state; struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state; struct intel_crtc_state;
struct intel_encoder; struct intel_encoder;
struct intel_mpllb_state; struct intel_mpllb_state;
...@@ -33,6 +34,6 @@ int intel_snps_phy_check_hdmi_link_rate(int clock); ...@@ -33,6 +34,6 @@ int intel_snps_phy_check_hdmi_link_rate(int clock);
void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder, void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state); const struct intel_crtc_state *crtc_state);
void intel_mpllb_state_verify(struct intel_atomic_state *state, void intel_mpllb_state_verify(struct intel_atomic_state *state,
const struct intel_crtc_state *new_crtc_state); struct intel_crtc *crtc);
#endif /* __INTEL_SNPS_PHY_H__ */ #endif /* __INTEL_SNPS_PHY_H__ */
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