Commit 336a8b22 authored by Linus Torvalds's avatar Linus Torvalds

Merge http://lia64.bkbits.net/to-linus-2.5

into laptop.osdl.org:/home/torvalds/v2.5/linux
parents 09095b63 9a9bfbcf
......@@ -413,6 +413,16 @@ config IA64_PALINFO
To use this option, you have to ensure that the "/proc file system
support" (CONFIG_PROC_FS) is enabled, too.
config IA64_SALINFO
tristate "/proc/sal support"
help
The /proc/sal directory exports the SAL (system abstraction layer)
feature bits, like whether the platform is subject to ITC drift. It
is intended to be used by user programs that care about such things.
To use this option, you have to ensure that the "/proc file system
support" (CONFIG_PROC_FS) is enabled, too.
config EFI_VARS
tristate "/proc/efi/vars support"
help
......@@ -424,9 +434,15 @@ config EFI_VARS
support" (CONFIG_PROC_FS) is enabled, too.
config NR_CPUS
int "Maximum number of CPUs (2-64)"
int "Maximum number of CPUs"
depends on SMP
default "64"
help
You should set this to the number of CPUs in your system, but
keep in mind that a kernel compiled for, e.g., 2 CPUs will boot but
only use 2 CPUs on a >2 CPU system. Setting this to a value larger
than 64 will cause the use of a CPU mask array, causing a small
performance hit.
source "fs/Kconfig.binfmt"
......
......@@ -54,6 +54,11 @@
*/
#define ALLOW_IOV_BYPASS
#ifdef CONFIG_PROC_FS
/* turn it off for now; without per-CPU counters, it's too much of a scalability bottleneck: */
# define SBA_PROC_FS 0
#endif
/*
** If a device prefetches beyond the end of a valid pdir entry, it will cause
** a hard failure, ie. MCA. Version 3.0 and later of the zx1 LBA should
......@@ -193,7 +198,7 @@ struct ioc {
} saved[DELAYED_RESOURCE_CNT];
#endif
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
#define SBA_SEARCH_SAMPLE 0x100
unsigned long avg_search[SBA_SEARCH_SAMPLE];
unsigned long avg_idx; /* current index into avg_search */
......@@ -517,7 +522,7 @@ static int
sba_alloc_range(struct ioc *ioc, size_t size)
{
unsigned int pages_needed = size >> IOVP_SHIFT;
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
unsigned long itc_start = ia64_get_itc();
#endif
unsigned long pide;
......@@ -551,7 +556,7 @@ sba_alloc_range(struct ioc *ioc, size_t size)
(uint) ((unsigned long) ioc->res_hint - (unsigned long) ioc->res_map),
ioc->res_bitshift );
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
{
unsigned long itc_end = ia64_get_itc();
unsigned long tmp = itc_end - itc_start;
......@@ -593,7 +598,7 @@ sba_free_range(struct ioc *ioc, dma_addr_t iova, size_t size)
__FUNCTION__, (uint) iova, size,
bits_not_wanted, m, pide, res_ptr, *res_ptr);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->used_pages -= bits_not_wanted;
#endif
......@@ -785,7 +790,7 @@ sba_map_single(struct device *dev, void *addr, size_t size, int dir)
** Device is bit capable of DMA'ing to the buffer...
** just return the PCI address of ptr
*/
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
spin_lock_irqsave(&ioc->res_lock, flags);
ioc->msingle_bypass++;
spin_unlock_irqrestore(&ioc->res_lock, flags);
......@@ -811,7 +816,7 @@ sba_map_single(struct device *dev, void *addr, size_t size, int dir)
panic("Sanity check failed");
#endif
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->msingle_calls++;
ioc->msingle_pages += size >> IOVP_SHIFT;
#endif
......@@ -870,7 +875,7 @@ void sba_unmap_single(struct device *dev, dma_addr_t iova, size_t size, int dir)
/*
** Address does not fall w/in IOVA, must be bypassing
*/
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
spin_lock_irqsave(&ioc->res_lock, flags);
ioc->usingle_bypass++;
spin_unlock_irqrestore(&ioc->res_lock, flags);
......@@ -895,7 +900,7 @@ void sba_unmap_single(struct device *dev, dma_addr_t iova, size_t size, int dir)
size = ROUNDUP(size, IOVP_SIZE);
spin_lock_irqsave(&ioc->res_lock, flags);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->usingle_calls++;
ioc->usingle_pages += size >> IOVP_SHIFT;
#endif
......@@ -957,15 +962,15 @@ void sba_unmap_single(struct device *dev, dma_addr_t iova, size_t size, int dir)
/**
* sba_alloc_consistent - allocate/map shared mem for DMA
* @hwdev: instance of PCI owned by the driver that's asking.
* sba_alloc_coherent - allocate/map shared mem for DMA
* @dev: instance of PCI owned by the driver that's asking.
* @size: number of bytes mapped in driver buffer.
* @dma_handle: IOVA of new buffer.
*
* See Documentation/DMA-mapping.txt
*/
void *
sba_alloc_coherent (struct device *hwdev, size_t size, dma_addr_t *dma_handle, int flags)
sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, int flags)
{
struct ioc *ioc;
void *addr;
......@@ -978,7 +983,7 @@ sba_alloc_coherent (struct device *hwdev, size_t size, dma_addr_t *dma_handle, i
* REVISIT: if sba_map_single starts needing more than dma_mask from the
* device, this needs to be updated.
*/
ioc = GET_IOC(hwdev);
ioc = GET_IOC(dev);
ASSERT(ioc);
*dma_handle = sba_map_single(&ioc->sac_only_dev->dev, addr, size, 0);
......@@ -988,17 +993,17 @@ sba_alloc_coherent (struct device *hwdev, size_t size, dma_addr_t *dma_handle, i
/**
* sba_free_consistent - free/unmap shared mem for DMA
* @hwdev: instance of PCI owned by the driver that's asking.
* sba_free_coherent - free/unmap shared mem for DMA
* @dev: instance of PCI owned by the driver that's asking.
* @size: number of bytes mapped in driver buffer.
* @vaddr: virtual address IOVA of "consistent" buffer.
* @dma_handler: IO virtual address of "consistent" buffer.
*
* See Documentation/DMA-mapping.txt
*/
void sba_free_coherent (struct device *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle)
void sba_free_coherent (struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle)
{
sba_unmap_single(hwdev, dma_handle, size, 0);
sba_unmap_single(dev, dma_handle, size, 0);
free_pages((unsigned long) vaddr, get_order(size));
}
......@@ -1078,7 +1083,7 @@ sba_fill_pdir(
cnt += dma_offset;
dma_offset=0; /* only want offset on first chunk */
cnt = ROUNDUP(cnt, IOVP_SIZE);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->msg_pages += cnt >> IOVP_SHIFT;
#endif
do {
......@@ -1268,7 +1273,7 @@ int sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, int di
sg->dma_length = sg->length;
sg->dma_address = virt_to_phys(sba_sg_address(sg));
}
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
spin_lock_irqsave(&ioc->res_lock, flags);
ioc->msg_bypass++;
spin_unlock_irqrestore(&ioc->res_lock, flags);
......@@ -1281,7 +1286,7 @@ int sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, int di
sglist->dma_length = sglist->length;
sglist->dma_address = sba_map_single(dev, sba_sg_address(sglist), sglist->length,
dir);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
/*
** Should probably do some stats counting, but trying to
** be precise quickly starts wasting CPU time.
......@@ -1300,7 +1305,7 @@ int sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, int di
}
#endif
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->msg_calls++;
#endif
......@@ -1363,7 +1368,7 @@ void sba_unmap_sg (struct device *dev, struct scatterlist *sglist, int nents, in
ioc = GET_IOC(dev);
ASSERT(ioc);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc->usg_calls++;
#endif
......@@ -1376,7 +1381,7 @@ void sba_unmap_sg (struct device *dev, struct scatterlist *sglist, int nents, in
while (nents && sglist->dma_length) {
sba_unmap_single(dev, sglist->dma_address, sglist->dma_length, dir);
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
/*
** This leaves inconsistent data in the stats, but we can't
** tell which sg lists were mapped by map_single and which
......@@ -1704,7 +1709,7 @@ ioc_init(u64 hpa, void *handle)
**
**************************************************************************/
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
static void *
ioc_start(struct seq_file *s, loff_t *pos)
{
......@@ -1859,7 +1864,7 @@ ioc_proc_init(void)
}
#endif
void
static void
sba_connect_bus(struct pci_bus *bus)
{
acpi_handle handle, parent;
......@@ -1867,7 +1872,7 @@ sba_connect_bus(struct pci_bus *bus)
struct ioc *ioc;
if (!PCI_CONTROLLER(bus))
panic(PFX "no sysdata on bus %d!\n",bus->number);
panic(PFX "no sysdata on bus %d!\n", bus->number);
if (PCI_CONTROLLER(bus)->iommu)
return;
......@@ -1950,7 +1955,7 @@ sba_init(void)
}
#endif
#ifdef CONFIG_PROC_FS
#if SBA_PROC_FS
ioc_proc_init();
#endif
return 0;
......
......@@ -76,6 +76,7 @@
#define OFFSET4K(a) ((a) & 0xfff)
#define PAGE_START(addr) ((addr) & PAGE_MASK)
#define MINSIGSTKSZ_IA32 2048
#define high2lowuid(uid) ((uid) > 65535 ? 65534 : (uid))
#define high2lowgid(gid) ((gid) > 65535 ? 65534 : (gid))
......@@ -2262,10 +2263,18 @@ sys32_sigaltstack (ia32_stack_t *uss32, ia32_stack_t *uoss32,
return -EFAULT;
uss.ss_sp = (void *) (long) buf32.ss_sp;
uss.ss_flags = buf32.ss_flags;
uss.ss_size = buf32.ss_size;
/* MINSIGSTKSZ is different for ia32 vs ia64. We lie here to pass the
check and set it to the user requested value later */
if (buf32.ss_size < MINSIGSTKSZ_IA32) {
ret = -ENOMEM;
goto out;
}
uss.ss_size = MINSIGSTKSZ;
set_fs(KERNEL_DS);
ret = do_sigaltstack(uss32 ? &uss : NULL, &uoss, pt->r12);
current->sas_ss_size = buf32.ss_size;
set_fs(old_fs);
out:
if (ret < 0)
return(ret);
if (uoss32) {
......
......@@ -14,6 +14,7 @@ obj-$(CONFIG_IA64_GENERIC) += acpi-ext.o
obj-$(CONFIG_IA64_HP_ZX1) += acpi-ext.o
obj-$(CONFIG_IA64_MCA) += mca.o mca_asm.o
obj-$(CONFIG_IA64_PALINFO) += palinfo.o
obj-$(CONFIG_IA64_SALINFO) += salinfo.o
obj-$(CONFIG_IOSAPIC) += iosapic.o
obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_SMP) += smp.o smpboot.o
......
......@@ -331,7 +331,7 @@ acpi_parse_madt (unsigned long phys_addr, unsigned long size)
#ifdef CONFIG_ACPI_NUMA
#define SLIT_DEBUG
#undef SLIT_DEBUG
#define PXM_FLAG_LEN ((MAX_PXM_DOMAINS + 1)/32)
......
......@@ -446,10 +446,12 @@ efi_map_pal_code (void)
panic("Woah! PAL code size bigger than a granule!");
mask = ~((1 << IA64_GRANULE_SHIFT) - 1);
#if EFI_DEBUG
printk(KERN_INFO "CPU %d: mapping PAL code [0x%lx-0x%lx) into [0x%lx-0x%lx)\n",
smp_processor_id(), md->phys_addr,
md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT),
vaddr & mask, (vaddr & mask) + IA64_GRANULE_SIZE);
#endif
/*
* Cannot write to CRx with PSR.ic=1
......
......@@ -1193,7 +1193,7 @@ static void
ia64_mca_cmc_poll (unsigned long dummy)
{
/* Trigger a CMC interrupt cascade */
platform_send_ipi(__ffs(cpu_online_map), IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
platform_send_ipi(first_cpu(cpu_online_map), IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
}
/*
......@@ -1260,7 +1260,7 @@ static void
ia64_mca_cpe_poll (unsigned long dummy)
{
/* Trigger a CPE interrupt cascade */
platform_send_ipi(__ffs(cpu_online_map), IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
platform_send_ipi(first_cpu(cpu_online_map), IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
}
/*
......
......@@ -2905,7 +2905,7 @@ pfm_write_pmcs(pfm_context_t *ctx, void *arg, int count, struct pt_regs *regs)
* - system-wide session: PMCx.pm=1 (privileged monitor)
* - per-task : PMCx.pm=0 (user monitor)
*/
if ((is_monitor || is_counting) && value != PMC_DFL_VAL(i) && PFM_CHECK_PMC_PM(ctx, cnum, value)) {
if ((is_monitor || is_counting) && value != PMC_DFL_VAL(cnum) && PFM_CHECK_PMC_PM(ctx, cnum, value)) {
DPRINT(("pmc%u pmc_pm=%ld fl_system=%d\n",
cnum,
PMC_PM(cnum, value),
......
......@@ -5,6 +5,7 @@
*
* Copyright (c) 2001 Silicon Graphics, Inc. All rights reserved.
*
* 09/11/2003 jbarnes@sgi.com updated for 2.6
* 10/30/2001 jbarnes@sgi.com copied much of Stephane's palinfo
* code to create this file
*/
......@@ -59,7 +60,7 @@ salinfo_init(void)
*sdir = create_proc_read_entry (salinfo_entries[i].name, 0, salinfo_dir,
salinfo_read, (void *)salinfo_entries[i].feature);
if (*sdir)
*sdir->owner = THIS_MODULE;
(*sdir)->owner = THIS_MODULE;
sdir++;
}
*sdir++ = salinfo_dir;
......
......@@ -187,7 +187,7 @@ static inline void
ia64_do_profile (struct pt_regs * regs)
{
unsigned long ip, slot;
extern unsigned long prof_cpu_mask;
extern cpumask_t prof_cpu_mask;
profile_hook(regs);
......
......@@ -568,10 +568,10 @@ ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa,
}
siginfo.si_signo = SIGTRAP;
siginfo.si_errno = 0;
siginfo.si_flags = 0;
siginfo.si_isr = 0;
siginfo.si_addr = (void *) ifa;
siginfo.si_imm = 0;
siginfo.si_flags = __ISR_VALID;
siginfo.si_isr = isr;
force_sig_info(SIGTRAP, &siginfo, current);
return;
......
......@@ -1171,9 +1171,10 @@ desc_spill_sprel_p (unsigned char qp, unw_word t, unsigned char abreg, unw_word
static inline unw_hash_index_t
hash (unsigned long ip)
{
# define magic 0x9e3779b97f4a7c16 /* based on (sqrt(5)/2-1)*2^64 */
# define hashmagic 0x9e3779b97f4a7c16 /* based on (sqrt(5)/2-1)*2^64 */
return (ip >> 4)*magic >> (64 - UNW_LOG_HASH_SIZE);
return (ip >> 4)*hashmagic >> (64 - UNW_LOG_HASH_SIZE);
#undef hashmagic
}
static inline long
......
......@@ -6,13 +6,13 @@
* Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved.
*/
#include <linux/pci.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/delay.h>
#include <asm/sn/simulator.h>
#include <asm/sn/pda.h>
#include <asm/sn/sn_cpuid.h>
#include <asm/sn/sn2/shub_mmr.h>
/**
* sn_io_addr - convert an in/out port to an i/o address
......
......@@ -39,6 +39,7 @@
#include <asm/sn/sn2/shubio.h>
#include <asm/sal.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/sn2/shub_mmr.h>
extern irqpda_t *irqpdaindr;
extern cnodeid_t master_node_get(vertex_hdl_t vhdl);
......
......@@ -34,6 +34,8 @@
#include <asm/sal.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/sndrv.h>
#include <asm/sn/sn2/shubio.h>
#include <asm/sn/sn2/shub_mmr.h>
/*
* Shub WAR for Xbridge Little Endian problem:
......
......@@ -35,7 +35,6 @@
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/vmalloc.h>
#include <asm/current.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
......@@ -44,7 +43,6 @@
#include <asm/sn/sgi.h>
#include <asm/sn/iograph.h>
#include <asm/sn/invent.h>
#include <linux/devfs_fs_kernel.h>
#include <asm/sn/hcl.h>
#include <asm/sn/types.h>
#include <asm/sn/pci/bridge.h>
......@@ -62,6 +60,7 @@
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/bitops.h>
#include <asm/sn/sn2/shub_mmr.h>
int irq_to_bit_pos(int irq);
static void force_interrupt(int irq);
......
......@@ -30,6 +30,8 @@
#ifdef __KERNEL__
#include <asm/system.h>
#define COMPILER_DEPENDENT_INT64 long
#define COMPILER_DEPENDENT_UINT64 unsigned long
......
......@@ -23,7 +23,7 @@
#include <linux/cache.h>
extern volatile char cpu_to_node_map[NR_CPUS] __cacheline_aligned;
extern volatile unsigned long node_to_cpu_mask[NR_NODES] __cacheline_aligned;
extern volatile cpumask_t node_to_cpu_mask[NR_NODES] __cacheline_aligned;
/* Stuff below this line could be architecture independent */
......
......@@ -4,22 +4,10 @@
/*
* Fundamental kernel parameters.
*
* Copyright (C) 1998, 1999, 2002 Hewlett-Packard Co
* Copyright (C) 1998, 1999, 2002-2003 Hewlett-Packard Co
* David Mosberger-Tang <davidm@hpl.hp.com>
*/
#include <linux/config.h>
#ifdef CONFIG_IA64_HP_SIM
/*
* Yeah, simulating stuff is slow, so let us catch some breath between
* timer interrupts...
*/
# define HZ 32
#else
# define HZ 1024
#endif
#define EXEC_PAGESIZE 65536
#ifndef NGROUPS
......@@ -33,8 +21,24 @@
#define MAXHOSTNAMELEN 64 /* max length of hostname */
#ifdef __KERNEL__
# include <linux/config.h> /* mustn't include <linux/config.h> outside of #ifdef __KERNEL__ */
# ifdef CONFIG_IA64_HP_SIM
/*
* Yeah, simulating stuff is slow, so let us catch some breath between
* timer interrupts...
*/
# define HZ 32
# else
# define HZ 1024
# endif
# define USER_HZ HZ
# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */
#else
/*
* Technically, this is wrong, but some old apps still refer to it. The proper way to
* get the HZ value is via sysconf(_SC_CLK_TCK).
*/
# define HZ 1024
#endif
#endif /* _ASM_IA64_PARAM_H */
......@@ -9,9 +9,6 @@
#ifndef _ASM_SN_KSYS_ELSC_H
#define _ASM_SN_KSYS_ELSC_H
#include <linux/config.h>
#include <asm/sn/ksys/l1.h>
/*
* Error codes
*
......
......@@ -10,10 +10,7 @@
#ifndef _ASM_SN_KSYS_L1_H
#define _ASM_SN_KSYS_L1_H
#include <linux/config.h>
#include <asm/sn/vector.h>
#include <asm/sn/addrs.h>
#include <asm/atomic.h>
#include <asm/sn/types.h>
/* L1 Target Addresses */
/*
......@@ -39,18 +36,6 @@
#define L1_ADDR_TASK_BEDROCK 0x05 /* bedrock */
#define L1_ADDR_TASK_GENERAL 0x06 /* general requests */
#define L1_ADDR_LOCAL \
(L1_ADDR_TYPE_L1 << L1_ADDR_TYPE_SHFT) | \
(L1_ADDR_RACK_LOCAL << L1_ADDR_RACK_SHFT) | \
(L1_ADDR_BAY_LOCAL << L1_ADDR_BAY_SHFT)
#define L1_ADDR_LOCALIO \
(L1_ADDR_TYPE_IOBRICK << L1_ADDR_TYPE_SHFT) | \
(L1_ADDR_RACK_LOCAL << L1_ADDR_RACK_SHFT) | \
(L1_ADDR_BAY_LOCAL << L1_ADDR_BAY_SHFT)
#define L1_ADDR_LOCAL_SHFT L1_ADDR_BAY_SHFT
/* response argument types */
#define L1_ARG_INT 0x00 /* 4-byte integer (big-endian) */
#define L1_ARG_ASCII 0x01 /* null-terminated ASCII string */
......@@ -133,18 +118,6 @@
#define L1_EEP_IUSE 3 /* internal use area */
#define L1_EEP_SPD 4 /* serial presence detect record */
typedef uint32_t l1addr_t;
#define L1_BUILD_ADDR(addr,at,r,s,t) \
(*(l1addr_t *)(addr) = ((l1addr_t)(at) << L1_ADDR_TYPE_SHFT) | \
((l1addr_t)(r) << L1_ADDR_RACK_SHFT) | \
((l1addr_t)(s) << L1_ADDR_BAY_SHFT) | \
((l1addr_t)(t) << L1_ADDR_TASK_SHFT))
#define L1_ADDRESS_TO_TASK(addr,trb,tsk) \
(*(l1addr_t *)(addr) = (l1addr_t)(trb) | \
((l1addr_t)(tsk) << L1_ADDR_TASK_SHFT))
#define L1_DISPLAY_LINE_LENGTH 12 /* L1 display characters/line */
#ifdef L1_DISP_2LINES
......@@ -154,11 +127,9 @@ typedef uint32_t l1addr_t;
* to system software */
#endif
#define bzero(d, n) memset((d), 0, (n))
int elsc_display_line(nasid_t nasid, char *line, int lnum);
int iobrick_rack_bay_type_get( nasid_t nasid, uint *rack,
uint *bay, uint *brick_type );
int iobrick_rack_bay_type_get( nasid_t nasid, unsigned int *rack,
unsigned int *bay, unsigned int *brick_type );
int iobrick_module_get( nasid_t nasid );
......
......@@ -128,7 +128,7 @@ typedef struct irqpda_s irqpda_t;
* Check if given a compact node id the corresponding node has all the
* cpus disabled.
*/
#define is_headless_node(cnode) (!node_to_cpumask(cnode))
#define is_headless_node(cnode) (!any_online_cpu(node_to_cpumask(cnode)))
/*
* Check if given a node vertex handle the corresponding node has all the
......
......@@ -15,11 +15,9 @@
* should ever peek into this file.
*/
#include <linux/config.h>
#include <linux/pci.h>
#include <asm/sn/pci/pcibr.h>
#include <asm/sn/pci/pciio_private.h>
#include <asm/sn/ksys/l1.h>
/*
* convenience typedefs
......
This diff is collapsed.
......@@ -11,13 +11,6 @@
#ifndef _ASM_IA64_SN_SN2_SHUB_H
#define _ASM_IA64_SN_SN2_SHUB_H
#include <asm/sn/sn2/shub_mmr.h> /* shub mmr addresses and formats */
#include <asm/sn/sn2/shub_md.h>
#include <asm/sn/sn2/shubio.h>
#ifndef __ASSEMBLY__
#include <asm/sn/sn2/shub_mmr_t.h> /* shub mmr struct defines */
#endif
/*
* Junk Bus Address Space
* The junk bus is used to access the PROM, LED's, and UART. It's
......
This diff is collapsed.
......@@ -166,7 +166,7 @@ do { \
#define _raw_write_lock(l) \
({ \
__u64 ia64_val, ia64_set_val = ia64_dep_mi(-1, 0, 31, 1); \
__u32 ia64_write_lock_ptr = (__u32 *) (l); \
__u32 *ia64_write_lock_ptr = (__u32 *) (l); \
do { \
while (*ia64_write_lock_ptr) \
ia64_barrier(); \
......
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