Commit 33a176ab authored by Maciej W. Rozycki's avatar Maciej W. Rozycki Committed by Bjorn Helgaas

PCI: Export PCIe link retrain timeout

Convert LINK_RETRAIN_TIMEOUT from jiffies to milliseconds, accordingly
rename to PCIE_LINK_RETRAIN_TIMEOUT_MS, and make available via "pci.h" for
the PCI core to use.  Use in pcie_wait_for_link_delay().

Link: https://lore.kernel.org/r/alpine.DEB.2.21.2305310030280.59226@angie.orcam.me.ukSigned-off-by: default avatarMaciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 07a8d698
...@@ -4867,7 +4867,7 @@ static int pci_pm_reset(struct pci_dev *dev, bool probe) ...@@ -4867,7 +4867,7 @@ static int pci_pm_reset(struct pci_dev *dev, bool probe)
static bool pcie_wait_for_link_delay(struct pci_dev *pdev, bool active, static bool pcie_wait_for_link_delay(struct pci_dev *pdev, bool active,
int delay) int delay)
{ {
int timeout = 1000; int timeout = PCIE_LINK_RETRAIN_TIMEOUT_MS;
bool ret; bool ret;
u16 lnk_status; u16 lnk_status;
......
...@@ -11,6 +11,8 @@ ...@@ -11,6 +11,8 @@
#define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */ #define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */
#define PCIE_LINK_RETRAIN_TIMEOUT_MS 1000
extern const unsigned char pcie_link_speed[]; extern const unsigned char pcie_link_speed[];
extern bool pci_early_dump; extern bool pci_early_dump;
......
...@@ -90,8 +90,6 @@ static const char *policy_str[] = { ...@@ -90,8 +90,6 @@ static const char *policy_str[] = {
[POLICY_POWER_SUPERSAVE] = "powersupersave" [POLICY_POWER_SUPERSAVE] = "powersupersave"
}; };
#define LINK_RETRAIN_TIMEOUT HZ
/* /*
* The L1 PM substate capability is only implemented in function 0 in a * The L1 PM substate capability is only implemented in function 0 in a
* multi function device. * multi function device.
...@@ -198,14 +196,14 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist) ...@@ -198,14 +196,14 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
* @pdev: Device whose link to wait for. * @pdev: Device whose link to wait for.
* *
* Return TRUE if successful, or FALSE if training has not completed * Return TRUE if successful, or FALSE if training has not completed
* within LINK_RETRAIN_TIMEOUT jiffies. * within PCIE_LINK_RETRAIN_TIMEOUT_MS milliseconds.
*/ */
static bool pcie_wait_for_link_status(struct pci_dev *pdev) static bool pcie_wait_for_link_status(struct pci_dev *pdev)
{ {
unsigned long end_jiffies; unsigned long end_jiffies;
u16 lnksta; u16 lnksta;
end_jiffies = jiffies + LINK_RETRAIN_TIMEOUT; end_jiffies = jiffies + msecs_to_jiffies(PCIE_LINK_RETRAIN_TIMEOUT_MS);
do { do {
pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnksta); pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnksta);
if (!(lnksta & PCI_EXP_LNKSTA_LT)) if (!(lnksta & PCI_EXP_LNKSTA_LT))
......
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