Commit 3410d424 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'renesas-dt-fixes-for-v3.18' of...

Merge tag 'renesas-dt-fixes-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Pull "Renesas ARM Based SoC DT Fixes for v3.18" from Simon Horman:

* Correct IIC0 parent clock on r8a7740
* Correct SD3CKCR address to device tree on r8a7790

* tag 'renesas-dt-fixes-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7740 dtsi: Correct IIC0 parent clock
  ARM: shmobile: r8a7790: Fix SD3CKCR address to device tree
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 1b6166e5 b89ff7c3
...@@ -433,7 +433,7 @@ mstp1_clks: mstp1_clks@e6150134 { ...@@ -433,7 +433,7 @@ mstp1_clks: mstp1_clks@e6150134 {
clocks = <&cpg_clocks R8A7740_CLK_S>, clocks = <&cpg_clocks R8A7740_CLK_S>,
<&cpg_clocks R8A7740_CLK_S>, <&sub_clk>, <&cpg_clocks R8A7740_CLK_S>, <&sub_clk>,
<&cpg_clocks R8A7740_CLK_B>, <&cpg_clocks R8A7740_CLK_B>,
<&sub_clk>, <&sub_clk>, <&cpg_clocks R8A7740_CLK_HPP>, <&sub_clk>,
<&cpg_clocks R8A7740_CLK_B>; <&cpg_clocks R8A7740_CLK_B>;
#clock-cells = <1>; #clock-cells = <1>;
renesas,clock-indices = < renesas,clock-indices = <
......
...@@ -666,9 +666,9 @@ sd2_clk: sd2_clk@e6150078 { ...@@ -666,9 +666,9 @@ sd2_clk: sd2_clk@e6150078 {
#clock-cells = <0>; #clock-cells = <0>;
clock-output-names = "sd2"; clock-output-names = "sd2";
}; };
sd3_clk: sd3_clk@e615007c { sd3_clk: sd3_clk@e615026c {
compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock"; compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615007c 0 4>; reg = <0 0xe615026c 0 4>;
clocks = <&pll1_div2_clk>; clocks = <&pll1_div2_clk>;
#clock-cells = <0>; #clock-cells = <0>;
clock-output-names = "sd3"; clock-output-names = "sd3";
......
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