Commit 36fb7b8a authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Geert Uytterhoeven

pinctrl: renesas: r8a779g0: Add missing MODSELx for TSN0

TSN0 needs MODSEL4 settings.
This patch adds missing MODSELx settings for the affected pins.
Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87letdsj8e.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent b811062e
...@@ -690,27 +690,30 @@ static const u16 pinmux_data[] = { ...@@ -690,27 +690,30 @@ static const u16 pinmux_data[] = {
PINMUX_SINGLE(AVS0), PINMUX_SINGLE(AVS0),
PINMUX_SINGLE(PCIE1_CLKREQ_N), PINMUX_SINGLE(PCIE1_CLKREQ_N),
PINMUX_SINGLE(PCIE0_CLKREQ_N), PINMUX_SINGLE(PCIE0_CLKREQ_N),
/* TSN0 without MODSEL4 */
PINMUX_SINGLE(TSN0_TXCREFCLK), PINMUX_SINGLE(TSN0_TXCREFCLK),
PINMUX_SINGLE(TSN0_TD2),
PINMUX_SINGLE(TSN0_TD3),
PINMUX_SINGLE(TSN0_RD2), PINMUX_SINGLE(TSN0_RD2),
PINMUX_SINGLE(TSN0_RD3), PINMUX_SINGLE(TSN0_RD3),
PINMUX_SINGLE(TSN0_TD0),
PINMUX_SINGLE(TSN0_TD1),
PINMUX_SINGLE(TSN0_RD1), PINMUX_SINGLE(TSN0_RD1),
PINMUX_SINGLE(TSN0_TXC),
PINMUX_SINGLE(TSN0_RXC), PINMUX_SINGLE(TSN0_RXC),
PINMUX_SINGLE(TSN0_RD0), PINMUX_SINGLE(TSN0_RD0),
PINMUX_SINGLE(TSN0_TX_CTL),
PINMUX_SINGLE(TSN0_AVTP_PPS0),
PINMUX_SINGLE(TSN0_RX_CTL), PINMUX_SINGLE(TSN0_RX_CTL),
PINMUX_SINGLE(TSN0_AVTP_CAPTURE), PINMUX_SINGLE(TSN0_AVTP_CAPTURE),
PINMUX_SINGLE(TSN0_AVTP_MATCH),
PINMUX_SINGLE(TSN0_LINK), PINMUX_SINGLE(TSN0_LINK),
PINMUX_SINGLE(TSN0_PHY_INT), PINMUX_SINGLE(TSN0_PHY_INT),
PINMUX_SINGLE(TSN0_AVTP_PPS1),
PINMUX_SINGLE(TSN0_MDC),
PINMUX_SINGLE(TSN0_MDIO), PINMUX_SINGLE(TSN0_MDIO),
/* TSN0 with MODSEL4 */
PINMUX_IPSR_NOGM(0, TSN0_TD2, SEL_TSN0_TD2_1),
PINMUX_IPSR_NOGM(0, TSN0_TD3, SEL_TSN0_TD3_1),
PINMUX_IPSR_NOGM(0, TSN0_TD0, SEL_TSN0_TD0_1),
PINMUX_IPSR_NOGM(0, TSN0_TD1, SEL_TSN0_TD1_1),
PINMUX_IPSR_NOGM(0, TSN0_TXC, SEL_TSN0_TXC_1),
PINMUX_IPSR_NOGM(0, TSN0_TX_CTL, SEL_TSN0_TX_CTL_1),
PINMUX_IPSR_NOGM(0, TSN0_AVTP_PPS0, SEL_TSN0_AVTP_PPS0_1),
PINMUX_IPSR_NOGM(0, TSN0_AVTP_MATCH, SEL_TSN0_AVTP_MATCH_1),
PINMUX_IPSR_NOGM(0, TSN0_AVTP_PPS1, SEL_TSN0_AVTP_PPS1_1),
PINMUX_IPSR_NOGM(0, TSN0_MDC, SEL_TSN0_MDC_1),
PINMUX_SINGLE(AVB2_RX_CTL), PINMUX_SINGLE(AVB2_RX_CTL),
PINMUX_SINGLE(AVB2_TX_CTL), PINMUX_SINGLE(AVB2_TX_CTL),
......
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