Commit 3bd4c902 authored by Maciej W. Rozycki's avatar Maciej W. Rozycki Committed by Ralf Baechle

Deal with the bloody KSEG vs CKSEG horror...

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 902d21d5
...@@ -144,7 +144,8 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker) ...@@ -144,7 +144,8 @@ static int dec_ecc_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
} else if (!sngl) { } else if (!sngl) {
status = dbestr; status = dbestr;
} else { } else {
volatile u32 *ptr = (void *)KSEG1ADDR(address); volatile u32 *ptr =
(void *)CKSEG1ADDR(address);
*ptr = *ptr; /* Rewrite. */ *ptr = *ptr; /* Rewrite. */
iob(); iob();
......
...@@ -35,22 +35,22 @@ static inline void pmax_setup_memory_region(void) ...@@ -35,22 +35,22 @@ static inline void pmax_setup_memory_region(void)
extern char genexcept_early; extern char genexcept_early;
/* Install exception handler */ /* Install exception handler */
memcpy(&old_handler, (void *)(KSEG0 + 0x80), 0x80); memcpy(&old_handler, (void *)(CKSEG0 + 0x80), 0x80);
memcpy((void *)(KSEG0 + 0x80), &genexcept_early, 0x80); memcpy((void *)(CKSEG0 + 0x80), &genexcept_early, 0x80);
/* read unmapped and uncached (KSEG1) /* read unmapped and uncached (KSEG1)
* DECstations have at least 4MB RAM * DECstations have at least 4MB RAM
* Assume less than 480MB of RAM, as this is max for 5000/2xx * Assume less than 480MB of RAM, as this is max for 5000/2xx
* FIXME this should be replaced by the first free page! * FIXME this should be replaced by the first free page!
*/ */
for (memory_page = (unsigned char *) KSEG1 + CHUNK_SIZE; for (memory_page = (unsigned char *)CKSEG1 + CHUNK_SIZE;
(mem_err== 0) && (memory_page < ((unsigned char *) KSEG1+0x1E000000)); mem_err == 0 && memory_page < (unsigned char *)CKSEG1 + 0x1e00000;
memory_page += CHUNK_SIZE) { memory_page += CHUNK_SIZE) {
dummy = *memory_page; dummy = *memory_page;
} }
memcpy((void *)(KSEG0 + 0x80), &old_handler, 0x80); memcpy((void *)(CKSEG0 + 0x80), &old_handler, 0x80);
add_memory_region(0, (unsigned long)memory_page - KSEG1 - CHUNK_SIZE, add_memory_region(0, (unsigned long)memory_page - CKSEG1 - CHUNK_SIZE,
BOOT_MEM_RAM); BOOT_MEM_RAM);
} }
...@@ -65,7 +65,7 @@ static inline void rex_setup_memory_region(void) ...@@ -65,7 +65,7 @@ static inline void rex_setup_memory_region(void)
memmap *bm; memmap *bm;
/* some free 64k */ /* some free 64k */
bm = (memmap *)KSEG0ADDR(0x28000); bm = (memmap *)CKSEG0ADDR(0x28000);
bitmap_size = rex_getbitmap(bm); bitmap_size = rex_getbitmap(bm);
......
...@@ -14,7 +14,7 @@ typedef void ATTRIB_NORET (* noret_func_t)(void); ...@@ -14,7 +14,7 @@ typedef void ATTRIB_NORET (* noret_func_t)(void);
static inline void ATTRIB_NORET back_to_prom(void) static inline void ATTRIB_NORET back_to_prom(void)
{ {
noret_func_t func = (void *) KSEG1ADDR(0x1fc00000); noret_func_t func = (void *)CKSEG1ADDR(0x1fc00000);
func(); func();
} }
......
...@@ -197,7 +197,7 @@ void __init tc_init(void) ...@@ -197,7 +197,7 @@ void __init tc_init(void)
} }
info = (tcinfo *) rex_gettcinfo(); info = (tcinfo *) rex_gettcinfo();
slot0addr = (unsigned long)KSEG1ADDR(rex_slot_address(0)); slot0addr = (unsigned long)CKSEG1ADDR(rex_slot_address(0));
switch (mips_machtype) { switch (mips_machtype) {
case MACH_DS5000_200: case MACH_DS5000_200:
...@@ -245,7 +245,6 @@ void __init tc_init(void) ...@@ -245,7 +245,6 @@ void __init tc_init(void)
tc_bus[i].name, tc_bus[i].firmware); tc_bus[i].name, tc_bus[i].firmware);
} }
#endif #endif
ioport_resource.end = KSEG2 - 1;
} }
} }
......
...@@ -1637,21 +1637,21 @@ static void __init probe_sccs(void) ...@@ -1637,21 +1637,21 @@ static void __init probe_sccs(void)
#ifdef CONFIG_MACH_DECSTATION #ifdef CONFIG_MACH_DECSTATION
case MACH_DS5000_2X0: case MACH_DS5000_2X0:
case MACH_DS5900: case MACH_DS5900:
system_base = KSEG1ADDR(0x1f800000); system_base = CKSEG1ADDR(0x1f800000);
n_chips = 2; n_chips = 2;
zs_parms = &ds_parms; zs_parms = &ds_parms;
zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0]; zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1]; zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1];
break; break;
case MACH_DS5000_1XX: case MACH_DS5000_1XX:
system_base = KSEG1ADDR(0x1c000000); system_base = CKSEG1ADDR(0x1c000000);
n_chips = 2; n_chips = 2;
zs_parms = &ds_parms; zs_parms = &ds_parms;
zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0]; zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1]; zs_parms->irq1 = dec_interrupt[DEC_IRQ_SCC1];
break; break;
case MACH_DS5000_XX: case MACH_DS5000_XX:
system_base = KSEG1ADDR(0x1c000000); system_base = CKSEG1ADDR(0x1c000000);
n_chips = 1; n_chips = 1;
zs_parms = &ds_parms; zs_parms = &ds_parms;
zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0]; zs_parms->irq0 = dec_interrupt[DEC_IRQ_SCC0];
......
...@@ -15,7 +15,7 @@ ...@@ -15,7 +15,7 @@
#include <asm/addrspace.h> #include <asm/addrspace.h>
#define KN01_SLOT_BASE KSEG1ADDR(0x10000000) #define KN01_SLOT_BASE CKSEG1ADDR(0x10000000)
#define KN01_SLOT_SIZE 0x01000000 #define KN01_SLOT_SIZE 0x01000000
/* /*
...@@ -51,7 +51,7 @@ ...@@ -51,7 +51,7 @@
/* /*
* Frame buffer memory address. * Frame buffer memory address.
*/ */
#define KN01_VFB_MEM KSEG1ADDR(0x0fc00000) #define KN01_VFB_MEM CKSEG1ADDR(0x0fc00000)
/* /*
* CPU interrupt bits. * CPU interrupt bits.
......
...@@ -22,7 +22,7 @@ ...@@ -22,7 +22,7 @@
#include <asm/dec/ecc.h> #include <asm/dec/ecc.h>
#define KN02_SLOT_BASE KSEG1ADDR(0x1fc00000) #define KN02_SLOT_BASE CKSEG1ADDR(0x1fc00000)
#define KN02_SLOT_SIZE 0x00080000 #define KN02_SLOT_SIZE 0x00080000
/* /*
......
...@@ -20,7 +20,7 @@ ...@@ -20,7 +20,7 @@
#include <asm/addrspace.h> #include <asm/addrspace.h>
#include <asm/dec/ioasic_addrs.h> #include <asm/dec/ioasic_addrs.h>
#define KN02XA_SLOT_BASE KSEG1ADDR(0x1c000000) #define KN02XA_SLOT_BASE CKSEG1ADDR(0x1c000000)
/* /*
* Some port addresses... * Some port addresses...
...@@ -32,16 +32,16 @@ ...@@ -32,16 +32,16 @@
/* /*
* Memory control ASIC registers. * Memory control ASIC registers.
*/ */
#define KN02XA_MER KSEG1ADDR(0x0c400000) /* memory error register */ #define KN02XA_MER CKSEG1ADDR(0x0c400000) /* memory error register */
#define KN02XA_MSR KSEG1ADDR(0x0c800000) /* memory size register */ #define KN02XA_MSR CKSEG1ADDR(0x0c800000) /* memory size register */
/* /*
* CPU control ASIC registers. * CPU control ASIC registers.
*/ */
#define KN02XA_MEM_CONF KSEG1ADDR(0x0e000000) /* write timeout config */ #define KN02XA_MEM_CONF CKSEG1ADDR(0x0e000000) /* write timeout config */
#define KN02XA_EAR KSEG1ADDR(0x0e000004) /* error address register */ #define KN02XA_EAR CKSEG1ADDR(0x0e000004) /* error address register */
#define KN02XA_BOOT0 KSEG1ADDR(0x0e000008) /* boot 0 register */ #define KN02XA_BOOT0 CKSEG1ADDR(0x0e000008) /* boot 0 register */
#define KN02XA_MEM_INTR KSEG1ADDR(0x0e00000c) /* write err IRQ stat & ack */ #define KN02XA_MEM_INTR CKSEG1ADDR(0x0e00000c) /* write err IRQ stat & ack */
/* /*
* Memory Error Register bits, common definitions. * Memory Error Register bits, common definitions.
......
...@@ -19,7 +19,7 @@ ...@@ -19,7 +19,7 @@
#include <asm/dec/ecc.h> #include <asm/dec/ecc.h>
#include <asm/dec/ioasic_addrs.h> #include <asm/dec/ioasic_addrs.h>
#define KN03_SLOT_BASE KSEG1ADDR(0x1f800000) #define KN03_SLOT_BASE CKSEG1ADDR(0x1f800000)
/* /*
* Some port addresses... * Some port addresses...
......
...@@ -24,7 +24,7 @@ ...@@ -24,7 +24,7 @@
* PMAX/3MAX PROM entry points for DS2100/3100's and DS5000/2xx's. * PMAX/3MAX PROM entry points for DS2100/3100's and DS5000/2xx's.
* Many of these will work for MIPSen as well! * Many of these will work for MIPSen as well!
*/ */
#define VEC_RESET (u64 *)KSEG1ADDR(0x1fc00000) #define VEC_RESET (u64 *)CKSEG1ADDR(0x1fc00000)
/* Prom base address */ /* Prom base address */
#define PMAX_PROM_ENTRY(x) (VEC_RESET + (x)) /* Prom jump table */ #define PMAX_PROM_ENTRY(x) (VEC_RESET + (x)) /* Prom jump table */
......
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