Commit 3d3a1676 authored by Bruce Allan's avatar Bruce Allan Committed by Jeff Kirsher

e1000e: cleanup whitespace and indentation

Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 06c24b91
......@@ -1269,19 +1269,17 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
reg |= E1000_PBA_ECC_CORR_EN;
ew32(PBA_ECC, reg);
}
/*
* Workaround for hardware errata.
* Ensure that DMA Dynamic Clock gating is disabled on 82571 and 82572
*/
if ((hw->mac.type == e1000_82571) ||
(hw->mac.type == e1000_82572)) {
if ((hw->mac.type == e1000_82571) || (hw->mac.type == e1000_82572)) {
reg = er32(CTRL_EXT);
reg &= ~E1000_CTRL_EXT_DMA_DYN_CLK_EN;
ew32(CTRL_EXT, reg);
}
/* PCI-Ex Control Registers */
switch (hw->mac.type) {
case e1000_82574:
......
......@@ -1230,8 +1230,7 @@ s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable)
u32 reg = 0;
u16 kmrn_reg = 0;
ret_val = e1000e_read_kmrn_reg_locked(hw,
E1000_KMRNCTRLSTA_K1_CONFIG,
ret_val = e1000e_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG,
&kmrn_reg);
if (ret_val)
return ret_val;
......@@ -1241,8 +1240,7 @@ s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable)
else
kmrn_reg &= ~E1000_KMRNCTRLSTA_K1_ENABLE;
ret_val = e1000e_write_kmrn_reg_locked(hw,
E1000_KMRNCTRLSTA_K1_CONFIG,
ret_val = e1000e_write_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG,
kmrn_reg);
if (ret_val)
return ret_val;
......
......@@ -3262,6 +3262,7 @@ static void e1000e_set_rx_mode(struct net_device *netdev)
e1000e_vlan_filter_disable(adapter);
} else {
int count;
if (netdev->flags & IFF_ALLMULTI) {
rctl |= E1000_RCTL_MPE;
} else {
......@@ -6103,7 +6104,6 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
resource_size_t mmio_start, mmio_len;
resource_size_t flash_start, flash_len;
static int cards_found;
u16 aspm_disable_flag = 0;
int i, err, pci_using_dac;
......@@ -6347,11 +6347,11 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
} else if (adapter->flags & FLAG_APME_IN_CTRL3) {
if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
(adapter->hw.bus.func == 1))
e1000_read_nvm(&adapter->hw,
NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B,
1, &eeprom_data);
else
e1000_read_nvm(&adapter->hw,
NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A,
1, &eeprom_data);
}
/* fetch WoL from EEPROM */
......
......@@ -1172,9 +1172,7 @@ s32 e1000e_setup_copper_link(struct e1000_hw *hw)
* Check link status. Wait up to 100 microseconds for link to become
* valid.
*/
ret_val = e1000e_phy_has_link_generic(hw,
COPPER_LINK_UP_LIMIT,
10,
ret_val = e1000e_phy_has_link_generic(hw, COPPER_LINK_UP_LIMIT, 10,
&link);
if (ret_val)
return ret_val;
......@@ -1237,10 +1235,8 @@ s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw)
if (phy->autoneg_wait_to_complete) {
e_dbg("Waiting for forced speed/duplex link on IGP phy.\n");
ret_val = e1000e_phy_has_link_generic(hw,
PHY_FORCE_LIMIT,
100000,
&link);
ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
100000, &link);
if (ret_val)
return ret_val;
......@@ -1248,10 +1244,8 @@ s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw)
e_dbg("Link taking longer than expected.\n");
/* Try once more */
ret_val = e1000e_phy_has_link_generic(hw,
PHY_FORCE_LIMIT,
100000,
&link);
ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
100000, &link);
}
return ret_val;
......@@ -1412,10 +1406,8 @@ s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw)
if (phy->autoneg_wait_to_complete) {
e_dbg("Waiting for forced speed/duplex link on IFE phy.\n");
ret_val = e1000e_phy_has_link_generic(hw,
PHY_FORCE_LIMIT,
100000,
&link);
ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
100000, &link);
if (ret_val)
return ret_val;
......@@ -1423,10 +1415,8 @@ s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw)
e_dbg("Link taking longer than expected.\n");
/* Try once more */
ret_val = e1000e_phy_has_link_generic(hw,
PHY_FORCE_LIMIT,
100000,
&link);
ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
100000, &link);
if (ret_val)
return ret_val;
}
......@@ -2167,6 +2157,7 @@ s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw)
s32 e1000e_get_cfg_done(struct e1000_hw *hw)
{
mdelay(10);
return 0;
}
......@@ -3155,12 +3146,10 @@ s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw)
if (ret_val)
return ret_val;
data &= BM_CS_STATUS_LINK_UP |
BM_CS_STATUS_RESOLVED |
data &= BM_CS_STATUS_LINK_UP | BM_CS_STATUS_RESOLVED |
BM_CS_STATUS_SPEED_MASK;
if (data != (BM_CS_STATUS_LINK_UP |
BM_CS_STATUS_RESOLVED |
if (data != (BM_CS_STATUS_LINK_UP | BM_CS_STATUS_RESOLVED |
BM_CS_STATUS_SPEED_1000))
return 0;
......@@ -3227,10 +3216,8 @@ s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw)
if (phy->autoneg_wait_to_complete) {
e_dbg("Waiting for forced speed/duplex link on 82577 phy\n");
ret_val = e1000e_phy_has_link_generic(hw,
PHY_FORCE_LIMIT,
100000,
&link);
ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
100000, &link);
if (ret_val)
return ret_val;
......@@ -3238,10 +3225,8 @@ s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw)
e_dbg("Link taking longer than expected.\n");
/* Try once more */
ret_val = e1000e_phy_has_link_generic(hw,
PHY_FORCE_LIMIT,
100000,
&link);
ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
100000, &link);
}
return ret_val;
......
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