Commit 3ecb5463 authored by Claudiu Beznea's avatar Claudiu Beznea

ARM: dts: at91: use clock-controller name for sckc nodes

Use clock-controller generic name for slow clock controller nodes.
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230517094119.2894220-5-claudiu.beznea@microchip.com
parent f4f15c5c
...@@ -923,7 +923,7 @@ usb2: gadget@fff78000 { ...@@ -923,7 +923,7 @@ usb2: gadget@fff78000 {
status = "disabled"; status = "disabled";
}; };
clk32k: sckc@fffffd50 { clk32k: clock-controller@fffffd50 {
compatible = "atmel,at91sam9x5-sckc"; compatible = "atmel,at91sam9x5-sckc";
reg = <0xfffffd50 0x4>; reg = <0xfffffd50 0x4>;
clocks = <&slow_xtal>; clocks = <&slow_xtal>;
......
...@@ -799,7 +799,7 @@ watchdog@fffffd40 { ...@@ -799,7 +799,7 @@ watchdog@fffffd40 {
status = "disabled"; status = "disabled";
}; };
clk32k: sckc@fffffd50 { clk32k: clock-controller@fffffd50 {
compatible = "atmel,at91sam9x5-sckc"; compatible = "atmel,at91sam9x5-sckc";
reg = <0xfffffd50 0x4>; reg = <0xfffffd50 0x4>;
clocks = <&slow_xtal>; clocks = <&slow_xtal>;
......
...@@ -154,7 +154,7 @@ pit: timer@fffffe30 { ...@@ -154,7 +154,7 @@ pit: timer@fffffe30 {
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
}; };
clk32k: sckc@fffffe50 { clk32k: clock-controller@fffffe50 {
compatible = "atmel,at91sam9x5-sckc"; compatible = "atmel,at91sam9x5-sckc";
reg = <0xfffffe50 0x4>; reg = <0xfffffe50 0x4>;
clocks = <&slow_xtal>; clocks = <&slow_xtal>;
......
...@@ -1322,7 +1322,7 @@ pit: timer@fffffe40 { ...@@ -1322,7 +1322,7 @@ pit: timer@fffffe40 {
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
}; };
clk32k: sckc@fffffe50 { clk32k: clock-controller@fffffe50 {
compatible = "microchip,sam9x60-sckc"; compatible = "microchip,sam9x60-sckc";
reg = <0xfffffe50 0x4>; reg = <0xfffffe50 0x4>;
clocks = <&slow_xtal>; clocks = <&slow_xtal>;
......
...@@ -704,7 +704,7 @@ watchdog: watchdog@f8048040 { ...@@ -704,7 +704,7 @@ watchdog: watchdog@f8048040 {
status = "disabled"; status = "disabled";
}; };
clk32k: sckc@f8048050 { clk32k: clock-controller@f8048050 {
compatible = "atmel,sama5d4-sckc"; compatible = "atmel,sama5d4-sckc";
reg = <0xf8048050 0x4>; reg = <0xf8048050 0x4>;
......
...@@ -1040,7 +1040,7 @@ watchdog: watchdog@fffffe40 { ...@@ -1040,7 +1040,7 @@ watchdog: watchdog@fffffe40 {
status = "disabled"; status = "disabled";
}; };
clk32k: sckc@fffffe50 { clk32k: clock-controller@fffffe50 {
compatible = "atmel,sama5d3-sckc"; compatible = "atmel,sama5d3-sckc";
reg = <0xfffffe50 0x4>; reg = <0xfffffe50 0x4>;
clocks = <&slow_xtal>; clocks = <&slow_xtal>;
......
...@@ -761,7 +761,7 @@ watchdog: watchdog@fc068640 { ...@@ -761,7 +761,7 @@ watchdog: watchdog@fc068640 {
status = "disabled"; status = "disabled";
}; };
clk32k: sckc@fc068650 { clk32k: clock-controller@fc068650 {
compatible = "atmel,sama5d4-sckc"; compatible = "atmel,sama5d4-sckc";
reg = <0xfc068650 0x4>; reg = <0xfc068650 0x4>;
#clock-cells = <0>; #clock-cells = <0>;
......
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