Commit 40b4157d authored by Alexandre Torgue's avatar Alexandre Torgue

ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15

Enable optee and SCMI clocks/reset protocols support.
Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@foss.st.com>
parent 5f5d7dec
...@@ -115,6 +115,33 @@ booster: regulator-booster { ...@@ -115,6 +115,33 @@ booster: regulator-booster {
status = "disabled"; status = "disabled";
}; };
firmware {
optee: optee {
compatible = "linaro,optee-tz";
method = "smc";
status = "disabled";
};
scmi: scmi {
compatible = "linaro,scmi-optee";
#address-cells = <1>;
#size-cells = <0>;
linaro,optee-channel-id = <0>;
shmem = <&scmi_shm>;
status = "disabled";
scmi_clk: protocol@14 {
reg = <0x14>;
#clock-cells = <1>;
};
scmi_reset: protocol@16 {
reg = <0x16>;
#reset-cells = <1>;
};
};
};
soc { soc {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
...@@ -122,6 +149,20 @@ soc { ...@@ -122,6 +149,20 @@ soc {
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
ranges; ranges;
scmi_sram: sram@2ffff000 {
compatible = "mmio-sram";
reg = <0x2ffff000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x2ffff000 0x1000>;
scmi_shm: scmi-sram@0 {
compatible = "arm,scmi-shmem";
reg = <0 0x80>;
status = "disabled";
};
};
timers2: timer@40000000 { timers2: timer@40000000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
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