Commit 40c565a4 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki

Merge branches 'pm-cpufreq' and 'pm-cpuidle'

Merge CPU power management updates for 6.5-rc1:

 - Add missing __init annotation to one function in the intel_idle
   drvier (Rafael Wysocki).

 - Make intel_pstate use a correct scaling factor when mapping HWP
   performance levels to frequency values on hybrid-capable systems
   with disabled E-cores (Srinivas Pandruvada).

 - Fix Kconfig dependencies of the cpufreq-dt-platform driver (Viresh
   Kumar).

 - Add support to build cpufreq-dt-platdev as a module (Zhipeng Wang).

 - Don't allocate Sparc's cpufreq_driver dynamically (Viresh Kumar).

 - Add support for TI's AM62A7 platform (Vibhore Vardhan).

 - Add support for Armada's ap807 platform (Russell King (Oracle)).

 - Add support for StarFive JH7110 SoC (Mason Huo).

 - Fix voltage selection for Mediatek Socs (Daniel Golle).

 - Fix error handling in Tegra's cpufreq driver (Christophe JAILLET).

 - Document Qualcomm's IPQ8074 in DT bindings (Robert Marko).

 - Don't warn for disabling a non-existing frequency for imx6q cpufreq
   driver (Christoph Niedermaier).

 - Use dev_err_probe() in Qualcomm's cpufreq driver (Andrew Halaney).

* pm-cpufreq:
  cpufreq: intel_pstate: Fix scaling for hybrid-capable systems with disabled E-cores
  cpufreq: Make CONFIG_CPUFREQ_DT_PLATDEV depend on OF
  cpufreq: qcom-cpufreq-hw: Use dev_err_probe() when failing to get icc paths
  cpufreq: mediatek: correct voltages for MT7622 and MT7623
  cpufreq: armada-8k: add ap807 support
  cpufreq: dt-platdev: Support building as module
  dt-bindings: cpufreq: qcom-cpufreq-nvmem: document IPQ8074
  cpufreq: dt-platdev: Blacklist ti,am62a7 SoC
  cpufreq: ti-cpufreq: Add support for AM62A7
  cpufreq: imx6q: don't warn for disabling a non-existing frequency
  cpufreq: sparc: Don't allocate cpufreq_driver dynamically
  cpufreq: tegra194: Fix an error handling path in tegra194_cpufreq_probe()
  cpufreq: dt-platdev: Add JH7110 SOC to the allowlist

* pm-cpuidle:
  intel_idle: Add __init annotation to matchup_vm_state_with_baremetal()
......@@ -28,6 +28,7 @@ select:
- qcom,apq8064
- qcom,apq8096
- qcom,ipq8064
- qcom,ipq8074
- qcom,msm8939
- qcom,msm8960
- qcom,msm8974
......
......@@ -218,7 +218,8 @@ config CPUFREQ_DT
If in doubt, say N.
config CPUFREQ_DT_PLATDEV
bool
tristate "Generic DT based cpufreq platdev driver"
depends on OF
help
This adds a generic DT based cpufreq platdev driver for frequency
management. This creates a 'cpufreq-dt' platform device, on the
......
......@@ -21,6 +21,13 @@
#include <linux/pm_opp.h>
#include <linux/slab.h>
static const struct of_device_id __maybe_unused armada_8k_cpufreq_of_match[] = {
{ .compatible = "marvell,ap806-cpu-clock" },
{ .compatible = "marvell,ap807-cpu-clock" },
{ },
};
MODULE_DEVICE_TABLE(of, armada_8k_cpufreq_of_match);
/*
* Setup the opps list with the divider for the max frequency, that
* will be filled at runtime.
......@@ -127,7 +134,8 @@ static int __init armada_8k_cpufreq_init(void)
struct device_node *node;
struct cpumask cpus;
node = of_find_compatible_node(NULL, NULL, "marvell,ap806-cpu-clock");
node = of_find_matching_node_and_match(NULL, armada_8k_cpufreq_of_match,
NULL);
if (!node || !of_device_is_available(node)) {
of_node_put(node);
return -ENODEV;
......@@ -204,12 +212,6 @@ static void __exit armada_8k_cpufreq_exit(void)
}
module_exit(armada_8k_cpufreq_exit);
static const struct of_device_id __maybe_unused armada_8k_cpufreq_of_match[] = {
{ .compatible = "marvell,ap806-cpu-clock" },
{ },
};
MODULE_DEVICE_TABLE(of, armada_8k_cpufreq_of_match);
MODULE_AUTHOR("Gregory Clement <gregory.clement@bootlin.com>");
MODULE_DESCRIPTION("Armada 8K cpufreq driver");
MODULE_LICENSE("GPL");
......@@ -5,6 +5,7 @@
*/
#include <linux/err.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
......@@ -85,6 +86,8 @@ static const struct of_device_id allowlist[] __initconst = {
{ .compatible = "st-ericsson,u9500", },
{ .compatible = "st-ericsson,u9540", },
{ .compatible = "starfive,jh7110", },
{ .compatible = "ti,omap2", },
{ .compatible = "ti,omap4", },
{ .compatible = "ti,omap5", },
......@@ -165,6 +168,7 @@ static const struct of_device_id blocklist[] __initconst = {
{ .compatible = "ti,dra7", },
{ .compatible = "ti,omap3", },
{ .compatible = "ti,am625", },
{ .compatible = "ti,am62a7", },
{ .compatible = "qcom,ipq8064", },
{ .compatible = "qcom,apq8064", },
......@@ -214,3 +218,4 @@ static int __init cpufreq_dt_platdev_init(void)
sizeof(struct cpufreq_dt_platform_data)));
}
core_initcall(cpufreq_dt_platdev_init);
MODULE_LICENSE("GPL");
......@@ -209,6 +209,14 @@ static struct cpufreq_driver imx6q_cpufreq_driver = {
.suspend = cpufreq_generic_suspend,
};
static void imx6x_disable_freq_in_opp(struct device *dev, unsigned long freq)
{
int ret = dev_pm_opp_disable(dev, freq);
if (ret < 0 && ret != -ENODEV)
dev_warn(dev, "failed to disable %ldMHz OPP\n", freq / 1000000);
}
#define OCOTP_CFG3 0x440
#define OCOTP_CFG3_SPEED_SHIFT 16
#define OCOTP_CFG3_SPEED_1P2GHZ 0x3
......@@ -254,17 +262,15 @@ static int imx6q_opp_check_speed_grading(struct device *dev)
val &= 0x3;
if (val < OCOTP_CFG3_SPEED_996MHZ)
if (dev_pm_opp_disable(dev, 996000000))
dev_warn(dev, "failed to disable 996MHz OPP\n");
imx6x_disable_freq_in_opp(dev, 996000000);
if (of_machine_is_compatible("fsl,imx6q") ||
of_machine_is_compatible("fsl,imx6qp")) {
if (val != OCOTP_CFG3_SPEED_852MHZ)
if (dev_pm_opp_disable(dev, 852000000))
dev_warn(dev, "failed to disable 852MHz OPP\n");
imx6x_disable_freq_in_opp(dev, 852000000);
if (val != OCOTP_CFG3_SPEED_1P2GHZ)
if (dev_pm_opp_disable(dev, 1200000000))
dev_warn(dev, "failed to disable 1.2GHz OPP\n");
imx6x_disable_freq_in_opp(dev, 1200000000);
}
return 0;
......@@ -316,20 +322,16 @@ static int imx6ul_opp_check_speed_grading(struct device *dev)
val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3;
if (of_machine_is_compatible("fsl,imx6ul")) {
if (of_machine_is_compatible("fsl,imx6ul"))
if (val != OCOTP_CFG3_6UL_SPEED_696MHZ)
if (dev_pm_opp_disable(dev, 696000000))
dev_warn(dev, "failed to disable 696MHz OPP\n");
}
imx6x_disable_freq_in_opp(dev, 696000000);
if (of_machine_is_compatible("fsl,imx6ull")) {
if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
if (dev_pm_opp_disable(dev, 792000000))
dev_warn(dev, "failed to disable 792MHz OPP\n");
imx6x_disable_freq_in_opp(dev, 792000000);
if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
if (dev_pm_opp_disable(dev, 900000000))
dev_warn(dev, "failed to disable 900MHz OPP\n");
imx6x_disable_freq_in_opp(dev, 900000000);
}
return ret;
......
......@@ -302,6 +302,13 @@ static bool hwp_forced __read_mostly;
static struct cpufreq_driver *intel_pstate_driver __read_mostly;
#define HYBRID_SCALING_FACTOR 78741
static inline int core_get_scaling(void)
{
return 100000;
}
#ifdef CONFIG_ACPI
static bool acpi_ppc;
#endif
......@@ -400,6 +407,26 @@ static int intel_pstate_get_cppc_guaranteed(int cpu)
return cppc_perf.nominal_perf;
}
static int intel_pstate_cppc_get_scaling(int cpu)
{
struct cppc_perf_caps cppc_perf;
int ret;
ret = cppc_get_perf_caps(cpu, &cppc_perf);
/*
* If the nominal frequency and the nominal performance are not
* zero and the ratio between them is not 100, return the hybrid
* scaling factor.
*/
if (!ret && cppc_perf.nominal_perf && cppc_perf.nominal_freq &&
cppc_perf.nominal_perf * 100 != cppc_perf.nominal_freq)
return HYBRID_SCALING_FACTOR;
return core_get_scaling();
}
#else /* CONFIG_ACPI_CPPC_LIB */
static inline void intel_pstate_set_itmt_prio(int cpu)
{
......@@ -492,6 +519,11 @@ static inline int intel_pstate_get_cppc_guaranteed(int cpu)
{
return -ENOTSUPP;
}
static int intel_pstate_cppc_get_scaling(int cpu)
{
return core_get_scaling();
}
#endif /* CONFIG_ACPI_CPPC_LIB */
/**
......@@ -1897,11 +1929,6 @@ static int core_get_turbo_pstate(int cpu)
return ret;
}
static inline int core_get_scaling(void)
{
return 100000;
}
static u64 core_get_val(struct cpudata *cpudata, int pstate)
{
u64 val;
......@@ -1938,16 +1965,28 @@ static void hybrid_get_type(void *data)
*cpu_type = get_this_hybrid_cpu_type();
}
static int hybrid_get_cpu_scaling(int cpu)
static int hwp_get_cpu_scaling(int cpu)
{
u8 cpu_type = 0;
smp_call_function_single(cpu, hybrid_get_type, &cpu_type, 1);
/* P-cores have a smaller perf level-to-freqency scaling factor. */
if (cpu_type == 0x40)
return 78741;
return HYBRID_SCALING_FACTOR;
/* Use default core scaling for E-cores */
if (cpu_type == 0x20)
return core_get_scaling();
/*
* If reached here, this system is either non-hybrid (like Tiger
* Lake) or hybrid-capable (like Alder Lake or Raptor Lake) with
* no E cores (in which case CPUID for hybrid support is 0).
*
* The CPPC nominal_frequency field is 0 for non-hybrid systems,
* so the default core scaling will be used for them.
*/
return intel_pstate_cppc_get_scaling(cpu);
}
static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
......@@ -3395,8 +3434,7 @@ static int __init intel_pstate_init(void)
if (!default_driver)
default_driver = &intel_pstate;
if (boot_cpu_has(X86_FEATURE_HYBRID_CPU))
pstate_funcs.get_cpu_scaling = hybrid_get_cpu_scaling;
pstate_funcs.get_cpu_scaling = hwp_get_cpu_scaling;
goto hwp_cpu_matched;
}
......
......@@ -696,9 +696,16 @@ static const struct mtk_cpufreq_platform_data mt2701_platform_data = {
static const struct mtk_cpufreq_platform_data mt7622_platform_data = {
.min_volt_shift = 100000,
.max_volt_shift = 200000,
.proc_max_volt = 1360000,
.proc_max_volt = 1350000,
.sram_min_volt = 0,
.sram_max_volt = 1360000,
.sram_max_volt = 1350000,
.ccifreq_supported = false,
};
static const struct mtk_cpufreq_platform_data mt7623_platform_data = {
.min_volt_shift = 100000,
.max_volt_shift = 200000,
.proc_max_volt = 1300000,
.ccifreq_supported = false,
};
......@@ -734,7 +741,7 @@ static const struct of_device_id mtk_cpufreq_machines[] __initconst = {
{ .compatible = "mediatek,mt2701", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt2712", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt7622", .data = &mt7622_platform_data },
{ .compatible = "mediatek,mt7623", .data = &mt7622_platform_data },
{ .compatible = "mediatek,mt7623", .data = &mt7623_platform_data },
{ .compatible = "mediatek,mt8167", .data = &mt8516_platform_data },
{ .compatible = "mediatek,mt817x", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt8173", .data = &mt2701_platform_data },
......
......@@ -661,7 +661,7 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
ret = dev_pm_opp_of_find_icc_paths(cpu_dev, NULL);
if (ret)
return ret;
return dev_err_probe(dev, ret, "Failed to find icc paths\n");
for (num_domains = 0; num_domains < MAX_FREQ_DOMAINS; num_domains++)
if (!platform_get_resource(pdev, IORESOURCE_MEM, num_domains))
......
......@@ -20,8 +20,6 @@
#include <asm/asi.h>
#include <asm/timer.h>
static struct cpufreq_driver *cpufreq_us2e_driver;
struct us2e_freq_percpu_info {
struct cpufreq_frequency_table table[6];
};
......@@ -300,12 +298,19 @@ static int __init us2e_freq_cpu_init(struct cpufreq_policy *policy)
static int us2e_freq_cpu_exit(struct cpufreq_policy *policy)
{
if (cpufreq_us2e_driver)
us2e_freq_target(policy, 0);
return 0;
}
static struct cpufreq_driver cpufreq_us2e_driver = {
.name = "UltraSPARC-IIe",
.init = us2e_freq_cpu_init,
.verify = cpufreq_generic_frequency_table_verify,
.target_index = us2e_freq_target,
.get = us2e_freq_get,
.exit = us2e_freq_cpu_exit,
};
static int __init us2e_freq_init(void)
{
unsigned long manuf, impl, ver;
......@@ -319,39 +324,15 @@ static int __init us2e_freq_init(void)
impl = ((ver >> 32) & 0xffff);
if (manuf == 0x17 && impl == 0x13) {
struct cpufreq_driver *driver;
ret = -ENOMEM;
driver = kzalloc(sizeof(*driver), GFP_KERNEL);
if (!driver)
goto err_out;
us2e_freq_table = kzalloc((NR_CPUS * sizeof(*us2e_freq_table)),
us2e_freq_table = kzalloc(NR_CPUS * sizeof(*us2e_freq_table),
GFP_KERNEL);
if (!us2e_freq_table)
goto err_out;
driver->init = us2e_freq_cpu_init;
driver->verify = cpufreq_generic_frequency_table_verify;
driver->target_index = us2e_freq_target;
driver->get = us2e_freq_get;
driver->exit = us2e_freq_cpu_exit;
strcpy(driver->name, "UltraSPARC-IIe");
return -ENOMEM;
cpufreq_us2e_driver = driver;
ret = cpufreq_register_driver(driver);
ret = cpufreq_register_driver(&cpufreq_us2e_driver);
if (ret)
goto err_out;
return 0;
err_out:
if (driver) {
kfree(driver);
cpufreq_us2e_driver = NULL;
}
kfree(us2e_freq_table);
us2e_freq_table = NULL;
return ret;
}
......@@ -360,13 +341,8 @@ static int __init us2e_freq_init(void)
static void __exit us2e_freq_exit(void)
{
if (cpufreq_us2e_driver) {
cpufreq_unregister_driver(cpufreq_us2e_driver);
kfree(cpufreq_us2e_driver);
cpufreq_us2e_driver = NULL;
cpufreq_unregister_driver(&cpufreq_us2e_driver);
kfree(us2e_freq_table);
us2e_freq_table = NULL;
}
}
MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
......
......@@ -19,8 +19,6 @@
#include <asm/head.h>
#include <asm/timer.h>
static struct cpufreq_driver *cpufreq_us3_driver;
struct us3_freq_percpu_info {
struct cpufreq_frequency_table table[4];
};
......@@ -144,12 +142,19 @@ static int __init us3_freq_cpu_init(struct cpufreq_policy *policy)
static int us3_freq_cpu_exit(struct cpufreq_policy *policy)
{
if (cpufreq_us3_driver)
us3_freq_target(policy, 0);
return 0;
}
static struct cpufreq_driver cpufreq_us3_driver = {
.name = "UltraSPARC-III",
.init = us3_freq_cpu_init,
.verify = cpufreq_generic_frequency_table_verify,
.target_index = us3_freq_target,
.get = us3_freq_get,
.exit = us3_freq_cpu_exit,
};
static int __init us3_freq_init(void)
{
unsigned long manuf, impl, ver;
......@@ -167,39 +172,15 @@ static int __init us3_freq_init(void)
impl == CHEETAH_PLUS_IMPL ||
impl == JAGUAR_IMPL ||
impl == PANTHER_IMPL)) {
struct cpufreq_driver *driver;
ret = -ENOMEM;
driver = kzalloc(sizeof(*driver), GFP_KERNEL);
if (!driver)
goto err_out;
us3_freq_table = kzalloc((NR_CPUS * sizeof(*us3_freq_table)),
us3_freq_table = kzalloc(NR_CPUS * sizeof(*us3_freq_table),
GFP_KERNEL);
if (!us3_freq_table)
goto err_out;
driver->init = us3_freq_cpu_init;
driver->verify = cpufreq_generic_frequency_table_verify;
driver->target_index = us3_freq_target;
driver->get = us3_freq_get;
driver->exit = us3_freq_cpu_exit;
strcpy(driver->name, "UltraSPARC-III");
return -ENOMEM;
cpufreq_us3_driver = driver;
ret = cpufreq_register_driver(driver);
ret = cpufreq_register_driver(&cpufreq_us3_driver);
if (ret)
goto err_out;
return 0;
err_out:
if (driver) {
kfree(driver);
cpufreq_us3_driver = NULL;
}
kfree(us3_freq_table);
us3_freq_table = NULL;
return ret;
}
......@@ -208,13 +189,8 @@ static int __init us3_freq_init(void)
static void __exit us3_freq_exit(void)
{
if (cpufreq_us3_driver) {
cpufreq_unregister_driver(cpufreq_us3_driver);
kfree(cpufreq_us3_driver);
cpufreq_us3_driver = NULL;
cpufreq_unregister_driver(&cpufreq_us3_driver);
kfree(us3_freq_table);
us3_freq_table = NULL;
}
}
MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
......
......@@ -686,8 +686,10 @@ static int tegra194_cpufreq_probe(struct platform_device *pdev)
/* Check for optional OPPv2 and interconnect paths on CPU0 to enable ICC scaling */
cpu_dev = get_cpu_device(0);
if (!cpu_dev)
return -EPROBE_DEFER;
if (!cpu_dev) {
err = -EPROBE_DEFER;
goto err_free_res;
}
if (dev_pm_opp_of_get_opp_desc_node(cpu_dev)) {
err = dev_pm_opp_of_find_icc_paths(cpu_dev, NULL);
......
......@@ -337,6 +337,7 @@ static const struct of_device_id ti_cpufreq_of_match[] = {
{ .compatible = "ti,omap34xx", .data = &omap34xx_soc_data, },
{ .compatible = "ti,omap36xx", .data = &omap36xx_soc_data, },
{ .compatible = "ti,am625", .data = &am625_soc_data, },
{ .compatible = "ti,am62a7", .data = &am625_soc_data, },
/* legacy */
{ .compatible = "ti,omap3430", .data = &omap34xx_soc_data, },
{ .compatible = "ti,omap3630", .data = &omap36xx_soc_data, },
......
......@@ -2147,7 +2147,7 @@ static void __init intel_idle_cpuidle_devices_uninit(void)
* All our short idle states are dominated by vmexit/vmenter latencies,
* not the underlying hardware latencies so we keep our values for these.
*/
static void matchup_vm_state_with_baremetal(void)
static void __init matchup_vm_state_with_baremetal(void)
{
int cstate;
......
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