Commit 41fd932e authored by Chris Park's avatar Chris Park Committed by Alex Deucher

drm/amd/display: Update panel register

[Why]
Incorrect panel register settings are applied for power sequence because
the register macro is not defined in resource.

[How]
Implement same register space to future resource files.
Signed-off-by: default avatarChris Park <Chris.Park@amd.com>
Reviewed-by: default avatarJoshua Aberback <Joshua.Aberback@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 06722b37
...@@ -521,6 +521,7 @@ static const struct dcn10_link_enc_hpd_registers link_enc_hpd_regs[] = { ...@@ -521,6 +521,7 @@ static const struct dcn10_link_enc_hpd_registers link_enc_hpd_regs[] = {
[id] = {\ [id] = {\
LE_DCN301_REG_LIST(id), \ LE_DCN301_REG_LIST(id), \
UNIPHY_DCN2_REG_LIST(phyid), \ UNIPHY_DCN2_REG_LIST(phyid), \
SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
} }
static const struct dce110_aux_registers_shift aux_shift = { static const struct dce110_aux_registers_shift aux_shift = {
......
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