Commit 42ae1f88 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915/fbc: Reduce fbc1 compression interval to 1 second

The default fbc1 compression interval we use is 500 frames. That
translates to over 8 seconds typically. That's rather excessive
so let's drop it to 1 second.

The hardware will not attempt recompression unless at least one
line has been modified, so a shorter compression interval should
not cause extra bandwidth use in the purely idle scenario. Of
course in the mostly idle case we are possibly going to recompress
a bit more.

Should really try to find some kind of sweet spot to minimize
the energy usage...
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200429101034.8208-11-ville.syrjala@linux.intel.comReviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
parent a68ce21b
...@@ -698,8 +698,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc, ...@@ -698,8 +698,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
cache->fb.stride = fb->pitches[0]; cache->fb.stride = fb->pitches[0];
cache->fb.modifier = fb->modifier; cache->fb.modifier = fb->modifier;
/* This value was pulled out of someone's hat */ /* FBC1 compression interval: arbitrary choice of 1 second */
cache->interval = 500; cache->interval = drm_mode_vrefresh(&crtc_state->hw.adjusted_mode);
cache->fence_y_offset = intel_plane_fence_y_offset(plane_state); cache->fence_y_offset = intel_plane_fence_y_offset(plane_state);
......
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