Commit 42bbd003 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven

arm64: dts: renesas: r9a07g044: Add SYSC node

Add SYSC node to RZ/G2L (R9A07G044) SoC .dtsi.
Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609163717.3083-4-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 690ea5d3
...@@ -99,6 +99,18 @@ cpg: clock-controller@11010000 { ...@@ -99,6 +99,18 @@ cpg: clock-controller@11010000 {
#power-domain-cells = <0>; #power-domain-cells = <0>;
}; };
sysc: system-controller@11020000 {
compatible = "renesas,r9a07g044-sysc";
reg = <0 0x11020000 0 0x10000>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "lpm_int", "ca55stbydone_int",
"cm33stbyr_int", "ca55_deny";
status = "disabled";
};
gic: interrupt-controller@11900000 { gic: interrupt-controller@11900000 {
compatible = "arm,gic-v3"; compatible = "arm,gic-v3";
#interrupt-cells = <3>; #interrupt-cells = <3>;
......
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