Commit 44abd5c1 authored by Bruce Allan's avatar Bruce Allan Committed by Jeff Kirsher

e1000e: cleanup use of check_reset_block function pointer

Replace e1000_check_reset_block() inline function with calls to the PHY ops
check_reset_block function pointer.
Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 48768329
......@@ -662,11 +662,6 @@ static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
return hw->phy.ops.reset(hw);
}
static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
{
return hw->phy.ops.check_reset_block(hw);
}
static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
{
return hw->phy.ops.read_reg(hw, offset, data);
......
......@@ -258,7 +258,7 @@ static int e1000_set_settings(struct net_device *netdev,
* When SoL/IDER sessions are active, autoneg/speed/duplex
* cannot be changed
*/
if (e1000_check_reset_block(hw)) {
if (hw->phy.ops.check_reset_block(hw)) {
e_err("Cannot change link characteristics when SoL/IDER is "
"active.\n");
return -EINVAL;
......@@ -1598,11 +1598,13 @@ static int e1000_run_loopback_test(struct e1000_adapter *adapter)
static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
{
struct e1000_hw *hw = &adapter->hw;
/*
* PHY loopback cannot be performed if SoL/IDER
* sessions are active
*/
if (e1000_check_reset_block(&adapter->hw)) {
if (hw->phy.ops.check_reset_block(hw)) {
e_err("Cannot do PHY loopback test when SoL/IDER is active.\n");
*data = 0;
goto out;
......
......@@ -324,7 +324,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
phy->ops.power_down = e1000_power_down_phy_copper_ich8lan;
phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
if (!e1000_check_reset_block(hw)) {
if (!hw->phy.ops.check_reset_block(hw)) {
u32 fwsm = er32(FWSM);
/*
......@@ -1314,7 +1314,7 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)
oem_reg |= HV_OEM_BITS_LPLU;
/* Set Restart auto-neg to activate the bits */
if (!e1000_check_reset_block(hw))
if (!hw->phy.ops.check_reset_block(hw))
oem_reg |= HV_OEM_BITS_RESTART_AN;
} else {
if (mac_reg & (E1000_PHY_CTRL_GBE_DISABLE |
......@@ -1788,7 +1788,7 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw)
s32 ret_val = 0;
u16 reg;
if (e1000_check_reset_block(hw))
if (hw->phy.ops.check_reset_block(hw))
return 0;
/* Allow time for h/w to get to quiescent state after reset */
......@@ -1897,7 +1897,7 @@ static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active)
else
oem_reg &= ~HV_OEM_BITS_LPLU;
if (!e1000_check_reset_block(hw))
if (!hw->phy.ops.check_reset_block(hw))
oem_reg |= HV_OEM_BITS_RESTART_AN;
return e1e_wphy(hw, HV_OEM_BITS, oem_reg);
......@@ -3109,7 +3109,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
ctrl = er32(CTRL);
if (!e1000_check_reset_block(hw)) {
if (!hw->phy.ops.check_reset_block(hw)) {
/*
* Full-chip reset requires MAC and PHY reset at the same
* time to make sure the interface between MAC and the
......@@ -3327,7 +3327,7 @@ static s32 e1000_setup_link_ich8lan(struct e1000_hw *hw)
{
s32 ret_val;
if (e1000_check_reset_block(hw))
if (hw->phy.ops.check_reset_block(hw))
return 0;
/*
......@@ -3707,7 +3707,8 @@ void e1000_resume_workarounds_pchlan(struct e1000_hw *hw)
u16 phy_id1, phy_id2;
s32 ret_val;
if ((hw->mac.type != e1000_pch2lan) || e1000_check_reset_block(hw))
if ((hw->mac.type != e1000_pch2lan) ||
hw->phy.ops.check_reset_block(hw))
return;
ret_val = hw->phy.ops.acquire(hw);
......
......@@ -711,7 +711,7 @@ s32 e1000e_setup_link_generic(struct e1000_hw *hw)
* In the case of the phy reset being blocked, we already have a link.
* We do not need to set it up again.
*/
if (e1000_check_reset_block(hw))
if (hw->phy.ops.check_reset_block(hw))
return 0;
/*
......
......@@ -6236,7 +6236,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
adapter->hw.phy.ms_type = e1000_ms_hw_default;
}
if (e1000_check_reset_block(&adapter->hw))
if (hw->phy.ops.check_reset_block(hw))
e_info("PHY reset is blocked due to SOL/IDER session.\n");
/* Set initial default active device features */
......@@ -6403,7 +6403,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
if (!(adapter->flags & FLAG_HAS_AMT))
e1000e_release_hw_control(adapter);
err_eeprom:
if (!e1000_check_reset_block(&adapter->hw))
if (!hw->phy.ops.check_reset_block(hw))
e1000_phy_hw_reset(&adapter->hw);
err_hw_init:
kfree(adapter->tx_ring);
......
......@@ -2133,7 +2133,7 @@ s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw)
s32 ret_val;
u32 ctrl;
ret_val = e1000_check_reset_block(hw);
ret_val = phy->ops.check_reset_block(hw);
if (ret_val)
return 0;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment