Commit 451e4ff1 authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Greg Kroah-Hartman

clk: rockchip: rk3368: fix cpuclk mux bit of big cpu-cluster

commit 535ebd42 upstream.

Both clusters have their mux bit in bit 7 of their respective register.
For whatever reason the big cluster currently lists bit 15 which is
definitly wrong.

Fixes: 3536c97a ("clk: rockchip: add rk3368 clock controller")
Reported-by: default avatarZhang Qing <zhangqing@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Reviewed-by: default avatarzhangqing <zhangqing@rock-chips.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 86beab2f
...@@ -165,7 +165,7 @@ static const struct rockchip_cpuclk_reg_data rk3368_cpuclkb_data = { ...@@ -165,7 +165,7 @@ static const struct rockchip_cpuclk_reg_data rk3368_cpuclkb_data = {
.core_reg = RK3368_CLKSEL_CON(0), .core_reg = RK3368_CLKSEL_CON(0),
.div_core_shift = 0, .div_core_shift = 0,
.div_core_mask = 0x1f, .div_core_mask = 0x1f,
.mux_core_shift = 15, .mux_core_shift = 7,
}; };
static const struct rockchip_cpuclk_reg_data rk3368_cpuclkl_data = { static const struct rockchip_cpuclk_reg_data rk3368_cpuclkl_data = {
......
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