Commit 45b03df2 authored by Yash Shah's avatar Yash Shah Committed by Paul Walmsley

riscv: dts: Re-organize the DT nodes

As per the convention for any SOC device with external connection,
define only device DT node in SOC DTSi file with status = "disabled"
and enable device in Board DTS file with status = "okay"
Reported-by: default avatarAnup Patel <anup@brainfault.org>
Signed-off-by: default avatarYash Shah <yash.shah@sifive.com>
Signed-off-by: default avatarPaul Walmsley <paul.walmsley@sifive.com>
parent ff8391e1
......@@ -163,6 +163,7 @@ uart0: serial@10010000 {
interrupt-parent = <&plic0>;
interrupts = <4>;
clocks = <&prci PRCI_CLK_TLCLK>;
status = "disabled";
};
uart1: serial@10011000 {
compatible = "sifive,fu540-c000-uart", "sifive,uart0";
......@@ -170,6 +171,7 @@ uart1: serial@10011000 {
interrupt-parent = <&plic0>;
interrupts = <5>;
clocks = <&prci PRCI_CLK_TLCLK>;
status = "disabled";
};
i2c0: i2c@10030000 {
compatible = "sifive,fu540-c000-i2c", "sifive,i2c0";
......@@ -181,6 +183,7 @@ i2c0: i2c@10030000 {
reg-io-width = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
qspi0: spi@10040000 {
compatible = "sifive,fu540-c000-spi", "sifive,spi0";
......@@ -191,6 +194,7 @@ qspi0: spi@10040000 {
clocks = <&prci PRCI_CLK_TLCLK>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
qspi1: spi@10041000 {
compatible = "sifive,fu540-c000-spi", "sifive,spi0";
......@@ -201,6 +205,7 @@ qspi1: spi@10041000 {
clocks = <&prci PRCI_CLK_TLCLK>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
qspi2: spi@10050000 {
compatible = "sifive,fu540-c000-spi", "sifive,spi0";
......@@ -210,6 +215,7 @@ qspi2: spi@10050000 {
clocks = <&prci PRCI_CLK_TLCLK>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
};
......@@ -42,7 +42,20 @@ rtcclk: rtcclk {
};
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&i2c0 {
status = "okay";
};
&qspi0 {
status = "okay";
flash@0 {
compatible = "issi,is25wp256", "jedec,spi-nor";
reg = <0>;
......
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