Commit 4a97bdc5 authored by Paul Mundt's avatar Paul Mundt Committed by Linus Torvalds

[PATCH] sh: cleanup + merge

This adds other random bits of sh cleanup.  This includes Kconfig updates,
some exported symbols to satisfy module builds, cleanup of some whitespace
damage, some compile fixes, and some general header and mach-type cleanup.
Signed-off-by: default avatarTom Rini <trini@kernel.crashing.org>
Signed-off-by: default avatarPaul Mundt <paul.mundt@nokia.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 1c6b4f37
......@@ -51,6 +51,12 @@ config SH_7300_SOLUTION_ENGINE
Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V)
evalutation board.
config SH_73180_SOLUTION_ENGINE
bool "SolutionEngine73180"
help
Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3)
evalutation board.
config SH_7751_SYSTEMH
bool "SystemH7751R"
help
......@@ -137,6 +143,16 @@ config SH_ADX
config SH_MPC1211
bool "MPC1211"
config SH_SH03
bool "SH03"
help
CTP/PCI-SH03 is a CPU module computer that produced
by Interface Corporation.
It is compact and excellent in durability.
It will play an active part in your factory or laboratory
as a FA computer.
More information at <http://www.interface.co.jp>
config SH_SECUREEDGE5410
bool "SecureEdge5410"
help
......@@ -156,6 +172,15 @@ config SH_RTS7751R2D
Select RTS7751R2D if configuring for a Renesas Technology
Sales SH-Graphics board.
config SH_EDOSK7705
bool "EDOSK7705"
config SH_SH4202_MICRODEV
bool "SH4-202 MicroDev"
help
Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
with an SH4-202 CPU.
config SH_UNKNOWN
bool "BareCPU"
help
......@@ -245,6 +270,10 @@ config CPU_SUBTYPE_SH7760
bool "SH7760"
depends on CPU_SH4
config CPU_SUBTYPE_SH73180
bool "SH73180"
depends on CPU_SH4
config CPU_SUBTYPE_ST40STB1
bool "ST40STB1 / ST40RA"
depends on CPU_SH4
......@@ -258,8 +287,17 @@ config CPU_SUBTYPE_ST40GX1
help
Select ST40GX1 if you have a ST40GX1 CPU.
config CPU_SUBTYPE_SH4_202
bool "SH4-202"
depends on CPU_SH4
endchoice
config SH7705_CACHE_32KB
bool "Enable 32KB cache size for SH7705"
depends on CPU_SUBTYPE_SH7705
default y
config MMU
bool "Support for memory management hardware"
depends on !CPU_SH2
......@@ -296,8 +334,8 @@ config CMDLINE
# Platform-specific memory start and size definitions
config MEMORY_START
hex "Physical memory start address" if !MEMORY_SET || MEMORY_OVERRIDE
default "0x08000000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || SH_MPC1211 || SH_SECUREEDGE5410
default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D)
default "0x08000000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || SH_MPC1211 || SH_SH03 || SH_SECUREEDGE5410 || SH_SH4202_MICRODEV
default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_73180_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_EDOSK7705)
---help---
Computers built with Hitachi SuperH processors always
map the ROM starting at address zero. But the processor
......@@ -315,10 +353,10 @@ config MEMORY_START
config MEMORY_SIZE
hex "Physical memory size" if !MEMORY_SET || MEMORY_OVERRIDE
default "0x00400000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || !MEMORY_OVERRIDE && (SH_HP600 || SH_BIGSUR || SH_SH2000)
default "0x01000000" if !MEMORY_OVERRIDE && SH_DREAMCAST || SH_SECUREEDGE5410
default "0x04000000" if !MEMORY_OVERRIDE && (SH_7751_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D)
default "0x02000000" if !MEMORY_OVERRIDE && SH_SOLUTION_ENGINE
default "0x08000000" if SH_MPC1211
default "0x01000000" if !MEMORY_OVERRIDE && SH_DREAMCAST || SH_SECUREEDGE5410 || SH_EDOSK7705
default "0x02000000" if !MEMORY_OVERRIDE && (SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE)
default "0x04000000" if !MEMORY_OVERRIDE && (SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV)
default "0x08000000" if SH_MPC1211 || SH_SH03
help
This sets the default memory size assumed by your SH kernel. It can
be overridden as normal by the 'mem=' argument on the kernel command
......@@ -328,7 +366,7 @@ config MEMORY_SIZE
config MEMORY_SET
bool
depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410 || SH_HS7751RVOIP || SH_RTS7751R2D)
depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_SH03 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410 || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_EDOSK7705)
default y
help
This is an option about which you will never be asked a question.
......@@ -343,7 +381,7 @@ config MEMORY_OVERRIDE
# XXX: break these out into the board-specific configs below
config CF_ENABLER
bool "Compact Flash Enabler support"
depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701
depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701 || SH_SH03
---help---
Compact Flash is a small, removable mass storage device introduced
in 1994 originally as a PCMCIA device. If you say `Y' here, you
......@@ -387,7 +425,7 @@ config CF_BASE_ADDR
# The SH7750 RTC module is disabled in the Dreamcast
config SH_RTC
bool
depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE
depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && !SH_73180_SOLUTION_ENGINE
default y
help
Selecting this option will allow the Linux kernel to emulate
......@@ -395,6 +433,16 @@ config SH_RTC
If unsure, say N.
config SH_FPU
bool "FPU support"
depends on !CPU_SH3
default y
help
Selecting this option will enable support for SH processors that
have FPU units (ie, SH77xx).
This option must be set in order to enable the FPU.
config SH_DSP
bool "DSP support"
depends on !CPU_SH4
......@@ -438,8 +486,8 @@ config DISCONTIGMEM
config ZERO_PAGE_OFFSET
hex "Zero page offset"
default "0x00001000" if !SH_MPC1211
default "0x00004000" if SH_MPC1211
default "0x00001000" if !(SH_MPC1211 || SH_SH03)
default "0x00004000" if SH_MPC1211 || SH_SH03
help
This sets the default offset of zero page.
......@@ -572,7 +620,7 @@ config RTS7751R2D_REV11
config SH_PCLK_CALC
bool
default n if CPU_SUBTYPE_SH7300
default n if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH73180
default y
help
This option will cause the PCLK value to be probed at run-time. It
......@@ -581,9 +629,11 @@ config SH_PCLK_CALC
config SH_PCLK_FREQ
int "Peripheral clock frequency (in Hz)"
default "49876504" if CPU_SUBTYPE_SH7750
default "60013568" if CPU_SUBTYPE_SH7751
default "50000000" if CPU_SUBTYPE_SH7750
default "60000000" if CPU_SUBTYPE_SH7751
default "33333333" if CPU_SUBTYPE_SH7300
default "27000000" if CPU_SUBTYPE_SH73180
default "66000000" if CPU_SUBTYPE_SH4_202
default "1193182"
help
This option is used to specify the peripheral clock frequency. This
......@@ -636,7 +686,7 @@ source "arch/sh/cchips/Kconfig"
config HEARTBEAT
bool "Heartbeat LED"
depends on SH_MPC1211 || SH_CAT68701 || SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_RTS7751R2D
depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_RTS7751R2D || SH_SH4202_MICRODEV
help
Use the power-on LED on your machine as a load meter. The exact
behavior is platform-dependent, but normally the flash frequency is
......@@ -662,7 +712,7 @@ menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
# PCMCIA outright. -- PFM.
config ISA
bool
default y if PCMCIA
default y if PCMCIA || SMC91X
help
Find out whether you have ISA slots on your motherboard. ISA is the
name of a bus system, i.e. the way the CPU talks to the other stuff
......@@ -711,6 +761,7 @@ source "drivers/pci/hotplug/Kconfig"
endmenu
menu "Executable file formats"
source "fs/Kconfig.binfmt"
......@@ -729,7 +780,7 @@ config EMBEDDED_RAMDISK_IMAGE
default "ramdisk.gz"
help
This is the filename of the ramdisk image to be built into the
kernel. Relative pathnames are relative to arch/mips/ramdisk/.
kernel. Relative pathnames are relative to arch/sh/ramdisk/.
The ramdisk image is not part of the kernel distribution; you must
provide one yourself.
......
......@@ -14,17 +14,6 @@
# this architecture
#
#
# We don't necessarily agree with the top-level Makefile with regards to what
# does and does not qualify as a noconfig_targets rule. In this case, we're
# still dependant on .config settings in order for core-y (machdir-y in
# particular) to resolve the proper directory. So we just manually include it
# if it hasn't been already..
#
ifndef include_config
-include .config
endif
cflags-y := -mb
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) := -ml
......@@ -76,6 +65,7 @@ core-$(CONFIG_EMBEDDED_RAMDISK) += arch/sh/ramdisk/
machdir-$(CONFIG_SH_SOLUTION_ENGINE) := se/770x
machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se/7751
machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300
machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
machdir-$(CONFIG_SH_STB1_HARP) := harp
machdir-$(CONFIG_SH_STB1_OVERDRIVE) := overdrive
machdir-$(CONFIG_SH_HP620) := hp6xx/hp620
......@@ -91,10 +81,13 @@ machdir-$(CONFIG_SH_BIGSUR) := bigsur
machdir-$(CONFIG_SH_SH2000) := sh2000
machdir-$(CONFIG_SH_ADX) := adx
machdir-$(CONFIG_SH_MPC1211) := mpc1211
machdir-$(CONFIG_SH_SH03) := sh03
machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear
machdir-$(CONFIG_SH_HS7751RVOIP) := renesas/hs7751rvoip
machdir-$(CONFIG_SH_RTS7751R2D) := renesas/rts7751r2d
machdir-$(CONFIG_SH_7751_SYSTEMH) := renesas/systemh
machdir-$(CONFIG_SH_EDOSK7705) := renesas/edosk7705
machdir-$(CONFIG_SH_SH4202_MICRODEV) := superh/microdev
machdir-$(CONFIG_SH_UNKNOWN) := unknown
incdir-y := $(notdir $(machdir-y))
......@@ -102,9 +95,12 @@ incdir-y := $(notdir $(machdir-y))
incdir-$(CONFIG_SH_SOLUTION_ENGINE) := se
incdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se7751
incdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se7300
incdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se73180
incdir-$(CONFIG_SH_HP600) := hp6xx
ifneq ($(machdir-y),)
core-y += arch/sh/boards/$(machdir-y)/
endif
# Companion chips
core-$(CONFIG_HD64461) += arch/sh/cchips/hd6446x/hd64461/
......@@ -124,23 +120,39 @@ boot := arch/sh/boot
CPPFLAGS_vmlinux.lds := -traditional
prepare: target_links
# Update machine arch and proc symlinks if something which affects
# them changed. We use .arch and .mach to indicate when they were
# updated last, otherwise make uses the target directory mtime.
.PHONY: target_links FORCE
include/asm-sh/.cpu: $(wildcard include/config/cpu/*.h) include/config/MARKER
@echo ' SYMLINK include/asm-sh/cpu -> include/asm-sh/$(cpuincdir-y)'
ifneq ($(KBUILD_SRC),)
$(Q)mkdir -p include/asm-sh
$(Q)ln -fsn $(srctree)/include/asm-sh/$(cpuincdir-y) include/asm-sh/cpu
else
$(Q)ln -fsn $(cpuincdir-y) include/asm-sh/cpu
endif
@touch $@
all: zImage
include/asm-sh/.mach: $(wildcard include/config/sh/*.h) include/config/MARKER
@echo ' SYMLINK include/asm-sh/mach -> include/asm-sh/$(incdir-y)'
ifneq ($(KBUILD_SRC),)
$(Q)mkdir -p include/asm-sh
$(Q)ln -fsn $(srctree)/include/asm-sh/$(incdir-y) include/asm-sh/mach
else
$(Q)ln -fsn $(incdir-y) include/asm-sh/mach
endif
@touch $@
target_links:
@echo ' Making asm-sh/cpu -> asm-sh/$(cpuincdir-y) link'
@rm -f include/asm-sh/cpu
@ln -sf $(cpuincdir-y) include/asm-sh/cpu
@echo ' Making asm-sh/mach -> asm-sh/$(incdir-y) link'
@rm -f include/asm-sh/mach
@ln -sf $(incdir-y) include/asm-sh/mach
prepare: maketools include/asm-sh/.cpu include/asm-sh/.mach
.PHONY: maketools FORCE
maketools: include/asm-sh/asm-offsets.h include/linux/version.h FORCE
$(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h
all: zImage
zImage: vmlinux
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
......@@ -149,6 +161,15 @@ compressed: zImage
archclean:
$(Q)$(MAKE) $(clean)=$(boot)
CLEAN_FILES += include/asm-sh/machtypes.h include/asm-sh/asm-offsets.h
arch/sh/kernel/asm-offsets.s: include/asm include/linux/version.h \
include/asm-sh/.cpu include/asm-sh/.mach
include/asm-sh/asm-offsets.h: arch/sh/kernel/asm-offsets.s
$(call filechk,gen-asm-offsets)
define archhelp
@echo ' zImage - Compressed kernel image (arch/sh/boot/zImage)'
endef
......
......@@ -24,8 +24,8 @@ extern void detect_cpu_and_cache_system(void);
* Generic wrapper for command line arguments to disable on-chip
* peripherals (nofpu, nodsp, and so forth).
*/
#define onchip_setup(x) \
static int x##_disabled __initdata = 0; \
#define onchip_setup(x) \
static int x##_disabled __initdata = 0; \
\
static int __init x##_setup(char *opts) \
{ \
......@@ -88,7 +88,7 @@ static void __init cache_init(void)
} while (--ways);
}
/*
/*
* Default CCR values .. enable the caches
* and invalidate them immediately..
*/
......@@ -160,7 +160,7 @@ static void __init dsp_init(void)
}
#endif /* CONFIG_SH_DSP */
/*
/**
* sh_cpu_init
*
* This is our initial entry point for each CPU, and is invoked on the boot
......@@ -200,7 +200,7 @@ asmlinkage void __init sh_cpu_init(void)
#ifdef CONFIG_SH_DSP
/* Probe for DSP */
dsp_init();
/* Disable the DSP */
if (dsp_disabled) {
printk("DSP Disabled\n");
......
......@@ -36,7 +36,6 @@ static spinlock_t sq_mapping_lock = SPIN_LOCK_UNLOCKED;
/**
* sq_flush - Flush (prefetch) the store queue cache
*
* @addr: the store queue address to flush
*
* Executes a prefetch instruction on the specified store queue cache,
......@@ -49,7 +48,6 @@ inline void sq_flush(void *addr)
/**
* sq_flush_range - Flush (prefetch) a specific SQ range
*
* @start: the store queue address to start flushing from
* @len: the length to flush
*
......@@ -99,7 +97,7 @@ static unsigned long __sq_get_next_addr(void)
{
if (!list_empty(&sq_mapping_list)) {
struct list_head *pos, *tmp;
/*
* Read one off the list head, as it will have the highest
* mapped allocation. Set the next one up right above it.
......@@ -126,11 +124,10 @@ static unsigned long __sq_get_next_addr(void)
/**
* __sq_remap - Perform a translation from the SQ to a phys addr
* @map: sq mapping containing phys and store queue addresses.
*
* @phys: Physical address to map store queues too.
* @virt: Associated store queue address.
*
* Maps the store queue address @virt to the physical address @phys.
* Maps the store queue address specified in the mapping to the physical
* address specified in the mapping.
*/
static struct sq_mapping *__sq_remap(struct sq_mapping *map)
{
......@@ -210,7 +207,6 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map)
/**
* sq_remap - Map a physical address through the Store Queues
*
* @phys: Physical address of mapping.
* @size: Length of mapping.
* @name: User invoking mapping.
......@@ -254,7 +250,6 @@ struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *n
/**
* sq_unmap - Unmap a Store Queue allocation
*
* @map: Pre-allocated Store Queue mapping.
*
* Unmaps the store queue allocation @map that was previously created by
......@@ -272,7 +267,6 @@ void sq_unmap(struct sq_mapping *map)
/**
* sq_clear - Clear a store queue range
*
* @addr: Address to start clearing from.
* @len: Length to clear.
*
......@@ -282,7 +276,7 @@ void sq_unmap(struct sq_mapping *map)
void sq_clear(unsigned long addr, unsigned int len)
{
int i;
/* Clear out both queues linearly */
for (i = 0; i < 8; i++) {
ctrl_outl(0, addr + i + 0);
......@@ -294,7 +288,6 @@ void sq_clear(unsigned long addr, unsigned int len)
/**
* sq_vma_unmap - Unmap a VMA range
*
* @area: VMA containing range.
* @addr: Start of range.
* @len: Length of range.
......@@ -314,25 +307,24 @@ static void sq_vma_unmap(struct vm_area_struct *area,
entry = list_entry(pos, typeof(*entry), list);
if (entry->sq_addr == addr) {
/*
/*
* We could probably get away without doing the tlb flush
* here, as generic code should take care of most of this
* when unmapping the rest of the VMA range for us. Leave
* it in for added sanity for the time being..
*/
__flush_tlb_page(get_asid(), entry->sq_addr & PAGE_MASK);
list_del(&entry->list);
kfree(entry);
return;
}
}
}
}
/**
* sq_vma_sync - Sync a VMA range
*
* @area: VMA containing range.
* @start: Start of range.
* @len: Length of range.
......@@ -359,7 +351,6 @@ static struct vm_operations_struct sq_vma_ops = {
/**
* sq_mmap - mmap() for /dev/cpu/sq
*
* @file: unused.
* @vma: VMA to remap.
*
......@@ -373,7 +364,7 @@ static int sq_mmap(struct file *file, struct vm_area_struct *vma)
unsigned long size = vma->vm_end - vma->vm_start;
struct sq_mapping *map;
/*
/*
* We're not interested in any arbitrary virtual address that has
* been stuck in the VMA, as we already know what addresses we
* want. Save off the size, and reposition the VMA to begin at
......@@ -391,7 +382,7 @@ static int sq_mmap(struct file *file, struct vm_area_struct *vma)
if (io_remap_page_range(vma, map->sq_addr, map->addr,
size, vma->vm_page_prot))
return -EAGAIN;
vma->vm_ops = &sq_vma_ops;
return 0;
......@@ -406,7 +397,7 @@ static int sq_mapping_read_proc(char *buf, char **start, off_t off,
list_for_each_prev(pos, &sq_mapping_list) {
struct sq_mapping *entry;
entry = list_entry(pos, typeof(*entry), list);
p += sprintf(p, "%08lx-%08lx [%08lx]: %s\n", entry->sq_addr,
......
/* $Id: sh_bios.c,v 1.2 2003/05/04 19:29:53 lethal Exp $
*
/*
* linux/arch/sh/kernel/sh_bios.c
* C interface for trapping into the standard LinuxSH BIOS.
*
......
......@@ -19,6 +19,7 @@
#include <asm/delay.h>
#include <asm/tlbflush.h>
#include <asm/cacheflush.h>
#include <asm/checksum.h>
extern void dump_thread(struct pt_regs *, struct user *);
extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
......@@ -86,7 +87,9 @@ EXPORT_SYMBOL(__udelay);
EXPORT_SYMBOL(__ndelay);
EXPORT_SYMBOL(__const_udelay);
#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
EXPORT_SYMBOL(__div64_32);
#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL_NOVERS(name)
/* These symbols are generated by the compiler itself */
DECLARE_EXPORT(__udivsi3);
......@@ -97,8 +100,9 @@ DECLARE_EXPORT(__ashldi3);
DECLARE_EXPORT(__lshrdi3);
DECLARE_EXPORT(__movstr);
EXPORT_SYMBOL_NOVERS(strcpy);
#ifdef CONFIG_CPU_SH4
DECLARE_EXPORT(__movstr_i4_even);
DECLARE_EXPORT(__movstr_i4_odd);
DECLARE_EXPORT(__movstrSI12_i4);
......@@ -109,6 +113,14 @@ EXPORT_SYMBOL(flush_cache_range);
EXPORT_SYMBOL(flush_dcache_page);
EXPORT_SYMBOL(__flush_purge_region);
#endif
#if defined(CONFIG_SH7705_CACHE_32KB)
EXPORT_SYMBOL(flush_cache_all);
EXPORT_SYMBOL(flush_cache_range);
EXPORT_SYMBOL(flush_dcache_page);
EXPORT_SYMBOL(__flush_purge_region);
#endif
EXPORT_SYMBOL(flush_tlb_page);
EXPORT_SYMBOL(__down_trylock);
......@@ -117,4 +129,6 @@ EXPORT_SYMBOL(synchronize_irq);
#endif
EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(csum_ipv6_magic);
EXPORT_SYMBOL(consistent_sync);
EXPORT_SYMBOL(clear_page);
/* $Id: time.c,v 1.21 2004/04/21 00:09:15 lethal Exp $
*
* linux/arch/sh/kernel/time.c
/*
* arch/sh/kernel/time.c
*
* Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
......@@ -96,8 +95,8 @@ EXPORT_SYMBOL(jiffies_64);
void (*rtc_get_time)(struct timespec *) = sh_rtc_gettimeofday;
int (*rtc_set_time)(const time_t) = sh_rtc_settimeofday;
#else
void (*rtc_get_time)(struct timespec *) = 0;
int (*rtc_set_time)(const time_t) = 0;
void (*rtc_get_time)(struct timespec *);
int (*rtc_set_time)(const time_t);
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7300)
......@@ -113,12 +112,21 @@ static int ifc_values[] = { 0, 1, 4, 2, 0, 0, 0, 0 };
static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
static int pfc_values[] = { 0, 1, 4, 2, 5, 0, 0, 0 };
#elif defined(CONFIG_CPU_SH4)
#if defined(CONFIG_CPU_SUBTYPE_SH73180)
static int ifc_divisors[] = { 1, 2, 3, 4, 6, 8, 12, 16 };
static int ifc_values[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
#define bfc_divisors ifc_divisors /* Same */
#define bfc_values ifc_values
#define pfc_divisors ifc_divisors /* Same */
#define pfc_values ifc_values
#else
static int ifc_divisors[] = { 1, 2, 3, 4, 6, 8, 1, 1 };
static int ifc_values[] = { 0, 1, 2, 3, 0, 4, 0, 5 };
#define bfc_divisors ifc_divisors /* Same */
#define bfc_values ifc_values
static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 };
static int pfc_values[] = { 0, 0, 1, 2, 0, 3, 0, 4 };
#endif
#else
#error "Unknown ifc/bfc/pfc/stc values for this processor"
#endif
......@@ -140,7 +148,7 @@ static unsigned long do_gettimeoffset(void)
static unsigned long jiffies_p = 0;
/*
* cache volatile jiffies temporarily; we have IRQs turned off.
* cache volatile jiffies temporarily; we have IRQs turned off.
*/
unsigned long jiffies_t;
......@@ -148,7 +156,7 @@ static unsigned long do_gettimeoffset(void)
/* timer count may underflow right here */
count = ctrl_inl(TMU0_TCNT); /* read the latched count */
jiffies_t = jiffies;
jiffies_t = jiffies;
/*
* avoiding timer inconsistencies (they are rare, but they happen)...
......@@ -162,7 +170,7 @@ static unsigned long do_gettimeoffset(void)
if(ctrl_inw(TMU0_TCR) & 0x100) { /* Check UNF bit */
/*
* We cannot detect lost timer interrupts ...
* We cannot detect lost timer interrupts ...
* well, that's why we call them lost, don't we? :)
* [hmm, on the Pentium and Alpha we can ... sort of]
*/
......@@ -192,7 +200,7 @@ void do_gettimeofday(struct timeval *tv)
do {
seq = read_seqbegin(&xtime_lock);
usec = do_gettimeoffset();
lost = jiffies - wall_jiffies;
if (lost)
usec += lost * (1000000 / HZ);
......@@ -363,8 +371,8 @@ static unsigned int __init get_timer_frequency(void)
return freq * factor;
}
void (*board_time_init)(void) = 0;
void (*board_timer_setup)(struct irqaction *irq) = 0;
void (*board_time_init)(void);
void (*board_timer_setup)(struct irqaction *irq);
static unsigned int sh_pclk_freq __initdata = CONFIG_SH_PCLK_FREQ;
......@@ -408,10 +416,16 @@ void get_current_frequency_divisors(unsigned int *ifc, unsigned int *bfc, unsign
*pfc = pfc_divisors[tmp];
#endif
#elif defined(CONFIG_CPU_SH4)
#if defined(CONFIG_CPU_SUBTYPE_SH73180)
*ifc = ifc_divisors[(frqcr>> 20) & 0x0007];
*bfc = bfc_divisors[(frqcr>> 12) & 0x0007];
*pfc = pfc_divisors[frqcr & 0x0007];
#else
*ifc = ifc_divisors[(frqcr >> 6) & 0x0007];
*bfc = bfc_divisors[(frqcr >> 3) & 0x0007];
*pfc = pfc_divisors[frqcr & 0x0007];
#endif
#endif
}
/*
......@@ -419,7 +433,7 @@ void get_current_frequency_divisors(unsigned int *ifc, unsigned int *bfc, unsign
* the divisors and the physical values.
*/
#define _FREQ_TABLE(x) \
unsigned int get_##x##_divisor(unsigned int value) \
unsigned int get_##x##_divisor(unsigned int value) \
{ return x##_divisors[value]; } \
\
unsigned int get_##x##_value(unsigned int divisor) \
......@@ -431,109 +445,120 @@ _FREQ_TABLE(pfc);
#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
/* The ST40 divisors are totally different so we set the cpu data
** clocks using a different algorithm
**
** I've just plugged this from the 2.4 code - Alex Bennee <kernel-hacker@bennee.com>
*/
/*
* The ST40 divisors are totally different so we set the cpu data
* clocks using a different algorithm
*
* I've just plugged this from the 2.4 code
* - Alex Bennee <kernel-hacker@bennee.com>
*/
#define CCN_PVR_CHIP_SHIFT 24
#define CCN_PVR_CHIP_MASK 0xff
#define CCN_PVR_CHIP_ST40STB1 0x4
struct frqcr_data {
unsigned short frqcr;
struct {
unsigned char multiplier;
unsigned char divisor;
} factor[3];
unsigned short frqcr;
struct {
unsigned char multiplier;
unsigned char divisor;
} factor[3];
};
static struct frqcr_data st40_frqcr_table[] = {
{ 0x000, {{1,1}, {1,1}, {1,2}}},
{ 0x002, {{1,1}, {1,1}, {1,4}}},
{ 0x004, {{1,1}, {1,1}, {1,8}}},
{ 0x008, {{1,1}, {1,2}, {1,2}}},
{ 0x00A, {{1,1}, {1,2}, {1,4}}},
{ 0x00C, {{1,1}, {1,2}, {1,8}}},
{ 0x011, {{1,1}, {2,3}, {1,6}}},
{ 0x013, {{1,1}, {2,3}, {1,3}}},
{ 0x01A, {{1,1}, {1,2}, {1,4}}},
{ 0x01C, {{1,1}, {1,2}, {1,8}}},
{ 0x023, {{1,1}, {2,3}, {1,3}}},
{ 0x02C, {{1,1}, {1,2}, {1,8}}},
{ 0x048, {{1,2}, {1,2}, {1,4}}},
{ 0x04A, {{1,2}, {1,2}, {1,6}}},
{ 0x04C, {{1,2}, {1,2}, {1,8}}},
{ 0x05A, {{1,2}, {1,3}, {1,6}}},
{ 0x05C, {{1,2}, {1,3}, {1,6}}},
{ 0x063, {{1,2}, {1,4}, {1,4}}},
{ 0x06C, {{1,2}, {1,4}, {1,8}}},
{ 0x091, {{1,3}, {1,3}, {1,6}}},
{ 0x093, {{1,3}, {1,3}, {1,6}}},
{ 0x0A3, {{1,3}, {1,6}, {1,6}}},
{ 0x0DA, {{1,4}, {1,4}, {1,8}}},
{ 0x0DC, {{1,4}, {1,4}, {1,8}}},
{ 0x0EC, {{1,4}, {1,8}, {1,8}}},
{ 0x123, {{1,4}, {1,4}, {1,8}}},
{ 0x16C, {{1,4}, {1,8}, {1,8}}},
{ 0x000, {{1,1}, {1,1}, {1,2}}},
{ 0x002, {{1,1}, {1,1}, {1,4}}},
{ 0x004, {{1,1}, {1,1}, {1,8}}},
{ 0x008, {{1,1}, {1,2}, {1,2}}},
{ 0x00A, {{1,1}, {1,2}, {1,4}}},
{ 0x00C, {{1,1}, {1,2}, {1,8}}},
{ 0x011, {{1,1}, {2,3}, {1,6}}},
{ 0x013, {{1,1}, {2,3}, {1,3}}},
{ 0x01A, {{1,1}, {1,2}, {1,4}}},
{ 0x01C, {{1,1}, {1,2}, {1,8}}},
{ 0x023, {{1,1}, {2,3}, {1,3}}},
{ 0x02C, {{1,1}, {1,2}, {1,8}}},
{ 0x048, {{1,2}, {1,2}, {1,4}}},
{ 0x04A, {{1,2}, {1,2}, {1,6}}},
{ 0x04C, {{1,2}, {1,2}, {1,8}}},
{ 0x05A, {{1,2}, {1,3}, {1,6}}},
{ 0x05C, {{1,2}, {1,3}, {1,6}}},
{ 0x063, {{1,2}, {1,4}, {1,4}}},
{ 0x06C, {{1,2}, {1,4}, {1,8}}},
{ 0x091, {{1,3}, {1,3}, {1,6}}},
{ 0x093, {{1,3}, {1,3}, {1,6}}},
{ 0x0A3, {{1,3}, {1,6}, {1,6}}},
{ 0x0DA, {{1,4}, {1,4}, {1,8}}},
{ 0x0DC, {{1,4}, {1,4}, {1,8}}},
{ 0x0EC, {{1,4}, {1,8}, {1,8}}},
{ 0x123, {{1,4}, {1,4}, {1,8}}},
{ 0x16C, {{1,4}, {1,8}, {1,8}}},
};
struct memclk_data {
unsigned char multiplier;
unsigned char divisor;
unsigned char multiplier;
unsigned char divisor;
};
static struct memclk_data st40_memclk_table[8] = {
{1,1}, // 000
{1,2}, // 001
{1,3}, // 010
{2,3}, // 011
{1,4}, // 100
{1,6}, // 101
{1,8}, // 110
{1,8} // 111
{1,1}, // 000
{1,2}, // 001
{1,3}, // 010
{2,3}, // 011
{1,4}, // 100
{1,6}, // 101
{1,8}, // 110
{1,8} // 111
};
static void st40_specific_time_init(unsigned int module_clock, unsigned short frqcr)
{
unsigned int cpu_clock, master_clock, bus_clock, memory_clock;
struct frqcr_data *d;
int a;
unsigned long memclkcr;
struct memclk_data *e;
for (a=0; a<ARRAY_SIZE(st40_frqcr_table); a++) {
d = &st40_frqcr_table[a];
if (d->frqcr == (frqcr & 0x1ff))
break;
}
if (a == ARRAY_SIZE(st40_frqcr_table)) {
d = st40_frqcr_table;
printk("ERROR: Unrecognised FRQCR value (0x%x), using default multipliers\n",frqcr);
}
memclkcr = ctrl_inl(CLOCKGEN_MEMCLKCR);
e = &st40_memclk_table[memclkcr & MEMCLKCR_RATIO_MASK];
printk("Clock multipliers: CPU: %d/%d Bus: %d/%d Mem: %d/%d Periph: %d/%d\n",
d->factor[0].multiplier, d->factor[0].divisor,
d->factor[1].multiplier, d->factor[1].divisor,
e->multiplier, e->divisor,
d->factor[2].multiplier, d->factor[2].divisor);
master_clock = module_clock * d->factor[2].divisor / d->factor[2].multiplier;
bus_clock = master_clock * d->factor[1].multiplier / d->factor[1].divisor;
memory_clock = master_clock * e->multiplier / e->divisor;
cpu_clock = master_clock * d->factor[0].multiplier / d->factor[0].divisor;
current_cpu_data.cpu_clock = cpu_clock;
current_cpu_data.master_clock = master_clock;
current_cpu_data.bus_clock = bus_clock;
current_cpu_data.memory_clock = memory_clock;
current_cpu_data.module_clock = module_clock;
unsigned int cpu_clock, master_clock, bus_clock, memory_clock;
struct frqcr_data *d;
int a;
unsigned long memclkcr;
struct memclk_data *e;
}
for (a = 0; a < ARRAY_SIZE(st40_frqcr_table); a++) {
d = &st40_frqcr_table[a];
if (d->frqcr == (frqcr & 0x1ff))
break;
}
if (a == ARRAY_SIZE(st40_frqcr_table)) {
d = st40_frqcr_table;
printk("ERROR: Unrecognised FRQCR value (0x%x), "
"using default multipliers\n", frqcr);
}
memclkcr = ctrl_inl(CLOCKGEN_MEMCLKCR);
e = &st40_memclk_table[memclkcr & MEMCLKCR_RATIO_MASK];
printk(KERN_INFO "Clock multipliers: CPU: %d/%d Bus: %d/%d "
"Mem: %d/%d Periph: %d/%d\n",
d->factor[0].multiplier, d->factor[0].divisor,
d->factor[1].multiplier, d->factor[1].divisor,
e->multiplier, e->divisor,
d->factor[2].multiplier, d->factor[2].divisor);
master_clock = module_clock * d->factor[2].divisor
/ d->factor[2].multiplier;
bus_clock = master_clock * d->factor[1].multiplier
/ d->factor[1].divisor;
memory_clock = master_clock * e->multiplier
/ e->divisor;
cpu_clock = master_clock * d->factor[0].multiplier
/ d->factor[0].divisor;
current_cpu_data.cpu_clock = cpu_clock;
current_cpu_data.master_clock = master_clock;
current_cpu_data.bus_clock = bus_clock;
current_cpu_data.memory_clock = memory_clock;
current_cpu_data.module_clock = module_clock;
}
#endif
void __init time_init(void)
......@@ -549,7 +574,6 @@ void __init time_init(void)
if (board_time_init)
board_time_init();
/*
* If we don't have an RTC (such as with the SH7300), don't attempt to
* probe the timer frequency. Rely on an either hardcoded peripheral
......@@ -564,15 +588,10 @@ void __init time_init(void)
{
unsigned int freq;
/*
/*
* If we've specified a peripheral clock frequency, and we have
* an RTC, compare it against the autodetected value. Complain
* if there's a mismatch.
*
* Note: We should allow for some high and low watermarks for
* the frequency here (compensating for potential drift), as
* otherwise we'll likely end up triggering this essentially
* on every boot.
*/
timer_freq = get_timer_frequency();
freq = timer_freq * 4;
......@@ -587,20 +606,22 @@ void __init time_init(void)
#endif
#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
/* XXX: Update ST40 code to use board_time_init() */
pvr = ctrl_inl(CCN_PVR);
frqcr = ctrl_inw(FRQCR);
printk("time.c ST40 Probe: PVR %08lx, FRQCR %04hx\n", pvr, frqcr);
if (((pvr >>CCN_PVR_CHIP_SHIFT) & CCN_PVR_CHIP_MASK) == CCN_PVR_CHIP_ST40STB1)
st40_specific_time_init(current_cpu_data.module_clock, frqcr);
if (((pvr >> CCN_PVR_CHIP_SHIFT) & CCN_PVR_CHIP_MASK) == CCN_PVR_CHIP_ST40STB1)
st40_specific_time_init(current_cpu_data.module_clock, frqcr);
else
#endif
get_current_frequency_divisors(&ifc, &bfc, &pfc);
get_current_frequency_divisors(&ifc, &bfc, &pfc);
if (rtc_get_time)
if (rtc_get_time) {
rtc_get_time(&xtime);
else {
xtime.tv_sec = mktime(2000, 1, 1, 0, 0, 0);
xtime.tv_nsec = 0;
} else {
xtime.tv_sec = mktime(2000, 1, 1, 0, 0, 0);
xtime.tv_nsec = 0;
}
set_normalized_timespec(&wall_to_monotonic,
......@@ -613,9 +634,9 @@ void __init time_init(void)
}
/*
** for ST40 chips the current_cpu_data should already be set
** so not having valid pfc/bfc/ifc shouldn't be a problem
*/
* for ST40 chips the current_cpu_data should already be set
* so not having valid pfc/bfc/ifc shouldn't be a problem
*/
if (!current_cpu_data.master_clock)
current_cpu_data.master_clock = current_cpu_data.module_clock * pfc;
if (!current_cpu_data.bus_clock)
......@@ -637,11 +658,8 @@ void __init time_init(void)
printk("Module clock: %d.%02dMHz\n",
(current_cpu_data.module_clock / 1000000),
(current_cpu_data.module_clock % 1000000)/10000);
#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D)
interval = ((current_cpu_data.module_clock/4 + HZ/2) / HZ) - 1;
#else
interval = (current_cpu_data.module_clock/4 + HZ/2) / HZ;
#endif
printk("Interval = %ld\n", interval);
......
/* $Id: extable.c,v 1.3 2003/05/06 23:28:50 lethal Exp $
*
/*
* linux/arch/sh/mm/extable.c
* Taken from:
* linux/arch/i386/mm/extable.c
......
/* $Id: ioremap.c,v 1.9 2004/02/25 04:59:10 lethal Exp $
*
/*
* arch/sh/mm/ioremap.c
*
* Re-map IO memory to kernel address space so that we can access it.
......
......@@ -10,7 +10,6 @@
# Shamelessly cloned from ARM.
#
include/asm-sh/machtypes.h: $(obj)/machgen.sh $(obj)/mach-types
include/asm-sh/machtypes.h: $(src)/gen-mach-types $(src)/mach-types
@echo ' Generating $@'
@$(CONFIG_SHELL) $(obj)/machgen.sh $(obj)/mach-types > $@
$(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; }
#!/bin/awk
#
# Awk script to generate include/asm-sh/machtypes.h
# Heavily based on arch/arm/tools/gen-mach-types
#
BEGIN { nr = 0 }
/^#/ { next }
/^[ ]*$/ { next }
NF == 2 {
mach[nr] = $1;
config[nr] = "CONFIG_"$2;
nr++;
}
END {
printf("/*\n");
printf(" * Automagically generated, don't touch.\n");
printf(" */\n");
printf("#ifndef __ASM_SH_MACHTYPES_H\n");
printf("#define __ASM_SH_MACHTYPES_H\n");
printf("\n");
printf("#include <linux/config.h>\n");
printf("\n");
printf("/*\n");
printf(" * We'll use the following MACH_xxx defs for placeholders for the time\n");
printf(" * being .. these will all go away once sh_machtype is assigned per-board.\n");
printf(" *\n");
printf(" * For now we leave things the way they are for backwards compatibility.\n");
printf(" */\n");
printf("\n");
printf("/* Mach types */\n");
for (i = 0; i < nr; i++) {
printf("#ifdef %s\n", config[i]);
printf(" #define MACH_%s\t\t1\n", mach[i]);
printf("#else\n");
printf(" #define MACH_%s\t\t0\n", mach[i]);
printf("#endif\n");
}
printf("\n");
printf("/* Machtype checks */\n");
for (i = 0; i < nr; i++)
printf("#define mach_is_%s()\t\t\t(MACH_%s)\n",
tolower(mach[i]), mach[i]);
printf("\n");
printf("#endif /* __ASM_SH_MACHTYPES_H */\n");
}
......@@ -8,6 +8,7 @@
SE SH_SOLUTION_ENGINE
7751SE SH_7751_SOLUTION_ENGINE
7300SE SH_7300_SOLUTION_ENGINE
73180SE SH_73180_SOLUTION_ENGINE
7751SYSTEMH SH_7751_SYSTEMH
HP600 SH_HP600
HP620 SH_HP620
......@@ -24,4 +25,7 @@ MPC1211 SH_MPC1211
SNAPGEAR SH_SECUREEDGE5410
HS7751RVOIP SH_HS7751RVOIP
RTS7751R2D SH_RTS7751R2D
EDOSK7705 SH_EDOSK7705
SH4202_MICRODEV SH_SH4202_MICRODEV
SH03 SH_SH03
#ifndef __ASM_ADC_H
#define __ASM_ADC_H
#ifdef __KERNEL__
/*
* Copyright (C) 2004 Andriy Skulysh
*/
......@@ -9,4 +9,5 @@
int adc_single(unsigned int channel);
#endif /* __KERNEL__ */
#endif /* __ASM_ADC_H */
......@@ -9,6 +9,7 @@
*/
#ifndef __ASM_SH_ADDRSPACE_H
#define __ASM_SH_ADDRSPACE_H
#ifdef __KERNEL__
#include <asm/cpu/addrspace.h>
......@@ -33,4 +34,5 @@
#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
#endif /* __KERNEL__ */
#endif /* __ASM_SH_ADDRSPACE_H */
......@@ -212,7 +212,7 @@ static __inline__ unsigned long __ffs(unsigned long word)
* @offset: The bitnumber to start searching at
* @size: The maximum size to search
*/
static __inline__ unsigned long find_next_bit(unsigned long *addr,
static __inline__ unsigned long find_next_bit(const unsigned long *addr,
unsigned long size, unsigned long offset)
{
unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
......
......@@ -21,7 +21,7 @@ static void __init check_bugs(void)
char *p= &system_utsname.machine[2]; /* "sh" */
cpu_data->loops_per_jiffy = loops_per_jiffy;
switch (cpu_data->type) {
case CPU_SH7604:
*p++ = '2';
......@@ -29,7 +29,7 @@ static void __init check_bugs(void)
case CPU_SH7705 ... CPU_SH7300:
*p++ = '3';
break;
case CPU_SH7750 ... CPU_ST40GX1:
case CPU_SH7750 ... CPU_SH4_501:
*p++ = '4';
break;
default:
......
/* $Id: cache.h,v 1.5 2003/07/16 04:08:29 lethal Exp $
/* $Id: cache.h,v 1.6 2004/03/11 18:08:05 lethal Exp $
*
* include/asm-sh/cache.h
*
......@@ -7,6 +7,7 @@
*/
#ifndef __ASM_SH_CACHE_H
#define __ASM_SH_CACHE_H
#ifdef __KERNEL__
#include <asm/cpu/cache.h>
#include <asm/cpu/cacheflush.h>
......@@ -43,5 +44,5 @@ extern void __flush_purge_region(void *start, int size);
/* Flush (invalidate only) a region (smaller than a page) */
extern void __flush_invalidate_region(void *start, int size);
#endif /* __KERNEL__ */
#endif /* __ASM_SH_CACHE_H */
......@@ -10,6 +10,7 @@
*/
#include <linux/config.h>
#include <linux/in6.h>
/*
* computes the checksum of a memory block at buff, length len,
......@@ -159,7 +160,6 @@ static __inline__ unsigned short ip_compute_csum(unsigned char * buff, int len)
}
#define _HAVE_ARCH_IPV6_CSUM
#ifdef CONFIG_IPV6
static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr,
struct in6_addr *daddr,
__u32 len,
......@@ -195,7 +195,6 @@ static __inline__ unsigned short int csum_ipv6_magic(struct in6_addr *saddr,
return csum_fold(sum);
}
#endif
/*
* Copy and checksum to user
......
......@@ -9,6 +9,7 @@
*/
#ifndef __ASM_SH_DMA_H
#define __ASM_SH_DMA_H
#ifdef __KERNEL__
#include <linux/config.h>
#include <linux/spinlock.h>
......@@ -138,4 +139,5 @@ extern int isa_dma_bridge_buggy;
#define isa_dma_bridge_buggy (0)
#endif
#endif /* __KERNEL__ */
#endif /* __ASM_SH_DMA_H */
......@@ -10,6 +10,7 @@
*/
#ifndef __ASM_SH_FREQ_H
#define __ASM_SH_FREQ_H
#ifdef __KERNEL__
#include <asm/cpu/freq.h>
......@@ -24,5 +25,5 @@ extern unsigned int get_ifc_value(unsigned int divisor);
extern unsigned int get_pfc_value(unsigned int divisor);
extern unsigned int get_bfc_value(unsigned int divisor);
#endif /* __KERNEL__ */
#endif /* __ASM_SH_FREQ_H */
......@@ -218,7 +218,7 @@
#define IRDA_IPR_POS 2
#define IRDA_PRIORITY 3
#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || \
defined(CONFIG_CPU_SUBTYPE_ST40STB1)
defined(CONFIG_CPU_SUBTYPE_ST40STB1) || defined(CONFIG_CPU_SUBTYPE_SH4_202)
#define SCIF_ERI_IRQ 40
#define SCIF_RXI_IRQ 41
#define SCIF_BRI_IRQ 42
......@@ -264,6 +264,8 @@
# define ONCHIP_NR_IRQS 72
# elif defined(CONFIG_CPU_SUBTYPE_SH7760)
# define ONCHIP_NR_IRQS 110
# elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
# define ONCHIP_NR_IRQS 72
# elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
# define ONCHIP_NR_IRQS 144
# elif defined(CONFIG_CPU_SUBTYPE_SH7300)
......@@ -545,7 +547,7 @@ extern int ipr_irq_demux(int irq);
#endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 */
#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || \
defined(CONFIG_CPU_SUBTYPE_ST40STB1)
defined(CONFIG_CPU_SUBTYPE_ST40STB1) || defined(CONFIG_CPU_SUBTYPE_SH4_202)
#define INTC_ICR 0xffd00000
#define INTC_ICR_NMIL (1<<15)
#define INTC_ICR_MAI (1<<14)
......@@ -555,21 +557,26 @@ extern int ipr_irq_demux(int irq);
#endif
#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
#define INTC2_FIRST_IRQ 64
#define NR_INTC2_IRQS 25
#define INTC2_BASE0 0xfe080000
#define INTC2_INTC2MODE (INTC2_BASE0+0x80)
#define INTC2_BASE 0xfe080000
#define INTC2_INTC2MODE (INTC2_BASE+0x80)
#define INTC2_INTPRI_OFFSET 0x00
#define INTC2_INTREQ_OFFSET 0x20
#define INTC2_INTMSK_OFFSET 0x40
#define INTC2_INTMSKCLR_OFFSET 0x60
extern void make_intc2_irq(unsigned int irq,unsigned int addr,
unsigned int group,int pos,int priority);
void make_intc2_irq(unsigned int irq,
unsigned int ipr_offset, unsigned int ipr_shift,
unsigned int msk_offset, unsigned int msk_shift,
unsigned int priority);
void init_IRQ_intc2(void);
void intc2_add_clear_irq(int irq, int (*fn)(int));
#endif
#endif /* CONFIG_CPU_SUBTYPE_ST40STB1 */
static inline int generic_irq_demux(int irq)
{
......@@ -583,4 +590,8 @@ struct irqaction;
struct pt_regs;
int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
#if defined(CONFIG_CPU_SUBTYPE_SH73180)
#include <asm/irq-sh73180.h>
#endif
#endif /* __ASM_SH_IRQ_H */
......@@ -6,6 +6,7 @@
*/
#ifndef __ASM_SH_MMU_CONTEXT_H
#define __ASM_SH_MMU_CONTEXT_H
#ifdef __KERNEL__
#include <asm/cpu/mmu_context.h>
#include <asm/tlbflush.h>
......@@ -201,4 +202,5 @@ static inline void disable_mmu(void)
#define disable_mmu() do { BUG(); } while (0)
#endif
#endif /* __KERNEL__ */
#endif /* __ASM_SH_MMU_CONTEXT_H */
#ifndef _ASM_RTC_H
#define _ASM_RTC_H
#ifdef __KERNEL__
#include <asm/machvec.h>
#include <asm/cpu/rtc.h>
......@@ -24,5 +25,5 @@ extern int (*rtc_set_time)(const time_t);
#define RCR2_RESET 0x02 /* Reset bit */
#define RCR2_START 0x01 /* Start bit */
#endif /* __KERNEL__ */
#endif /* _ASM_RTC_H */
#ifndef __ASM_SH_SHMPARAM_H
#define __ASM_SH_SHMPARAM_H
#ifdef __KERNEL__
#include <asm/cpu/shmparam.h>
#endif /* __KERNEL__ */
#endif /* __ASM_SH_SHMPARAM_H */
......@@ -10,6 +10,7 @@
*/
#ifndef __ASM_SH_UBC_H
#define __ASM_SH_UBC_H
#ifdef __KERNEL__
#include <asm/cpu/ubc.h>
......@@ -55,5 +56,5 @@ extern void ubc_wakeup(void);
extern void ubc_sleep(void);
#endif
#endif /* __KERNEL__ */
#endif /* __ASM_SH_UBC_H */
......@@ -464,7 +464,6 @@ static __inline__ _syscall1(int,dup,int,fd)
static __inline__ _syscall3(int,execve,const char *,file,char **,argv,char **,envp)
static __inline__ _syscall3(int,open,const char *,file,int,flag,int,mode)
static __inline__ _syscall1(int,close,int,fd)
static __inline__ _syscall1(int,_exit,int,exitcode)
static __inline__ _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options)
static __inline__ _syscall1(int,delete_module,const char *,name)
......
#ifndef __ASM_SH_USER_H
#define __ASM_SH_USER_H
#include <linux/types.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/page.h>
......
......@@ -10,6 +10,7 @@
*/
#ifndef __ASM_SH_WATCHDOG_H
#define __ASM_SH_WATCHDOG_H
#ifdef __KERNEL__
#include <linux/types.h>
#include <linux/config.h>
......@@ -106,5 +107,5 @@ static inline void sh_wdt_write_csr(__u8 val)
ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR);
}
#endif /* __KERNEL__ */
#endif /* __ASM_SH_WATCHDOG_H */
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