Commit 4c10794f authored by Daniel Vetter's avatar Daniel Vetter

drm/i915: Move fb pinning into __intel_set_mode

Our two ->crtc_mode_set callbacks really don't care whether the fb is
pinned and set up already or not - all the state computation and
handling which originally looked at the framebuffer is already using
the indirection through the pipe configuration.

Eventually we want to move this up a bit more, but as long as the crtc
mode_set callback still exists (and as long as we don't need to pin an
entire pile of planes due to atomic modesets) there's not much point
in it. So I'll let this be for now.

v2: Don't forget about haswell ...
Reviewed-by: default avatarAkash Goel <akash.goel@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c8f7a0db
...@@ -5771,8 +5771,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, ...@@ -5771,8 +5771,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
bool is_lvds = false, is_dsi = false; bool is_lvds = false, is_dsi = false;
struct intel_encoder *encoder; struct intel_encoder *encoder;
const intel_limit_t *limit; const intel_limit_t *limit;
struct drm_framebuffer *old_fb;
int ret;
for_each_encoder_on_crtc(dev, crtc, encoder) { for_each_encoder_on_crtc(dev, crtc, encoder) {
switch (encoder->type) { switch (encoder->type) {
...@@ -5872,26 +5870,8 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, ...@@ -5872,26 +5870,8 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
I915_WRITE(DSPCNTR(plane), dspcntr); I915_WRITE(DSPCNTR(plane), dspcntr);
POSTING_READ(DSPCNTR(plane)); POSTING_READ(DSPCNTR(plane));
mutex_lock(&dev->struct_mutex);
ret = intel_pin_and_fence_fb_obj(dev,
to_intel_framebuffer(fb)->obj,
NULL);
if (ret != 0) {
DRM_ERROR("pin & fence failed\n");
mutex_unlock(&dev->struct_mutex);
return ret;
}
old_fb = crtc->primary->fb;
if (old_fb)
intel_unpin_fb_obj(to_intel_framebuffer(old_fb)->obj);
mutex_unlock(&dev->struct_mutex);
dev_priv->display.update_primary_plane(crtc, fb, x, y); dev_priv->display.update_primary_plane(crtc, fb, x, y);
crtc->primary->fb = fb;
crtc->x = x;
crtc->y = y;
return 0; return 0;
} }
...@@ -6828,8 +6808,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, ...@@ -6828,8 +6808,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
bool is_lvds = false; bool is_lvds = false;
struct intel_encoder *encoder; struct intel_encoder *encoder;
struct intel_shared_dpll *pll; struct intel_shared_dpll *pll;
struct drm_framebuffer *old_fb;
int ret;
for_each_encoder_on_crtc(dev, crtc, encoder) { for_each_encoder_on_crtc(dev, crtc, encoder) {
switch (encoder->type) { switch (encoder->type) {
...@@ -6906,26 +6884,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, ...@@ -6906,26 +6884,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE); I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE);
POSTING_READ(DSPCNTR(plane)); POSTING_READ(DSPCNTR(plane));
mutex_lock(&dev->struct_mutex);
ret = intel_pin_and_fence_fb_obj(dev,
to_intel_framebuffer(fb)->obj,
NULL);
if (ret != 0) {
DRM_ERROR("pin & fence failed\n");
mutex_unlock(&dev->struct_mutex);
return ret;
}
old_fb = crtc->primary->fb;
if (old_fb)
intel_unpin_fb_obj(to_intel_framebuffer(old_fb)->obj);
mutex_unlock(&dev->struct_mutex);
dev_priv->display.update_primary_plane(crtc, fb, x, y); dev_priv->display.update_primary_plane(crtc, fb, x, y);
crtc->primary->fb = fb;
crtc->x = x;
crtc->y = y;
return 0; return 0;
} }
...@@ -7396,8 +7356,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, ...@@ -7396,8 +7356,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int plane = intel_crtc->plane; int plane = intel_crtc->plane;
struct drm_framebuffer *old_fb;
int ret;
if (!intel_ddi_pll_select(intel_crtc)) if (!intel_ddi_pll_select(intel_crtc))
return -EINVAL; return -EINVAL;
...@@ -7423,26 +7381,8 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, ...@@ -7423,26 +7381,8 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE | DISPPLANE_PIPE_CSC_ENABLE); I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE | DISPPLANE_PIPE_CSC_ENABLE);
POSTING_READ(DSPCNTR(plane)); POSTING_READ(DSPCNTR(plane));
mutex_lock(&dev->struct_mutex);
ret = intel_pin_and_fence_fb_obj(dev,
to_intel_framebuffer(fb)->obj,
NULL);
if (ret != 0) {
DRM_ERROR("pin & fence failed\n");
mutex_unlock(&dev->struct_mutex);
return ret;
}
old_fb = crtc->primary->fb;
if (old_fb)
intel_unpin_fb_obj(to_intel_framebuffer(old_fb)->obj);
mutex_unlock(&dev->struct_mutex);
dev_priv->display.update_primary_plane(crtc, fb, x, y); dev_priv->display.update_primary_plane(crtc, fb, x, y);
crtc->primary->fb = fb;
crtc->x = x;
crtc->y = y;
return 0; return 0;
} }
...@@ -10280,6 +10220,26 @@ static int __intel_set_mode(struct drm_crtc *crtc, ...@@ -10280,6 +10220,26 @@ static int __intel_set_mode(struct drm_crtc *crtc,
* on the DPLL. * on the DPLL.
*/ */
for_each_intel_crtc_masked(dev, modeset_pipes, intel_crtc) { for_each_intel_crtc_masked(dev, modeset_pipes, intel_crtc) {
struct drm_framebuffer *old_fb;
mutex_lock(&dev->struct_mutex);
ret = intel_pin_and_fence_fb_obj(dev,
to_intel_framebuffer(fb)->obj,
NULL);
if (ret != 0) {
DRM_ERROR("pin & fence failed\n");
mutex_unlock(&dev->struct_mutex);
goto done;
}
old_fb = crtc->primary->fb;
if (old_fb)
intel_unpin_fb_obj(to_intel_framebuffer(old_fb)->obj);
mutex_unlock(&dev->struct_mutex);
crtc->primary->fb = fb;
crtc->x = x;
crtc->y = y;
ret = dev_priv->display.crtc_mode_set(&intel_crtc->base, ret = dev_priv->display.crtc_mode_set(&intel_crtc->base,
x, y, fb); x, y, fb);
if (ret) if (ret)
......
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