Commit 4fe2f76d authored by Kumar Gala's avatar Kumar Gala Committed by Linus Torvalds

[PATCH] ppc32: dded MPC8555/8541 security block infrastructure

This patch adds OCP, interrupt, and memory offset details for the security
block on MPC8555/8541 to support drivers.
Signed-off-by: default avatarKumar Gala <kumar.gala@freescale.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 72426954
...@@ -76,6 +76,13 @@ struct ocp_def core_ocp[] = { ...@@ -76,6 +76,13 @@ struct ocp_def core_ocp[] = {
.irq = MPC85xx_IRQ_DMA0, .irq = MPC85xx_IRQ_DMA0,
.pm = OCP_CPM_NA, .pm = OCP_CPM_NA,
}, },
{ .vendor = OCP_VENDOR_FREESCALE,
.function = OCP_FUNC_SEC2,
.index = 0,
.paddr = MPC85xx_SEC2_OFFSET,
.irq = MPC85xx_IRQ_SEC2,
.pm = OCP_CPM_NA,
},
{ .vendor = OCP_VENDOR_FREESCALE, { .vendor = OCP_VENDOR_FREESCALE,
.function = OCP_FUNC_PERFMON, .function = OCP_FUNC_PERFMON,
.index = 0, .index = 0,
......
...@@ -81,6 +81,7 @@ extern unsigned char __res[]; ...@@ -81,6 +81,7 @@ extern unsigned char __res[];
#define MPC85xx_IRQ_DUART (26 + MPC85xx_OPENPIC_IRQ_OFFSET) #define MPC85xx_IRQ_DUART (26 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_IIC1 (27 + MPC85xx_OPENPIC_IRQ_OFFSET) #define MPC85xx_IRQ_IIC1 (27 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_PERFMON (28 + MPC85xx_OPENPIC_IRQ_OFFSET) #define MPC85xx_IRQ_PERFMON (28 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_SEC2 (29 + MPC85xx_OPENPIC_IRQ_OFFSET)
#define MPC85xx_IRQ_CPM (30 + MPC85xx_OPENPIC_IRQ_OFFSET) #define MPC85xx_IRQ_CPM (30 + MPC85xx_OPENPIC_IRQ_OFFSET)
/* The 12 external interrupt lines */ /* The 12 external interrupt lines */
...@@ -120,6 +121,8 @@ extern unsigned char __res[]; ...@@ -120,6 +121,8 @@ extern unsigned char __res[];
#define MPC85xx_PCI2_SIZE (0x01000) #define MPC85xx_PCI2_SIZE (0x01000)
#define MPC85xx_PERFMON_OFFSET (0xe1000) #define MPC85xx_PERFMON_OFFSET (0xe1000)
#define MPC85xx_PERFMON_SIZE (0x01000) #define MPC85xx_PERFMON_SIZE (0x01000)
#define MPC85xx_SEC2_OFFSET (0x30000)
#define MPC85xx_SEC2_SIZE (0x10000)
#define MPC85xx_UART0_OFFSET (0x04500) #define MPC85xx_UART0_OFFSET (0x04500)
#define MPC85xx_UART0_SIZE (0x00100) #define MPC85xx_UART0_SIZE (0x00100)
#define MPC85xx_UART1_OFFSET (0x04600) #define MPC85xx_UART1_OFFSET (0x04600)
......
...@@ -61,6 +61,7 @@ ...@@ -61,6 +61,7 @@
#define OCP_FUNC_PERFMON 0x00D2 /* Performance Monitor */ #define OCP_FUNC_PERFMON 0x00D2 /* Performance Monitor */
#define OCP_FUNC_RGMII 0x00D3 #define OCP_FUNC_RGMII 0x00D3
#define OCP_FUNC_TAH 0x00D4 #define OCP_FUNC_TAH 0x00D4
#define OCP_FUNC_SEC2 0x00D5 /* Crypto/Security 2.0 */
/* Network 0x0200 - 0x02FF */ /* Network 0x0200 - 0x02FF */
#define OCP_FUNC_EMAC 0x0200 #define OCP_FUNC_EMAC 0x0200
......
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