Commit 52b2fe45 authored by Wei Fang's avatar Wei Fang Committed by Jakub Kicinski

dt-bindings: net: tja11xx: add nxp,refclk_in property

TJA110x REF_CLK can be configured as interface reference clock
intput or output when the RMII mode enabled. This patch add the
property to make the REF_CLK can be configurable.
Signed-off-by: default avatarWei Fang <wei.fang@nxp.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 3de1484b
...@@ -31,6 +31,22 @@ patternProperties: ...@@ -31,6 +31,22 @@ patternProperties:
description: description:
The ID number for the child PHY. Should be +1 of parent PHY. The ID number for the child PHY. Should be +1 of parent PHY.
nxp,rmii-refclk-in:
type: boolean
description: |
The REF_CLK is provided for both transmitted and received data
in RMII mode. This clock signal is provided by the PHY and is
typically derived from an external 25MHz crystal. Alternatively,
a 50MHz clock signal generated by an external oscillator can be
connected to pin REF_CLK. A third option is to connect a 25MHz
clock to pin CLK_IN_OUT. So, the REF_CLK should be configured
as input or output according to the actual circuit connection.
If present, indicates that the REF_CLK will be configured as
interface reference clock input when RMII mode enabled.
If not present, the REF_CLK will be configured as interface
reference clock output when RMII mode enabled.
Only supported on TJA1100 and TJA1101.
required: required:
- reg - reg
...@@ -44,6 +60,7 @@ examples: ...@@ -44,6 +60,7 @@ examples:
tja1101_phy0: ethernet-phy@4 { tja1101_phy0: ethernet-phy@4 {
reg = <0x4>; reg = <0x4>;
nxp,rmii-refclk-in;
}; };
}; };
- | - |
......
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