Commit 54bce6c7 authored by Kukjin Kim's avatar Kukjin Kim

ARM: S5P64X0: 2nd Change to using s3c_gpio_cfgall_range()

This patch changes the code setting range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgpin_range().
NOTE: This is for missed things from the previous patch.
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent aef698a7
......@@ -25,16 +25,14 @@ struct platform_device; /* don't need the contents */
void s5p6440_i2c1_cfg_gpio(struct platform_device *dev)
{
s3c_gpio_cfgpin_range(S5P6440_GPR(9), 2, S3C_GPIO_SFN(6));
s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(S5P6440_GPR(9), 2,
S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP);
}
void s5p6450_i2c1_cfg_gpio(struct platform_device *dev)
{
s3c_gpio_cfgpin_range(S5P6450_GPR(9), 2, S3C_GPIO_SFN(6));
s3c_gpio_setpull(S5P6450_GPR(9), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5P6450_GPR(10), S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(S5P6450_GPR(9), 2,
S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP);
}
void s3c_i2c1_cfg_gpio(struct platform_device *dev) { }
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment