Commit 58256143 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven

clk: renesas: Remove R-Car Gen2 legacy DT clock support

As of commit 362b334b ("ARM: dts: r8a7791: Convert to new
CPG/MSSR bindings"), all upstream R-Car Gen2 device tree source files
use the unified "Renesas Clock Pulse Generator / Module Standby and
Software Reset" DT bindings.

Hence remove backward compatibility with old R-Car Gen2 device trees
describing a hierarchical representation of the various CPG and MSTP
clocks.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/20190830133615.11274-1-geert+renesas@glider.be
parent ba28236e
...@@ -31,17 +31,6 @@ config CLK_RENESAS ...@@ -31,17 +31,6 @@ config CLK_RENESAS
if CLK_RENESAS if CLK_RENESAS
config CLK_RENESAS_LEGACY
bool "Legacy DT clock support"
depends on CLK_R8A7790 || CLK_R8A7791 || CLK_R8A7792 || CLK_R8A7794
help
Enable backward compatibility with old device trees describing a
hierarchical representation of the various CPG and MSTP clocks.
Say Y if you want your kernel to work with old DTBs.
It is safe to say N if you use the DTS that is supplied with the
current kernel source tree.
# SoC # SoC
config CLK_EMEV2 config CLK_EMEV2
bool "Emma Mobile EV2 clock support" if COMPILE_TEST bool "Emma Mobile EV2 clock support" if COMPILE_TEST
...@@ -94,24 +83,20 @@ config CLK_R8A7779 ...@@ -94,24 +83,20 @@ config CLK_R8A7779
config CLK_R8A7790 config CLK_R8A7790
bool "R-Car H2 clock support" if COMPILE_TEST bool "R-Car H2 clock support" if COMPILE_TEST
select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
select CLK_RCAR_GEN2_CPG select CLK_RCAR_GEN2_CPG
select CLK_RENESAS_DIV6 select CLK_RENESAS_DIV6
config CLK_R8A7791 config CLK_R8A7791
bool "R-Car M2-W/N clock support" if COMPILE_TEST bool "R-Car M2-W/N clock support" if COMPILE_TEST
select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
select CLK_RCAR_GEN2_CPG select CLK_RCAR_GEN2_CPG
select CLK_RENESAS_DIV6 select CLK_RENESAS_DIV6
config CLK_R8A7792 config CLK_R8A7792
bool "R-Car V2H clock support" if COMPILE_TEST bool "R-Car V2H clock support" if COMPILE_TEST
select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
select CLK_RCAR_GEN2_CPG select CLK_RCAR_GEN2_CPG
config CLK_R8A7794 config CLK_R8A7794
bool "R-Car E2 clock support" if COMPILE_TEST bool "R-Car E2 clock support" if COMPILE_TEST
select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
select CLK_RCAR_GEN2_CPG select CLK_RCAR_GEN2_CPG
select CLK_RENESAS_DIV6 select CLK_RENESAS_DIV6
...@@ -155,11 +140,6 @@ config CLK_SH73A0 ...@@ -155,11 +140,6 @@ config CLK_SH73A0
# Family # Family
config CLK_RCAR_GEN2
bool "R-Car Gen2 legacy clock support" if COMPILE_TEST
select CLK_RENESAS_CPG_MSTP
select CLK_RENESAS_DIV6
config CLK_RCAR_GEN2_CPG config CLK_RCAR_GEN2_CPG
bool "R-Car Gen2 CPG clock support" if COMPILE_TEST bool "R-Car Gen2 CPG clock support" if COMPILE_TEST
select CLK_RENESAS_CPG_MSSR select CLK_RENESAS_CPG_MSSR
......
...@@ -27,7 +27,6 @@ obj-$(CONFIG_CLK_R9A06G032) += r9a06g032-clocks.o ...@@ -27,7 +27,6 @@ obj-$(CONFIG_CLK_R9A06G032) += r9a06g032-clocks.o
obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o
# Family # Family
obj-$(CONFIG_CLK_RCAR_GEN2) += clk-rcar-gen2.o
obj-$(CONFIG_CLK_RCAR_GEN2_CPG) += rcar-gen2-cpg.o obj-$(CONFIG_CLK_RCAR_GEN2_CPG) += rcar-gen2-cpg.o
obj-$(CONFIG_CLK_RCAR_GEN3_CPG) += rcar-gen3-cpg.o obj-$(CONFIG_CLK_RCAR_GEN3_CPG) += rcar-gen3-cpg.o
obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL) += rcar-usb2-clock-sel.o obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL) += rcar-usb2-clock-sel.o
......
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