Commit 5a0ba777 authored by Daniele Ceraolo Spurio's avatar Daniele Ceraolo Spurio Committed by Chris Wilson

drm/i915: add HAS_FORCEWAKE flag to uncore

We have several cases where we don't have forcewake (older gens, GVT and
planned display-only uncore), so, instead of checking every time against
the various condition, save the info in a flag and use that.

Note that this patch also change the behavior for gen5 with vpgu
enabled, but this is not an issue since we don't support vgpu on gen5.

v2: split out from previous path, fix check for missing case (Paulo)
v3: Inline helper for clarity in testing flags
Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190325214940.23632-3-daniele.ceraolospurio@intel.com
parent 6cc5ca76
......@@ -1391,7 +1391,7 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
{
struct drm_i915_private *i915 = uncore_to_i915(uncore);
if (INTEL_GEN(i915) <= 5 || intel_vgpu_active(i915))
if (!intel_uncore_has_forcewake(uncore))
return;
if (INTEL_GEN(i915) >= 11) {
......@@ -1590,6 +1590,9 @@ int intel_uncore_init(struct intel_uncore *uncore)
i915_check_vgpu(i915);
if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
uncore->flags |= UNCORE_HAS_FORCEWAKE;
intel_uncore_edram_detect(i915);
intel_uncore_fw_domains_init(uncore);
__intel_uncore_early_sanitize(uncore, 0);
......@@ -1598,12 +1601,14 @@ int intel_uncore_init(struct intel_uncore *uncore)
uncore->pmic_bus_access_nb.notifier_call =
i915_pmic_bus_access_notifier;
if (IS_GEN_RANGE(i915, 2, 4) || intel_vgpu_active(i915)) {
ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen2);
ASSIGN_READ_MMIO_VFUNCS(uncore, gen2);
} else if (IS_GEN(i915, 5)) {
if (!intel_uncore_has_forcewake(uncore)) {
if (IS_GEN(i915, 5)) {
ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen5);
ASSIGN_READ_MMIO_VFUNCS(uncore, gen5);
} else {
ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen2);
ASSIGN_READ_MMIO_VFUNCS(uncore, gen2);
}
} else if (IS_GEN_RANGE(i915, 6, 7)) {
ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen6);
......@@ -1912,7 +1917,10 @@ intel_uncore_forcewake_for_read(struct drm_i915_private *dev_priv,
} else if (INTEL_GEN(dev_priv) >= 6) {
fw_domains = __gen6_reg_read_fw_domains(uncore, offset);
} else {
WARN_ON(!IS_GEN_RANGE(dev_priv, 2, 5));
/* on devices with FW we expect to hit one of the above cases */
if (intel_uncore_has_forcewake(uncore))
MISSING_CASE(INTEL_GEN(dev_priv));
fw_domains = 0;
}
......@@ -1938,7 +1946,10 @@ intel_uncore_forcewake_for_write(struct drm_i915_private *dev_priv,
} else if (IS_GEN_RANGE(dev_priv, 6, 7)) {
fw_domains = FORCEWAKE_RENDER;
} else {
WARN_ON(!IS_GEN_RANGE(dev_priv, 2, 5));
/* on devices with FW we expect to hit one of the above cases */
if (intel_uncore_has_forcewake(uncore))
MISSING_CASE(INTEL_GEN(dev_priv));
fw_domains = 0;
}
......@@ -1969,7 +1980,7 @@ intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
WARN_ON(!op);
if (intel_vgpu_active(dev_priv))
if (!intel_uncore_has_forcewake(&dev_priv->uncore))
return 0;
if (op & FW_REG_READ)
......
......@@ -97,6 +97,9 @@ struct intel_uncore {
spinlock_t lock; /** lock is also taken in irq contexts. */
unsigned int flags;
#define UNCORE_HAS_FORCEWAKE BIT(0)
const struct intel_forcewake_range *fw_domains_table;
unsigned int fw_domains_table_entries;
......@@ -143,6 +146,12 @@ forcewake_domain_to_uncore(const struct intel_uncore_forcewake_domain *d)
return container_of(d, struct intel_uncore, fw_domain[d->id]);
}
static inline bool
intel_uncore_has_forcewake(const struct intel_uncore *uncore)
{
return uncore->flags & UNCORE_HAS_FORCEWAKE;
}
void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
int intel_uncore_init(struct intel_uncore *uncore);
void intel_uncore_prune(struct intel_uncore *uncore);
......
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