Commit 5ba4fa35 authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu: only check for ECC on Vega10

RV doesn't support it.
Reviewed-by: default avatarJunwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent adab595d
...@@ -634,6 +634,7 @@ static int gmc_v9_0_late_init(void *handle) ...@@ -634,6 +634,7 @@ static int gmc_v9_0_late_init(void *handle)
for(i = 0; i < AMDGPU_MAX_VMHUBS; ++i) for(i = 0; i < AMDGPU_MAX_VMHUBS; ++i)
BUG_ON(vm_inv_eng[i] > 16); BUG_ON(vm_inv_eng[i] > 16);
if (adev->asic_type == CHIP_VEGA10) {
r = gmc_v9_0_ecc_available(adev); r = gmc_v9_0_ecc_available(adev);
if (r == 1) { if (r == 1) {
DRM_INFO("ECC is active.\n"); DRM_INFO("ECC is active.\n");
...@@ -643,6 +644,7 @@ static int gmc_v9_0_late_init(void *handle) ...@@ -643,6 +644,7 @@ static int gmc_v9_0_late_init(void *handle)
DRM_ERROR("gmc_v9_0_ecc_available() failed. r: %d\n", r); DRM_ERROR("gmc_v9_0_ecc_available() failed. r: %d\n", r);
return r; return r;
} }
}
return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0); return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
} }
......
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