Commit 5d3adbe2 authored by Ralf Bächle's avatar Ralf Bächle Committed by Linus Torvalds

[PATCH] Update for MIPS Inc's eval boards.

This is an update for MIPS Inc's evaluation boards in all their ugly
versions ...
parent a85be436
This diff is collapsed.
This diff is collapsed.
#
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
CONFIG_MIPS32=y
# CONFIG_MIPS64 is not set
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_SWAP=y
# CONFIG_SYSVIPC is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
#
# Loadable module support
#
# CONFIG_MODULES is not set
#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
# CONFIG_BAGET_MIPS is not set
# CONFIG_CASIO_E55 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_IVR is not set
# CONFIG_LASAT is not set
# CONFIG_HP_LASERJET is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MIPS_ITE8172 is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MAGNUM_4000 is not set
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_SEAD=y
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_TANBAC_TB0226 is not set
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_VICTOR_MPC30X is not set
# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_NONCOHERENT_IO=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_MIPS_BOARDS_GEN=y
CONFIG_L1_CACHE_SHIFT=5
# CONFIG_FB is not set
#
# CPU selection
#
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_HAS_PREFETCH=y
# CONFIG_VTAG_ICACHE is not set
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_MMU=y
# CONFIG_HOTPLUG is not set
#
# Executable file formats
#
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Generic Driver Options
#
# CONFIG_FW_LOADER is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=18432
CONFIG_BLK_DEV_INITRD=y
#
# MIPS initrd options
#
CONFIG_EMBEDDED_RAMDISK=y
CONFIG_EMBEDDED_RAMDISK_IMAGE="ramdisk.gz"
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
#
# I2O device support
#
#
# Networking support
#
# CONFIG_NET is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# ISDN subsystem
#
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_UNIX98_PTYS is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_TMPFS is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Graphics support
#
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_GADGET is not set
#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
...@@ -24,12 +24,12 @@ ...@@ -24,12 +24,12 @@
* *
*/ */
#include <linux/config.h> #include <linux/config.h>
#include <linux/compiler.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/kernel_stat.h> #include <linux/kernel_stat.h>
#include <linux/seq_file.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/mips-boards/atlas.h> #include <asm/mips-boards/atlas.h>
...@@ -41,10 +41,6 @@ struct atlas_ictrl_regs *atlas_hw0_icregs ...@@ -41,10 +41,6 @@ struct atlas_ictrl_regs *atlas_hw0_icregs
= (struct atlas_ictrl_regs *)ATLAS_ICTRL_REGS_BASE; = (struct atlas_ictrl_regs *)ATLAS_ICTRL_REGS_BASE;
extern asmlinkage void mipsIRQ(void); extern asmlinkage void mipsIRQ(void);
extern void do_IRQ(int irq, struct pt_regs *regs);
unsigned long spurious_count = 0;
irq_desc_t irq_desc[NR_IRQS];
#if 0 #if 0
#define DEBUG_INT(x...) printk(x) #define DEBUG_INT(x...) printk(x)
...@@ -52,11 +48,6 @@ irq_desc_t irq_desc[NR_IRQS]; ...@@ -52,11 +48,6 @@ irq_desc_t irq_desc[NR_IRQS];
#define DEBUG_INT(x...) #define DEBUG_INT(x...)
#endif #endif
void inline disable_irq_nosync(unsigned int irq_nr)
{
disable_atlas_irq(irq_nr);
}
void disable_atlas_irq(unsigned int irq_nr) void disable_atlas_irq(unsigned int irq_nr)
{ {
atlas_hw0_icregs->intrsten = (1 << irq_nr); atlas_hw0_icregs->intrsten = (1 << irq_nr);
...@@ -94,80 +85,6 @@ static struct hw_interrupt_type atlas_irq_type = { ...@@ -94,80 +85,6 @@ static struct hw_interrupt_type atlas_irq_type = {
NULL NULL
}; };
int show_interrupts(struct seq_file *p, void *v)
{
int i;
int num = 0;
struct irqaction *action;
unsigned long flags;
for (i = 0; i < ATLASINT_END; i++, num++) {
spin_lock_irqsave(&irq_desc[i].lock, flags);
action = irq_desc[i].action;
if (!action)
goto skip;
seq_printf(p, "%2d: %8d %c %s",
num, kstat_cpu(0).irqs[num],
(action->flags & SA_INTERRUPT) ? '+' : ' ',
action->name);
for (action=action->next; action; action = action->next) {
seq_printf(p, ",%s %s",
(action->flags & SA_INTERRUPT) ? " +" : "",
action->name);
}
seq_printf(p, " [hw0]\n");
skip:
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
}
return 0;
}
int request_irq(unsigned int irq,
void (*handler)(int, void *, struct pt_regs *),
unsigned long irqflags,
const char * devname,
void *dev_id)
{
struct irqaction *action;
DEBUG_INT("request_irq: irq=%d, devname = %s\n", irq, devname);
if (irq >= ATLASINT_END)
return -EINVAL;
if (!handler)
return -EINVAL;
action = (struct irqaction *)kmalloc(sizeof(struct irqaction), GFP_KERNEL);
if(!action)
return -ENOMEM;
action->handler = handler;
action->flags = irqflags;
action->mask = 0;
action->name = devname;
action->dev_id = dev_id;
action->next = 0;
irq_desc[irq].action = action;
enable_atlas_irq(irq);
return 0;
}
void free_irq(unsigned int irq, void *dev_id)
{
struct irqaction *action;
if (irq >= ATLASINT_END) {
printk("Trying to free IRQ%d\n",irq);
return;
}
action = irq_desc[irq].action;
irq_desc[irq].action = NULL;
disable_atlas_irq(irq);
kfree(action);
}
static inline int ls1bit32(unsigned int x) static inline int ls1bit32(unsigned int x)
{ {
int b = 31, s; int b = 31, s;
...@@ -183,48 +100,23 @@ static inline int ls1bit32(unsigned int x) ...@@ -183,48 +100,23 @@ static inline int ls1bit32(unsigned int x)
void atlas_hw0_irqdispatch(struct pt_regs *regs) void atlas_hw0_irqdispatch(struct pt_regs *regs)
{ {
struct irqaction *action;
unsigned long int_status; unsigned long int_status;
int irq, cpu = smp_processor_id(); int irq;
int_status = atlas_hw0_icregs->intstatus; int_status = atlas_hw0_icregs->intstatus;
/* if int_status == 0, then the interrupt has already been cleared */ /* if int_status == 0, then the interrupt has already been cleared */
if (int_status == 0) if (unlikely(int_status == 0))
return; return;
irq = ls1bit32(int_status); irq = ls1bit32(int_status);
action = irq_desc[irq].action;
DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq); DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
/* if action == NULL, then we don't have a handler for the irq */ do_IRQ(irq, regs);
if ( action == NULL ) {
printk("No handler for hw0 irq: %i\n", irq);
spurious_count++;
return;
}
irq_enter(cpu, irq);
kstat_cpu(0).irqs[irq]++;
action->handler(irq, action->dev_id, regs);
irq_exit(cpu, irq);
return;
}
unsigned long probe_irq_on (void)
{
return 0;
}
int probe_irq_off (unsigned long irqs)
{
return 0;
} }
#ifdef CONFIG_REMOTE_DEBUG #ifdef CONFIG_KGDB
extern void breakpoint(void); extern void breakpoint(void);
extern int remote_debug; extern int remote_debug;
#endif #endif
...@@ -250,7 +142,7 @@ void __init init_IRQ(void) ...@@ -250,7 +142,7 @@ void __init init_IRQ(void)
spin_lock_init(&irq_desc[i].lock); spin_lock_init(&irq_desc[i].lock);
} }
#ifdef CONFIG_REMOTE_DEBUG #ifdef CONFIG_KGDB
if (remote_debug) { if (remote_debug) {
set_debug_traps(); set_debug_traps();
breakpoint(); breakpoint();
......
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
*/ */
#include <linux/config.h> #include <linux/config.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/mc146818rtc.h> #include <linux/mc146818rtc.h>
#include <linux/ioport.h> #include <linux/ioport.h>
...@@ -28,15 +29,17 @@ ...@@ -28,15 +29,17 @@
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/mips-boards/generic.h> #include <asm/mips-boards/generic.h>
#include <asm/mips-boards/prom.h> #include <asm/mips-boards/prom.h>
#include <asm/gt64120.h>
#include <asm/mips-boards/atlasint.h> #include <asm/mips-boards/atlasint.h>
#include <asm/gt64120.h>
#include <asm/time.h>
#include <asm/traps.h>
#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE) #if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
extern void console_setup(char *, int *); extern void console_setup(char *, int *);
char serial_console[20]; char serial_console[20];
#endif #endif
#ifdef CONFIG_REMOTE_DEBUG #ifdef CONFIG_KGDB
extern void rs_kgdb_hook(int); extern void rs_kgdb_hook(int);
extern void saa9730_kgdb_hook(void); extern void saa9730_kgdb_hook(void);
extern void breakpoint(void); extern void breakpoint(void);
...@@ -47,9 +50,18 @@ extern struct rtc_ops atlas_rtc_ops; ...@@ -47,9 +50,18 @@ extern struct rtc_ops atlas_rtc_ops;
extern void mips_reboot_setup(void); extern void mips_reboot_setup(void);
const char *get_system_type(void)
{
return "MIPS Atlas";
}
extern void mips_time_init(void);
extern void mips_timer_setup(struct irqaction *irq);
extern unsigned long mips_rtc_get_time(void);
void __init atlas_setup(void) void __init atlas_setup(void)
{ {
#ifdef CONFIG_REMOTE_DEBUG #ifdef CONFIG_KGDB
int rs_putDebugChar(char); int rs_putDebugChar(char);
char rs_getDebugChar(void); char rs_getDebugChar(void);
int saa9730_putDebugChar(char); int saa9730_putDebugChar(char);
...@@ -75,7 +87,7 @@ void __init atlas_setup(void) ...@@ -75,7 +87,7 @@ void __init atlas_setup(void)
} }
#endif #endif
#ifdef CONFIG_REMOTE_DEBUG #ifdef CONFIG_KGDB
argptr = prom_getcmdline(); argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) { if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
int line; int line;
...@@ -107,9 +119,12 @@ void __init atlas_setup(void) ...@@ -107,9 +119,12 @@ void __init atlas_setup(void)
argptr = prom_getcmdline(); argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "nofpu")) != NULL) if ((argptr = strstr(argptr, "nofpu")) != NULL)
mips_cpu.options &= ~MIPS_CPU_FPU; cpu_data[0].options &= ~MIPS_CPU_FPU;
rtc_ops = &atlas_rtc_ops; rtc_ops = &atlas_rtc_ops;
board_time_init = mips_time_init;
board_timer_setup = mips_timer_setup;
rtc_get_time = mips_rtc_get_time;
mips_reboot_setup(); mips_reboot_setup();
} }
...@@ -2,8 +2,6 @@ ...@@ -2,8 +2,6 @@
# Carsten Langgaard, carstenl@mips.com # Carsten Langgaard, carstenl@mips.com
# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. # Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
# #
# ########################################################################
#
# This program is free software; you can distribute it and/or modify it # This program is free software; you can distribute it and/or modify it
# under the terms of the GNU General Public License (Version 2) as # under the terms of the GNU General Public License (Version 2) as
# published by the Free Software Foundation. # published by the Free Software Foundation.
...@@ -17,13 +15,13 @@ ...@@ -17,13 +15,13 @@
# with this program; if not, write to the Free Software Foundation, Inc., # with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. # 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
# #
# #######################################################################
#
# Makefile for the MIPS boards generic routines under Linux. # Makefile for the MIPS boards generic routines under Linux.
# #
EXTRA_AFLAGS := $(CFLAGS) obj-y := mipsIRQ.o reset.o display.o init.o memory.o \
printf.o cmdline.o
obj-$(CONFIG_MIPS_ATLAS) += time.o
obj-$(CONFIG_MIPS_MALTA) += time.o
obj-$(CONFIG_KGDB) += gdb_hook.o
obj-y := mipsIRQ.o pci.o reset.o display.o init.o \ EXTRA_AFLAGS := $(CFLAGS)
memory.o printf.o cmdline.o time.o
obj-$(CONFIG_REMOTE_DEBUG) += gdb_hook.o
...@@ -17,16 +17,21 @@ ...@@ -17,16 +17,21 @@
* *
* Kernel command line creation using the prom monitor (YAMON) argc/argv. * Kernel command line creation using the prom monitor (YAMON) argc/argv.
*/ */
#include <linux/config.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/string.h> #include <linux/string.h>
#include <asm/bootinfo.h> #include <asm/bootinfo.h>
extern int prom_argc; extern int prom_argc;
extern char **prom_argv; extern int *_prom_argv;
char arcs_cmdline[COMMAND_LINE_SIZE]; /*
* YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
* This macro take care of sign extension.
*/
#define prom_argv(index) ((char *)(((int *)(int)_prom_argv)[(index)]))
char arcs_cmdline[CL_SIZE];
char * __init prom_getcmdline(void) char * __init prom_getcmdline(void)
{ {
...@@ -43,8 +48,8 @@ void __init prom_init_cmdline(void) ...@@ -43,8 +48,8 @@ void __init prom_init_cmdline(void)
cp = &(arcs_cmdline[0]); cp = &(arcs_cmdline[0]);
while(actr < prom_argc) { while(actr < prom_argc) {
strcpy(cp, prom_argv[actr]); strcpy(cp, prom_argv(actr));
cp += strlen(prom_argv[actr]); cp += strlen(prom_argv(actr));
*cp++ = ' '; *cp++ = ' ';
actr++; actr++;
} }
......
...@@ -39,9 +39,11 @@ void mips_display_message(const char *str) ...@@ -39,9 +39,11 @@ void mips_display_message(const char *str)
} }
} }
#ifndef CONFIG_MIPS_SEAD
void mips_display_word(unsigned int num) void mips_display_word(unsigned int num)
{ {
volatile unsigned int *display = (void *)ASCII_DISPLAY_WORD_BASE; volatile unsigned int *display = (void *)ASCII_DISPLAY_WORD_BASE;
*display = num; *display = num;
} }
#endif
...@@ -2,8 +2,6 @@ ...@@ -2,8 +2,6 @@
* Carsten Langgaard, carstenl@mips.com * Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
* *
* ########################################################################
*
* This program is free software; you can distribute it and/or modify it * This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as * under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation. * published by the Free Software Foundation.
...@@ -17,12 +15,9 @@ ...@@ -17,12 +15,9 @@
* with this program; if not, write to the Free Software Foundation, Inc., * with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
* *
* ########################################################################
*
* This is the interface to the remote debugger stub. * This is the interface to the remote debugger stub.
*
*/ */
#include <linux/config.h>
#include <linux/serialP.h> #include <linux/serialP.h>
#include <linux/serial_reg.h> #include <linux/serial_reg.h>
......
...@@ -27,6 +27,8 @@ ...@@ -27,6 +27,8 @@
#include <asm/mips-boards/generic.h> #include <asm/mips-boards/generic.h>
#include <asm/gt64120.h> #include <asm/gt64120.h>
#include <asm/mips-boards/malta.h> #include <asm/mips-boards/malta.h>
#include <asm/mips-boards/msc01_pci.h>
#include <asm/mips-boards/bonito64.h>
/* Environment variable */ /* Environment variable */
typedef struct typedef struct
...@@ -36,27 +38,37 @@ typedef struct ...@@ -36,27 +38,37 @@ typedef struct
} t_env_var; } t_env_var;
int prom_argc; int prom_argc;
char **prom_argv, **prom_envp; int *_prom_argv, *_prom_envp;
/*
* YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
* This macro take care of sign extension, if running in 64-bit mode.
*/
#define prom_envp(index) ((char *)(((int *)(int)_prom_envp)[(index)]))
int init_debug = 0; int init_debug = 0;
unsigned int mips_revision_corid;
char *prom_getenv(char *envname) char *prom_getenv(char *envname)
{ {
/* /*
* Return a pointer to the given environment variable. * Return a pointer to the given environment variable.
* In 64-bit mode: we're using 64-bit pointers, but all pointers
* in the PROM structures are only 32-bit, so we need some
* workarounds, if we are running in 64-bit mode.
*/ */
int i, index=0;
t_env_var *env = (t_env_var *)prom_envp;
int i;
i = strlen(envname); i = strlen(envname);
while(env->name) { while(prom_envp(index)) {
if(strncmp(envname, env->name, i) == 0) { if(strncmp(envname, prom_envp(index), i) == 0) {
return(env->val); return(prom_envp(index+1));
} }
env++; index += 2;
} }
return(NULL); return(NULL);
} }
...@@ -109,14 +121,22 @@ int get_ethernet_addr(char *ethernet_addr) ...@@ -109,14 +121,22 @@ int get_ethernet_addr(char *ethernet_addr)
int __init prom_init(int argc, char **argv, char **envp) int __init prom_init(int argc, char **argv, char **envp)
{ {
prom_argc = argc; prom_argc = argc;
prom_argv = argv; _prom_argv = (int *)argv;
prom_envp = envp; _prom_envp = (int *)envp;
mips_display_message("LINUX"); mips_display_message("LINUX");
#ifdef CONFIG_MIPS_SEAD
set_io_port_base(KSEG1);
#else
mips_revision_corid = MIPS_REVISION_CORID;
switch(mips_revision_corid) {
case MIPS_REVISION_CORID_QED_RM5261:
case MIPS_REVISION_CORID_CORE_LV:
case MIPS_REVISION_CORID_CORE_FPGA:
/* /*
* Setup the North bridge to do Master byte-lane swapping when * Setup the North bridge to do Master byte-lane swapping
* running in bigendian. * when running in bigendian.
*/ */
#if defined(__MIPSEL__) #if defined(__MIPSEL__)
GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT | GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
...@@ -126,11 +146,59 @@ int __init prom_init(int argc, char **argv, char **envp) ...@@ -126,11 +146,59 @@ int __init prom_init(int argc, char **argv, char **envp)
#endif #endif
#if defined(CONFIG_MIPS_MALTA) #if defined(CONFIG_MIPS_MALTA)
mips_io_port_base = MALTA_PORT_BASE; set_io_port_base(MALTA_GT_PORT_BASE);
#else #else
mips_io_port_base = KSEG1; set_io_port_base(KSEG1);
#endif
break;
case MIPS_REVISION_CORID_BONITO64:
case MIPS_REVISION_CORID_CORE_20K:
/*
* Disable Bonito IOBC.
*/
BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
/*
* Setup the North bridge to do Master byte-lane swapping
* when running in bigendian.
*/
#if defined(__MIPSEL__)
BONITO_BONGENCFG = BONITO_BONGENCFG &
~(BONITO_BONGENCFG_MSTRBYTESWAP |
BONITO_BONGENCFG_BYTESWAP);
#else
BONITO_BONGENCFG = BONITO_BONGENCFG |
BONITO_BONGENCFG_MSTRBYTESWAP |
BONITO_BONGENCFG_BYTESWAP;
#endif
#if defined(CONFIG_MIPS_MALTA)
set_io_port_base(MALTA_BONITO_PORT_BASE);
#else
set_io_port_base(KSEG1);
#endif
break;
case MIPS_REVISION_CORID_CORE_MSC:
set_io_port_base(MALTA_MSC_PORT_BASE);
#if defined(__MIPSEL__)
MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP);
#else
MSC_WRITE(MSC01_PCI_SWAP,
MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_IO_SHF |
MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
#endif
break;
default:
/* Unknown Core card */
mips_display_message("CC Error");
while(1); /* We die here... */
}
#endif #endif
setup_prom_printf(0);
prom_printf("\nLINUX started...\n"); prom_printf("\nLINUX started...\n");
prom_init_cmdline(); prom_init_cmdline();
prom_meminit(); prom_meminit();
......
...@@ -2,8 +2,6 @@ ...@@ -2,8 +2,6 @@
* Carsten Langgaard, carstenl@mips.com * Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
* *
* ########################################################################
*
* This program is free software; you can distribute it and/or modify it * This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as * under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation. * published by the Free Software Foundation.
...@@ -17,11 +15,8 @@ ...@@ -17,11 +15,8 @@
* with this program; if not, write to the Free Software Foundation, Inc., * with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
* *
* ########################################################################
*
* PROM library functions for acquiring/using memory descriptors given to * PROM library functions for acquiring/using memory descriptors given to
* us from the YAMON. * us from the YAMON.
*
*/ */
#include <linux/config.h> #include <linux/config.h>
#include <linux/init.h> #include <linux/init.h>
...@@ -168,7 +163,7 @@ prom_free_prom_memory (void) ...@@ -168,7 +163,7 @@ prom_free_prom_memory (void)
+ boot_mem_map.map[i].size) { + boot_mem_map.map[i].size) {
ClearPageReserved(virt_to_page(__va(addr))); ClearPageReserved(virt_to_page(__va(addr)));
set_page_count(virt_to_page(__va(addr)), 1); set_page_count(virt_to_page(__va(addr)), 1);
free_page(__va(addr)); free_page((unsigned long)__va(addr));
addr += PAGE_SIZE; addr += PAGE_SIZE;
freed += PAGE_SIZE; freed += PAGE_SIZE;
} }
......
...@@ -56,6 +56,10 @@ ...@@ -56,6 +56,10 @@
* 6 Hardware (ignored) * 6 Hardware (ignored)
* 7 R4k timer (what we use) * 7 R4k timer (what we use)
* *
* Note: On the SEAD board thing are a little bit different.
* Here IRQ 2 (hw0) is wired to the UART0 and IRQ 3 (hw1) is wired
* wired to UART1.
*
* We handle the IRQ according to _our_ priority which is: * We handle the IRQ according to _our_ priority which is:
* *
* Highest ---- R4k Timer * Highest ---- R4k Timer
...@@ -74,7 +78,9 @@ ...@@ -74,7 +78,9 @@
CLI CLI
.set at .set at
mfc0 s0, CP0_CAUSE # get irq mask mfc0 s0, CP0_CAUSE # get irq bits
mfc0 s1, CP0_STATUS # get irq mask
and s0, s1
/* First we check for r4k counter/timer IRQ. */ /* First we check for r4k counter/timer IRQ. */
andi a0, s0, CAUSEF_IP7 andi a0, s0, CAUSEF_IP7
...@@ -90,14 +96,21 @@ ...@@ -90,14 +96,21 @@
nop nop
1: 1:
#if defined(CONFIG_MIPS_SEAD)
beq a0, zero, 1f beq a0, zero, 1f
nop andi a0, s0, CAUSEF_IP3 # delay slot, check hw1 interrupt
#else
beq a0, zero, 1f # delay slot, check hw3 interrupt
andi a0, s0, CAUSEF_IP5
#endif
/* Wheee, combined hardware level zero interrupt. */ /* Wheee, combined hardware level zero interrupt. */
#if defined(CONFIG_MIPS_ATLAS) #if defined(CONFIG_MIPS_ATLAS)
jal atlas_hw0_irqdispatch jal atlas_hw0_irqdispatch
#elif defined(CONFIG_MIPS_MALTA) #elif defined(CONFIG_MIPS_MALTA)
jal malta_hw0_irqdispatch jal malta_hw0_irqdispatch
#elif defined(CONFIG_MIPS_SEAD)
jal sead_hw0_irqdispatch
#else #else
#error "MIPS board not supported\n" #error "MIPS board not supported\n"
#endif #endif
...@@ -107,6 +120,24 @@ ...@@ -107,6 +120,24 @@
nop # delay slot nop # delay slot
1: 1:
#if defined(CONFIG_MIPS_SEAD)
beq a0, zero, 1f
andi a0, s0, CAUSEF_IP5 # delay slot, check hw3 interrupt
jal sead_hw1_irqdispatch
move a0, sp # delay slot
j ret_from_irq
nop # delay slot
1:
#endif
#if defined(CONFIG_MIPS_MALTA)
beq a0, zero, 1f # check hw3 (coreHI) interrupt
nop
jal corehi_irqdispatch
move a0, sp
j ret_from_irq
nop
1:
#endif
/* /*
* Here by mistake? This is possible, what can happen is that by the * Here by mistake? This is possible, what can happen is that by the
* time we take the exception the IRQ pin goes low, so just leave if * time we take the exception the IRQ pin goes low, so just leave if
......
/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* MIPS boards specific PCI support.
*
*/
#include <linux/config.h>
#ifdef CONFIG_PCI
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/mips-boards/generic.h>
#include <asm/gt64120.h>
#ifdef CONFIG_MIPS_MALTA
#include <asm/mips-boards/malta.h>
#endif
#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1
static int
mips_pcibios_config_access(unsigned char access_type, struct pci_bus *bus_dev, unsigned int dev_fn, unsigned char where, u32 *data)
{
unsigned char bus = bus_dev->number;
u32 intr;
if ((bus == 0) && (dev_fn >= PCI_DEVFN(31,0)))
return -1; /* Because of a bug in the galileo (for slot 31). */
/* Clear cause register bits */
GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
GT_INTRCAUSE_TARABORT0_BIT));
/* Setup address */
GT_WRITE(GT_PCI0_CFGADDR_OFS,
(bus << GT_PCI0_CFGADDR_BUSNUM_SHF) |
(dev_fn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) |
((where / 4) << GT_PCI0_CFGADDR_REGNUM_SHF) |
GT_PCI0_CFGADDR_CONFIGEN_BIT);
if (access_type == PCI_ACCESS_WRITE) {
if (bus == 0 && dev_fn == 0) {
/*
* Galileo is acting differently than other devices.
*/
GT_WRITE(GT_PCI0_CFGDATA_OFS, *data);
} else {
GT_PCI_WRITE(GT_PCI0_CFGDATA_OFS, *data);
}
} else {
if (bus == 0 && dev_fn == 0) {
/*
* Galileo is acting differently than other devices.
*/
GT_READ(GT_PCI0_CFGDATA_OFS, *data);
} else {
GT_PCI_READ(GT_PCI0_CFGDATA_OFS, *data);
}
}
/* Check for master or target abort */
GT_READ(GT_INTRCAUSE_OFS, intr);
if (intr & (GT_INTRCAUSE_MASABORT0_BIT | GT_INTRCAUSE_TARABORT0_BIT))
{
/* Error occurred */
/* Clear bits */
GT_WRITE( GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT |
GT_INTRCAUSE_TARABORT0_BIT) );
return -1;
}
return 0;
}
/*
* We can't address 8 and 16 bit words directly. Instead we have to
* read/write a 32bit word and mask/modify the data we actually want.
*/
static int
mips_pcibios_read (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
{
u32 data = 0;
if((size == 2) && (where & 1))
return PCIBIOS_BAD_REGISTER_NUMBER;
else if ((size == 4) && (where & 3))
return PCIBIOS_BAD_REGISTER_NUMBER;
if (mips_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return -1;
if(size == 1)
*val = (u8)(data >> ((where & 3) << 3)) & 0xff;
else if (size == 2)
*val = (u16)(data >> ((where & 3) << 3)) & 0xffff;
else if (size == 4)
*val = data;
return PCIBIOS_SUCCESSFUL;
}
static int
mips_pcibios_write (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
{
u32 data = 0;
if((size == 2) && (where & 1))
return PCIBIOS_BAD_REGISTER_NUMBER;
else if (size == 4) {
if(where & 3)
return PCIBIOS_BAD_REGISTER_NUMBER;
if(mips_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, &val))
return -1;
return PCIBIOS_SUCCESSFUL;
}
if (mips_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return -1;
if(size == 1) {
data = (data & ~(0xff << ((where & 3) << 3))) |
(val << ((where & 3) << 3));
} else if (size == 2) {
data = (data & ~(0xffff << ((where & 3) << 3))) |
(val << ((where & 3) << 3));
}
return PCIBIOS_SUCCESSFUL;
}
struct pci_ops mips_pci_ops = {
.read = mips_pcibios_read,
.write = mips_pcibios_write,
};
void __init pcibios_init(void)
{
#ifdef CONFIG_MIPS_MALTA
struct pci_dev *pdev = NULL;
unsigned char reg_val;
#endif
printk("PCI: Probing PCI hardware on host bus 0.\n");
pci_scan_bus(0, &mips_pci_ops, NULL);
/*
* Due to a bug in the Galileo system controller, we need to setup
* the PCI BAR for the Galileo internal registers.
* This should be done in the bios/bootprom and will be fixed in
* a later revision of YAMON (the MIPS boards boot prom).
*/
GT_WRITE(GT_PCI0_CFGADDR_OFS,
(0 << GT_PCI0_CFGADDR_BUSNUM_SHF) | /* Local bus */
(0 << GT_PCI0_CFGADDR_DEVNUM_SHF) | /* GT64120 device */
(0 << GT_PCI0_CFGADDR_FUNCTNUM_SHF) | /* Function 0 */
((0x20/4) << GT_PCI0_CFGADDR_REGNUM_SHF) | /* BAR 4 */
GT_PCI0_CFGADDR_CONFIGEN_BIT );
/* Perform the write */
GT_WRITE( GT_PCI0_CFGDATA_OFS, PHYSADDR(MIPS_GT_BASE));
#ifdef CONFIG_MIPS_MALTA
while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev)) != NULL) {
if ((pdev->vendor == PCI_VENDOR_ID_INTEL)
&& (pdev->device == PCI_DEVICE_ID_INTEL_82371AB)
&& (PCI_SLOT(pdev->devfn) == 0x0a)) {
/*
* IDE Decode enable.
*/
pci_read_config_byte(pdev, 0x41, &reg_val);
pci_write_config_byte(pdev, 0x41, reg_val | 0x80);
pci_read_config_byte(pdev, 0x43, &reg_val);
pci_write_config_byte(pdev, 0x43, reg_val | 0x80);
}
if ((pdev->vendor == PCI_VENDOR_ID_INTEL)
&& (pdev->device == PCI_DEVICE_ID_INTEL_82371AB_0)
&& (PCI_SLOT(pdev->devfn) == 0x0a)) {
/*
* Set top of main memory accessible by ISA or DMA
* devices to 16 Mb.
*/
pci_read_config_byte(pdev, 0x69, &reg_val);
pci_write_config_byte(pdev, 0x69, reg_val | 0xf0);
}
}
/*
* Activate Floppy Controller in the SMSC FDC37M817 Super I/O
* Controller.
* This should be done in the bios/bootprom and will be fixed in
* a later revision of YAMON (the MIPS boards boot prom).
*/
/* Entering config state. */
SMSC_WRITE(SMSC_CONFIG_ENTER, SMSC_CONFIG_REG);
/* Activate floppy controller. */
SMSC_WRITE(SMSC_CONFIG_DEVNUM, SMSC_CONFIG_REG);
SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY, SMSC_DATA_REG);
SMSC_WRITE(SMSC_CONFIG_ACTIVATE, SMSC_CONFIG_REG);
SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE, SMSC_DATA_REG);
/* Exit config state. */
SMSC_WRITE(SMSC_CONFIG_EXIT, SMSC_CONFIG_REG);
#endif
}
int __init
pcibios_enable_device(struct pci_dev *dev)
{
/* Not needed, since we enable all devices at startup. */
return 0;
}
void __init
pcibios_align_resource(void *data, struct resource *res,
unsigned long size, unsigned long align)
{
}
char * __init
pcibios_setup(char *str)
{
/* Nothing to do for now. */
return str;
}
struct pci_fixup pcibios_fixups[] = {
{ 0 }
};
#warning pcibios_update_resource() is now a generic implementation - please check
/*
* Called after each bus is probed, but before its children
* are examined.
*/
void __init pcibios_fixup_bus(struct pci_bus *b)
{
pci_read_bridge_bases(b);
}
unsigned __init int pcibios_assign_all_busses(void)
{
return 1;
}
#endif /* CONFIG_PCI */
...@@ -2,8 +2,6 @@ ...@@ -2,8 +2,6 @@
* Carsten Langgaard, carstenl@mips.com * Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
* *
* ########################################################################
*
* This program is free software; you can distribute it and/or modify it * This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as * under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation. * published by the Free Software Foundation.
...@@ -17,101 +15,84 @@ ...@@ -17,101 +15,84 @@
* with this program; if not, write to the Free Software Foundation, Inc., * with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
* *
* ########################################################################
*
* Putting things on the screen/serial line using YAMONs facilities. * Putting things on the screen/serial line using YAMONs facilities.
*
*/ */
#include <linux/config.h> #include <linux/config.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/serialP.h>
#include <linux/serial_reg.h> #include <linux/serial_reg.h>
#include <asm/system.h> #include <linux/spinlock.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/serial.h>
#ifdef CONFIG_MIPS_ATLAS #ifdef CONFIG_MIPS_ATLAS
#include <asm/mips-boards/atlas.h>
/* /*
* Atlas registers are memory mapped on 64-bit aligned boundaries and * Atlas registers are memory mapped on 64-bit aligned boundaries and
* only word access are allowed. * only word access are allowed.
* When reading the UART 8 bit registers only the LSB are valid. * When reading the UART 8 bit registers only the LSB are valid.
*/ */
unsigned int atlas_serial_in(struct async_struct *info, int offset) static inline unsigned int serial_in(int offset)
{ {
return (*(volatile unsigned int *)(info->port + mips_io_port_base + offset*8) & 0xff); return (*(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) & 0xff);
} }
void atlas_serial_out(struct async_struct *info, int offset, int value) static inline void serial_out(int offset, int value)
{ {
*(volatile unsigned int *)(info->port + mips_io_port_base + offset*8) = value; *(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) = value;
} }
#define serial_in atlas_serial_in #elif defined(CONFIG_MIPS_SEAD)
#define serial_out atlas_serial_out
#else #include <asm/mips-boards/sead.h>
static unsigned int serial_in(struct async_struct *info, int offset) /*
* SEAD registers are just like Atlas registers.
*/
static inline unsigned int serial_in(int offset)
{ {
return inb(info->port + offset); return (*(volatile unsigned int *)(mips_io_port_base + SEAD_UART0_REGS_BASE + offset*8) & 0xff);
} }
static void serial_out(struct async_struct *info, int offset, static inline void serial_out(int offset, int value)
int value)
{ {
outb(value, info->port + offset); *(volatile unsigned int *)(mips_io_port_base + SEAD_UART0_REGS_BASE + offset*8) = value;
} }
#endif
static struct serial_state rs_table[] = {
SERIAL_PORT_DFNS /* Defined in serial.h */
};
/*
* Hooks to fake "prom" console I/O before devices
* are fully initialized.
*/
static struct async_struct prom_port_info = {0};
void __init setup_prom_printf(int tty_no) { #else
struct serial_state *ser = &rs_table[tty_no];
prom_port_info.state = ser; static inline unsigned int serial_in(int offset)
prom_port_info.magic = SERIAL_MAGIC; {
prom_port_info.port = ser->port; return inb(0x3f8 + offset);
prom_port_info.flags = ser->flags; }
/* No setup of UART - assume YAMON left in sane state */ static inline void serial_out(int offset, int value)
{
outb(value, 0x3f8 + offset);
} }
#endif
int putPromChar(char c) int putPromChar(char c)
{ {
if (!prom_port_info.state) { /* need to init device first */ while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
return 0;
}
while ((serial_in(&prom_port_info, UART_LSR) & UART_LSR_THRE) == 0)
; ;
serial_out(&prom_port_info, UART_TX, c); serial_out(UART_TX, c);
return 1; return 1;
} }
char getPromChar(void) char getPromChar(void)
{ {
if (!prom_port_info.state) { /* need to init device first */ while (!(serial_in(UART_LSR) & 1))
return 0;
}
while (!(serial_in(&prom_port_info, UART_LSR) & 1))
; ;
return(serial_in(&prom_port_info, UART_RX)); return serial_in(UART_RX);
} }
static spinlock_t con_lock = SPIN_LOCK_UNLOCKED;
static char buf[1024]; static char buf[1024];
void __init prom_printf(char *fmt, ...) void __init prom_printf(char *fmt, ...)
...@@ -123,8 +104,7 @@ void __init prom_printf(char *fmt, ...) ...@@ -123,8 +104,7 @@ void __init prom_printf(char *fmt, ...)
int putPromChar(char); int putPromChar(char);
/* Low level, brute force, not SMP safe... */ spin_lock_irqsave(con_lock, flags);
save_and_cli(flags);
va_start(args, fmt); va_start(args, fmt);
l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */ l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */
va_end(args); va_end(args);
...@@ -133,8 +113,9 @@ void __init prom_printf(char *fmt, ...) ...@@ -133,8 +113,9 @@ void __init prom_printf(char *fmt, ...)
for (p = buf; p < buf_end; p++) { for (p = buf; p < buf_end; p++) {
/* Crude cr/nl handling is better than none */ /* Crude cr/nl handling is better than none */
if(*p == '\n')putPromChar('\r'); if (*p == '\n')
putPromChar('\r');
putPromChar(*p); putPromChar(*p);
} }
restore_flags(flags); spin_unlock_irqrestore(con_lock, flags);
} }
This diff is collapsed.
...@@ -23,58 +23,130 @@ ...@@ -23,58 +23,130 @@
*/ */
#include <linux/config.h> #include <linux/config.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/irq.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/kernel_stat.h> #include <linux/kernel_stat.h>
#include <linux/random.h> #include <linux/random.h>
#include <asm/irq.h> #include <asm/i8259.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/malta.h> #include <asm/mips-boards/malta.h>
#include <asm/mips-boards/maltaint.h> #include <asm/mips-boards/maltaint.h>
#include <asm/mips-boards/piix4.h> #include <asm/mips-boards/piix4.h>
#include <asm/mips-boards/msc01_pci.h>
#include <asm/gt64120.h> #include <asm/gt64120.h>
#include <asm/mips-boards/generic.h>
extern asmlinkage void mipsIRQ(void); extern asmlinkage void mipsIRQ(void);
extern int mips_pcibios_iack(void);
void malta_hw0_irqdispatch(struct pt_regs *regs) #ifdef CONFIG_KGDB
extern void breakpoint(void);
extern void set_debug_traps(void);
extern int remote_debug;
#endif
static spinlock_t mips_irq_lock = SPIN_LOCK_UNLOCKED;
static inline int get_int(int *irq)
{ {
int irq; unsigned long flags;
/* spin_lock_irqsave(&mips_irq_lock, flags);
* Determine highest priority pending interrupt by performing a PCI
* Interrupt Acknowledge cycle. *irq = mips_pcibios_iack();
*/
GT_READ(GT_PCI0_IACK_OFS, irq);
irq &= 0xFF;
/* /*
* IRQ7 is used to detect spurious interrupts. The interrupt * IRQ7 is used to detect spurious interrupts.
* acknowledge cycle returns IRQ7, if no interrupts is requested. We * The interrupt acknowledge cycle returns IRQ7, if no
* can differentiate between this situation and a "normal" IRQ7 by * interrupts is requested.
* reading the ISR. * We can differentiate between this situation and a
* "Normal" IRQ7 by reading the ISR.
*/ */
if (irq == 7) { if (*irq == 7)
outb(PIIX4_OCW3_SEL | PIIX4_OCW3_ISR, PIIX4_ICTLR1_OCW3); {
if (!(inb(PIIX4_ICTLR1_OCW3) & (1 << 7))) outb(PIIX4_OCW3_SEL | PIIX4_OCW3_ISR,
return; /* Spurious interrupt. */ PIIX4_ICTLR1_OCW3);
if (!(inb(PIIX4_ICTLR1_OCW3) & (1 << 7))) {
spin_unlock_irqrestore(&mips_irq_lock, flags);
printk("We got a spurious interrupt from PIIX4.\n");
atomic_inc(&irq_err_count);
return -1; /* Spurious interrupt. */
}
} }
spin_unlock_irqrestore(&mips_irq_lock, flags);
return 0;
}
void malta_hw0_irqdispatch(struct pt_regs *regs)
{
int irq;
if (get_int(&irq))
return; /* interrupt has already been cleared */
do_IRQ(irq, regs); do_IRQ(irq, regs);
} }
void corehi_irqdispatch(struct pt_regs *regs)
{
unsigned int data,datahi;
/* Mask out corehi interrupt. */
clear_c0_status(IE_IRQ3);
printk("CoreHI interrupt, shouldn't happen, so we die here!!!\n");
printk("epc : %08lx\nStatus: %08lx\nCause : %08lx\nbadVaddr : %08lx\n"
, regs->cp0_epc, regs->cp0_status, regs->cp0_cause, regs->cp0_badvaddr);
switch(mips_revision_corid) {
case MIPS_REVISION_CORID_CORE_MSC:
break;
case MIPS_REVISION_CORID_QED_RM5261:
case MIPS_REVISION_CORID_CORE_LV:
case MIPS_REVISION_CORID_CORE_FPGA:
GT_READ(GT_INTRCAUSE_OFS, data);
printk("GT_INTRCAUSE = %08x\n", data);
GT_READ(0x70, data);
GT_READ(0x78, datahi);
printk("GT_CPU_ERR_ADDR = %0x2%08x\n", datahi,data);
break;
case MIPS_REVISION_CORID_BONITO64:
case MIPS_REVISION_CORID_CORE_20K:
data = BONITO_INTISR;
printk("BONITO_INTISR = %08x\n", data);
data = BONITO_INTEN;
printk("BONITO_INTEN = %08x\n", data);
data = BONITO_INTPOL;
printk("BONITO_INTPOL = %08x\n", data);
data = BONITO_INTEDGE;
printk("BONITO_INTEDGE = %08x\n", data);
data = BONITO_INTSTEER;
printk("BONITO_INTSTEER = %08x\n", data);
data = BONITO_PCICMD;
printk("BONITO_PCICMD = %08x\n", data);
break;
}
/* We die here*/
die("CoreHi interrupt", regs);
}
void __init init_IRQ(void) void __init init_IRQ(void)
{ {
set_except_vector(0, mipsIRQ); set_except_vector(0, mipsIRQ);
init_generic_irq(); init_generic_irq();
init_i8259_irqs(); init_i8259_irqs();
#ifdef CONFIG_REMOTE_DEBUG #ifdef CONFIG_KGDB
if (remote_debug) { if (remote_debug) {
set_debug_traps(); set_debug_traps();
breakpoint(); breakpoint();
} }
#endif #endif
} }
...@@ -36,17 +36,20 @@ ...@@ -36,17 +36,20 @@
#include <asm/floppy.h> #include <asm/floppy.h>
#endif #endif
#include <asm/dma.h> #include <asm/dma.h>
#include <asm/time.h>
#include <asm/traps.h>
#ifdef CONFIG_VT
#include <linux/console.h>
#endif
#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE) #if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
extern void console_setup(char *, int *); extern void console_setup(char *, int *);
char serial_console[20]; char serial_console[20];
#endif #endif
#ifdef CONFIG_REMOTE_DEBUG #ifdef CONFIG_KGDB
extern void set_debug_traps(void);
extern void rs_kgdb_hook(int); extern void rs_kgdb_hook(int);
extern void breakpoint(void); int remote_debug = 0;
static int remote_debug = 0;
#endif #endif
extern struct ide_ops std_ide_ops; extern struct ide_ops std_ide_ops;
...@@ -56,6 +59,10 @@ extern struct kbd_ops std_kbd_ops; ...@@ -56,6 +59,10 @@ extern struct kbd_ops std_kbd_ops;
extern void mips_reboot_setup(void); extern void mips_reboot_setup(void);
extern void mips_time_init(void);
extern void mips_timer_setup(struct irqaction *irq);
extern unsigned long mips_rtc_get_time(void);
struct resource standard_io_resources[] = { struct resource standard_io_resources[] = {
{ "dma1", 0x00, 0x1f, IORESOURCE_BUSY }, { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
{ "timer", 0x40, 0x5f, IORESOURCE_BUSY }, { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
...@@ -65,9 +72,14 @@ struct resource standard_io_resources[] = { ...@@ -65,9 +72,14 @@ struct resource standard_io_resources[] = {
#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource)) #define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource))
const char *get_system_type(void)
{
return "MIPS Malta";
}
void __init malta_setup(void) void __init malta_setup(void)
{ {
#ifdef CONFIG_REMOTE_DEBUG #ifdef CONFIG_KGDB
int rs_putDebugChar(char); int rs_putDebugChar(char);
char rs_getDebugChar(void); char rs_getDebugChar(void);
extern int (*generic_putDebugChar)(char); extern int (*generic_putDebugChar)(char);
...@@ -93,7 +105,7 @@ void __init malta_setup(void) ...@@ -93,7 +105,7 @@ void __init malta_setup(void)
} }
#endif #endif
#ifdef CONFIG_REMOTE_DEBUG #ifdef CONFIG_KGDB
argptr = prom_getcmdline(); argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) { if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
int line; int line;
...@@ -119,17 +131,38 @@ void __init malta_setup(void) ...@@ -119,17 +131,38 @@ void __init malta_setup(void)
argptr = prom_getcmdline(); argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "nofpu")) != NULL) if ((argptr = strstr(argptr, "nofpu")) != NULL)
mips_cpu.options &= ~MIPS_CPU_FPU; cpu_data[0].options &= ~MIPS_CPU_FPU;
rtc_ops = &malta_rtc_ops; rtc_ops = &malta_rtc_ops;
#ifdef CONFIG_BLK_DEV_IDE #ifdef CONFIG_BLK_DEV_IDE
ide_ops = &std_ide_ops; ide_ops = &std_ide_ops;
#endif #endif
#ifdef CONFIG_BLK_DEV_FD #ifdef CONFIG_BLK_DEV_FD
fd_ops = &std_fd_ops; fd_ops = &std_fd_ops;
#endif #endif
#ifdef CONFIG_PC_KEYB #ifdef CONFIG_VT
kbd_ops = &std_kbd_ops; #if defined(CONFIG_VGA_CONSOLE)
conswitchp = &vga_con;
screen_info = (struct screen_info) {
0, 25, /* orig-x, orig-y */
0, /* unused */
0, /* orig-video-page */
0, /* orig-video-mode */
80, /* orig-video-cols */
0,0,0, /* ega_ax, ega_bx, ega_cx */
25, /* orig-video-lines */
1, /* orig-video-isVGA */
16 /* orig-video-points */
};
#elif defined(CONFIG_DUMMY_CONSOLE)
conswitchp = &dummy_con;
#endif
#endif #endif
mips_reboot_setup(); mips_reboot_setup();
board_time_init = mips_time_init;
board_timer_setup = mips_timer_setup;
rtc_get_time = mips_rtc_get_time;
} }
# #
# Carsten Langgaard, carstenl@mips.com # Carsten Langgaard, carstenl@mips.com
# Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. # Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
# #
# ######################################################################## # ########################################################################
# #
...@@ -19,8 +19,8 @@ ...@@ -19,8 +19,8 @@
# #
# ####################################################################### # #######################################################################
# #
# Makefile for the MIPS Malta specific kernel interface routines # Makefile for the MIPS SEAD specific kernel interface routines
# under Linux. # under Linux.
# #
obj-y := malta_int.o malta_rtc.o malta_setup.o obj-y := sead_int.o sead_setup.o sead_time.o
/* /*
* Carsten Langgaard, carstenl@mips.com * Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
* *
* ######################################################################## * ########################################################################
* *
...@@ -19,53 +19,97 @@ ...@@ -19,53 +19,97 @@
* *
* ######################################################################## * ########################################################################
* *
* Kernel command line creation using the prom monitor (YAMON) argc/argv. * Routines for generic manipulation of the interrupts found on the MIPS
* Sead board.
* *
*/ */
#include <linux/config.h> #include <linux/config.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/string.h> #include <linux/irq.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <asm/bootinfo.h> #include <asm/mips-boards/sead.h>
#include <asm/mips-boards/seadint.h>
/*#define DEBUG_CMDLINE*/ extern asmlinkage void mipsIRQ(void);
extern int prom_argc; void disable_sead_irq(unsigned int irq_nr)
extern int *_prom_argv; {
if (irq_nr == SEADINT_UART0)
clear_c0_status(0x00000400);
else
if (irq_nr == SEADINT_UART1)
clear_c0_status(0x00000800);
}
/* void enable_sead_irq(unsigned int irq_nr)
* A 32-bit PROM pass arguments and environment as 32-bit pointer. {
* This macro take care of sign extension. if (irq_nr == SEADINT_UART0)
*/ set_c0_status(0x00000400);
#define prom_argv(index) ((char *)(((int *)(int)_prom_argv)[(index)])) else
if (irq_nr == SEADINT_UART1)
set_c0_status(0x00000800);
}
static unsigned int startup_sead_irq(unsigned int irq)
{
enable_sead_irq(irq);
return 0; /* never anything pending */
}
#define shutdown_sead_irq disable_sead_irq
char arcs_cmdline[CL_SIZE]; #define mask_and_ack_sead_irq disable_sead_irq
char * __init prom_getcmdline(void) static void end_sead_irq(unsigned int irq)
{ {
return &(arcs_cmdline[0]); if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_sead_irq(irq);
} }
static struct hw_interrupt_type sead_irq_type = {
"SEAD",
startup_sead_irq,
shutdown_sead_irq,
enable_sead_irq,
disable_sead_irq,
mask_and_ack_sead_irq,
end_sead_irq,
NULL
};
void __init prom_init_cmdline(void) void sead_hw0_irqdispatch(struct pt_regs *regs)
{ {
char *cp; do_IRQ(0, regs);
int actr; }
actr = 1; /* Always ignore argv[0] */ void sead_hw1_irqdispatch(struct pt_regs *regs)
{
do_IRQ(1, regs);
}
cp = &(arcs_cmdline[0]); void __init init_IRQ(void)
while(actr < prom_argc) { {
strcpy(cp, prom_argv(actr)); int i;
cp += strlen(prom_argv(actr));
*cp++ = ' ';
actr++;
}
if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
--cp;
*cp = '\0';
#ifdef DEBUG_CMDLINE /*
prom_printf("prom_init_cmdline: %s\n", &(arcs_cmdline[0])); * Mask out all interrupt
#endif */
clear_c0_status(0x0000ff00);
/* Now safe to set the exception vector. */
set_except_vector(0, mipsIRQ);
init_generic_irq();
for (i = 0; i <= SEADINT_END; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
irq_desc[i].lock = SPIN_LOCK_UNLOCKED;
irq_desc[i].handler = &sead_irq_type;
}
} }
/* /*
* Carsten Langgaard, carstenl@mips.com * Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
*
* ########################################################################
* *
* This program is free software; you can distribute it and/or modify it * This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as * under the terms of the GNU General Public License (Version 2) as
...@@ -17,10 +15,7 @@ ...@@ -17,10 +15,7 @@
* with this program; if not, write to the Free Software Foundation, Inc., * with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
* *
* ######################################################################## * SEAD specific setup.
*
* Atlas specific setup, including init of the feature struct.
*
*/ */
#include <linux/config.h> #include <linux/config.h>
#include <linux/init.h> #include <linux/init.h>
...@@ -33,41 +28,26 @@ ...@@ -33,41 +28,26 @@
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/mips-boards/generic.h> #include <asm/mips-boards/generic.h>
#include <asm/mips-boards/prom.h> #include <asm/mips-boards/prom.h>
#include <asm/mips-boards/gt64120.h> #include <asm/mips-boards/seadint.h>
#include <asm/mips-boards/atlasint.h> #include <asm/time.h>
#include <asm/mmu_context.h>
#if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE) #if defined(CONFIG_SERIAL_CONSOLE) || defined(CONFIG_PROM_CONSOLE)
extern void console_setup(char *, int *); extern void console_setup(char *, int *);
char serial_console[20]; char serial_console[20];
#endif #endif
#ifdef CONFIG_REMOTE_DEBUG
extern void rs_kgdb_hook(int);
extern void saa9730_kgdb_hook(void);
extern void breakpoint(void);
int remote_debug = 0;
#endif
extern struct rtc_ops atlas_rtc_ops;
extern void mips_reboot_setup(void); extern void mips_reboot_setup(void);
extern void mips_time_init(void);
extern void mips_timer_setup(struct irqaction *irq);
void __init atlas_setup(void) const char *get_system_type(void)
{ {
#ifdef CONFIG_REMOTE_DEBUG return "MIPS SEAD";
int rs_putDebugChar(char); }
char rs_getDebugChar(void);
int saa9730_putDebugChar(char);
char saa9730_getDebugChar(void);
extern int (*putDebugChar)(char);
extern char (*getDebugChar)(void);
#endif
char *argptr;
current_cpu_data.asid_cache = ASID_FIRST_VERSION; void __init sead_setup(void)
TLBMISS_HANDLER_SETUP(); {
char *argptr;
ioport_resource.end = 0x7fffffff; ioport_resource.end = 0x7fffffff;
...@@ -85,39 +65,13 @@ void __init atlas_setup(void) ...@@ -85,39 +65,13 @@ void __init atlas_setup(void)
} }
#endif #endif
#ifdef CONFIG_REMOTE_DEBUG
argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
int line;
argptr += strlen("kgdb=ttyS");
if (*argptr != '0' && *argptr != '1')
printk("KGDB: Uknown serial line /dev/ttyS%c, "
"falling back to /dev/ttyS1\n", *argptr);
line = *argptr == '0' ? 0 : 1;
printk("KGDB: Using serial line /dev/ttyS%d for session\n",
line ? 1 : 0);
if(line == 0) {
rs_kgdb_hook(line);
putDebugChar = rs_putDebugChar;
getDebugChar = rs_getDebugChar;
} else {
saa9730_kgdb_hook();
putDebugChar = saa9730_putDebugChar;
getDebugChar = saa9730_getDebugChar;
}
prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
"please connect your debugger\n", line ? 1 : 0);
remote_debug = 1;
/* Breakpoints and stuff are in atlas_irq_setup() */
}
#endif
argptr = prom_getcmdline(); argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "nofpu")) != NULL) if ((argptr = strstr(argptr, "nofpu")) != NULL)
mips_cpu.options &= ~MIPS_CPU_FPU; cpu_data[0].options &= ~MIPS_CPU_FPU;
board_time_init = mips_time_init;
board_timer_setup = mips_timer_setup;
rtc_ops = &atlas_rtc_ops; mips_reboot_setup();
} }
/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Setting up the clock on the MIPS boards.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
#include <asm/hardirq.h>
#include <asm/cpu.h>
#include <linux/interrupt.h>
#include <linux/timex.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/prom.h>
extern volatile unsigned long wall_jiffies;
static unsigned long r4k_offset; /* Amount to increment compare reg each time */
static unsigned long r4k_cur; /* What counter should be at next timer irq */
#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ5)
static char display_string[] = " LINUX ON SEAD ";
static unsigned int display_count = 0;
#define MAX_DISPLAY_COUNT (sizeof(display_string) - 8)
#define MIPS_CPU_TIMER_IRQ 7
static unsigned int timer_tick_count=0;
static inline void ack_r4ktimer(unsigned long newval)
{
write_c0_compare(newval);
}
/*
* There are a lot of conceptually broken versions of the MIPS timer interrupt
* handler floating around. This one is rather different, but the algorithm
* is provably more robust.
*/
void mips_timer_interrupt(struct pt_regs *regs)
{
int cpu = smp_processor_id();
int irq = MIPS_CPU_TIMER_IRQ;
irq_enter();
do {
kstat_cpu(cpu).irqs[irq]++;
do_timer(regs);
if ((timer_tick_count++ % HZ) == 0) {
mips_display_message(&display_string[display_count++]);
if (display_count == MAX_DISPLAY_COUNT)
display_count = 0;
}
r4k_cur += r4k_offset;
ack_r4ktimer(r4k_cur);
} while (((unsigned long)read_c0_count()
- r4k_cur) < 0x7fffffff);
irq_exit();
if (softirq_pending(cpu))
do_softirq();
}
/*
* Figure out the r4k offset, the amount to increment the compare
* register for each time tick.
*/
static unsigned long __init cal_r4koff(void)
{
/*
* The SEAD board doesn't have a real time clock, so we can't
* really calculate the timer offset.
* For now we hardwire the SEAD board frequency to 12MHz.
*/
return(6000000/HZ);
}
void __init mips_time_init(void)
{
unsigned int est_freq, flags;
local_irq_save(flags);
/* Start r4k counter. */
write_c0_count(0);
printk("calculating r4koff... ");
r4k_offset = cal_r4koff();
printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
if ((read_c0_prid() & 0xffff00) ==
(PRID_COMP_MIPS | PRID_IMP_20KC))
est_freq = r4k_offset*HZ;
else
est_freq = 2*r4k_offset*HZ;
est_freq += 5000; /* round */
est_freq -= est_freq%10000;
printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
(est_freq%1000000)*100/1000000);
local_irq_restore(flags);
}
void __init mips_timer_setup(struct irqaction *irq)
{
/* we are using the cpu counter for timer interrupts */
irq->handler = no_action; /* we use our own handler */
setup_irq(MIPS_CPU_TIMER_IRQ, irq);
/* to generate the first timer interrupt */
r4k_cur = (read_c0_count() + r4k_offset);
write_c0_compare(r4k_cur);
set_c0_status(ALLINTS);
}
#
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
# CONFIG_MIPS32 is not set
CONFIG_MIPS64=y
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
#
# Loadable module support
#
# CONFIG_MODULES is not set
#
# Machine selection
#
# CONFIG_ACER_PICA_61 is not set
# CONFIG_CASIO_E55 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_DECSTATION is not set
# CONFIG_MIPS_EV64120 is not set
# CONFIG_MIPS_EV96100 is not set
# CONFIG_MIPS_IVR is not set
# CONFIG_LASAT is not set
# CONFIG_HP_LASERJET is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MIPS_ITE8172 is not set
CONFIG_MIPS_ATLAS=y
# CONFIG_MIPS_MAGNUM_4000 is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5476 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_NEC_EAGLE is not set
# CONFIG_OLIVETTI_M700 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_TANBAC_TB0226 is not set
# CONFIG_TANBAC_TB0229 is not set
# CONFIG_VICTOR_MPC30X is not set
# CONFIG_ZAO_CAPCELLA is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_NONCOHERENT_IO=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_MIPS_BOARDS_GEN=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_BOOT_ELF32=y
CONFIG_L1_CACHE_SHIFT=5
# CONFIG_FB is not set
#
# CPU selection
#
# CONFIG_CPU_MIPS32 is not set
# CONFIG_CPU_MIPS64 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
CONFIG_CPU_R5000=y
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
CONFIG_KALLSYMS=y
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# CONFIG_PCI is not set
CONFIG_MMU=y
# CONFIG_HOTPLUG is not set
#
# Executable file formats
#
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_MIPS32_COMPAT=y
CONFIG_COMPAT=y
CONFIG_MIPS32_O32=y
# CONFIG_MIPS32_N32 is not set
CONFIG_BINFMT_ELF32=y
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNP is not set
#
# Generic Driver Options
#
# CONFIG_FW_LOADER is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
CONFIG_SCSI=y
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_REPORT_LUNS is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
#
# SCSI low-level drivers
#
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_DEBUG is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# I2O device support
#
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_PACKET is not set
CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
CONFIG_UNIX=y
CONFIG_NET_KEY=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_IPV6 is not set
# CONFIG_XFRM_USER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
CONFIG_IPV6_SCTP__=y
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_LLC is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Token Ring devices (depends on LLC=y)
#
# CONFIG_SHAPER is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set
#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set
#
# ISDN subsystem
#
# CONFIG_ISDN_BOOL is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
#
# I2C support
#
# CONFIG_I2C is not set
#
# I2C Hardware Sensors Mainboard support
#
#
# I2C Hardware Sensors Chip support
#
# CONFIG_I2C_SENSOR is not set
#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
CONFIG_AUTOFS_FS=y
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
CONFIG_DEVPTS_FS=y
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
# CONFIG_TMPFS is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
CONFIG_EFS_FS=y
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_GSS is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Graphics support
#
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_GADGET is not set
#
# Bluetooth support
#
# CONFIG_BT is not set
#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
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#
# Carsten Langgaard, carstenl@mips.com
# Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
#
# ########################################################################
#
# This program is free software; you can distribute it and/or modify it
# under the terms of the GNU General Public License (Version 2) as
# published by the Free Software Foundation.
#
# This program is distributed in the hope it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
#
# #######################################################################
#
# Makefile for the MIPS Atlas specific kernel interface routines
# under Linux.
#
obj-y := atlas_int.o atlas_rtc.o atlas_setup.o
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#
# Carsten Langgaard, carstenl@mips.com
# Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
#
# ########################################################################
#
# This program is free software; you can distribute it and/or modify it
# under the terms of the GNU General Public License (Version 2) as
# published by the Free Software Foundation.
#
# This program is distributed in the hope it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
#
# #######################################################################
#
# Makefile for the MIPS boards generic routines under Linux.
#
obj-y := mipsIRQ.o pci.o reset.o display.o init.o \
memory.o printf.o cmdline.o time.o
obj-$(CONFIG_REMOTE_DEBUG) += gdb_hook.o
EXTRA_AFLAGS := $(CFLAGS)
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/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*
* ########################################################################
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* ########################################################################
*
* PROM library initialisation code.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <asm/io.h>
#include <asm/mips-boards/prom.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/gt64120.h>
#include <asm/mips-boards/malta.h>
/* Environment variable */
typedef struct
{
char *name;
char *val;
}t_env_var;
int prom_argc;
int *_prom_argv, *_prom_envp;
/*
* A 32-bit PROM pass arguments and environment as 32-bit pointer.
* This macro take care of sign extension.
*/
#define prom_envp(index) ((char *)(((int *)(int)_prom_envp)[(index)]))
int init_debug = 0;
char *prom_getenv(char *envname)
{
/*
* Return a pointer to the given environment variable.
* We're using 64-bit pointers, but all pointers in the PROM
* structures are only 32-bit, so we need some workarounds.
*/
int i, index=0;
i = strlen(envname);
while(prom_envp(index)) {
if(strncmp(envname, prom_envp(index), i) == 0) {
return(prom_envp(index+1));
}
index += 2;
}
return(NULL);
}
static inline unsigned char str2hexnum(unsigned char c)
{
if(c >= '0' && c <= '9')
return c - '0';
if(c >= 'a' && c <= 'f')
return c - 'a' + 10;
return 0; /* foo */
}
static inline void str2eaddr(unsigned char *ea, unsigned char *str)
{
int i;
for(i = 0; i < 6; i++) {
unsigned char num;
if((*str == '.') || (*str == ':'))
str++;
num = str2hexnum(*str++) << 4;
num |= (str2hexnum(*str++));
ea[i] = num;
}
}
int get_ethernet_addr(char *ethernet_addr)
{
char *ethaddr_str;
ethaddr_str = prom_getenv("ethaddr");
if (!ethaddr_str) {
printk("ethaddr not set in boot prom\n");
return -1;
}
str2eaddr(ethernet_addr, ethaddr_str);
if (init_debug > 1)
{
int i;
printk("get_ethernet_addr: ");
for (i=0; i<5; i++)
printk("%02x:", (unsigned char)*(ethernet_addr+i));
printk("%02x\n", *(ethernet_addr+i));
}
return 0;
}
int __init prom_init(int argc, char **argv, char **envp)
{
prom_argc = argc;
_prom_argv = (int *)argv;
_prom_envp = (int *)envp;
mips_display_message("LINUX");
/*
* Setup the North bridge to do Master byte-lane swapping when
* running in bigendian.
*/
#if defined(__MIPSEL__)
GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
GT_PCI0_CMD_SBYTESWAP_BIT);
#else
GT_WRITE(GT_PCI0_CMD_OFS, 0);
#endif
#if defined(CONFIG_MIPS_MALTA)
mips_io_port_base = MALTA_PORT_BASE;
#else
mips_io_port_base = KSEG1;
#endif
setup_prom_printf(0);
prom_printf("\nLINUX started...\n");
prom_init_cmdline();
prom_meminit();
return 0;
}
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