Commit 5f06652a authored by Dave Jones's avatar Dave Jones

[AGPGART] Merge NVIDIA nForce / nForce2 AGP driver.

Based upon code written by NVIDIA for agpgart 2.4, forward ported and
cleaned up slightly by me. This still needs work, and is untested.
parent 3370f17c
...@@ -135,3 +135,11 @@ config AGP_ALPHA_CORE ...@@ -135,3 +135,11 @@ config AGP_ALPHA_CORE
depends on AGP && (ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL) depends on AGP && (ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL)
default AGP default AGP
config AGP_NVIDIA
tristate "NVIDIA nForce/nForce2 chipset support"
depends on AGP && !X86_64
---help---
This option gives you AGP support for the GLX component of the
XFree86 4.x on the following NVIDIA chipsets. The supported chipsets
include nForce and nForce2
...@@ -17,5 +17,5 @@ obj-$(CONFIG_AGP_I460) += i460-agp.o ...@@ -17,5 +17,5 @@ obj-$(CONFIG_AGP_I460) += i460-agp.o
obj-$(CONFIG_AGP_HP_ZX1) += hp-agp.o obj-$(CONFIG_AGP_HP_ZX1) += hp-agp.o
obj-$(CONFIG_AGP_AMD_8151) += amd-k8-agp.o obj-$(CONFIG_AGP_AMD_8151) += amd-k8-agp.o
obj-$(CONFIG_AGP_ALPHA_CORE) += alpha-agp.o obj-$(CONFIG_AGP_ALPHA_CORE) += alpha-agp.o
obj-$(CONFIG_AGP_NVIDIA) += nvidia=agp.o
...@@ -358,6 +358,17 @@ struct agp_bridge_data { ...@@ -358,6 +358,17 @@ struct agp_bridge_data {
#define SVWRKS_POSTFLUSH 0x14 #define SVWRKS_POSTFLUSH 0x14
#define SVWRKS_DIRFLUSH 0x0c #define SVWRKS_DIRFLUSH 0x0c
/* NVIDIA registers */
#define NVIDIA_0_APBASE 0x10
#define NVIDIA_0_APSIZE 0x80
#define NVIDIA_1_WBC 0xf0
#define NVIDIA_2_GARTCTRL 0xd0
#define NVIDIA_2_APBASE 0xd8
#define NVIDIA_2_APLIMIT 0xdc
#define NVIDIA_2_ATTBASE(i) (0xe0 + (i) * 4)
#define NVIDIA_3_APBASE 0x50
#define NVIDIA_3_APLIMIT 0x54
/* HP ZX1 SBA registers */ /* HP ZX1 SBA registers */
#define HP_ZX1_CTRL 0x200 #define HP_ZX1_CTRL 0x200
#define HP_ZX1_IBASE 0x300 #define HP_ZX1_IBASE 0x300
......
This diff is collapsed.
...@@ -46,6 +46,9 @@ enum chipset_type { ...@@ -46,6 +46,9 @@ enum chipset_type {
SVWRKS_GENERIC, SVWRKS_GENERIC,
HP_ZX1, HP_ZX1,
ALPHA_CORE_AGP, ALPHA_CORE_AGP,
NVIDIA_GENERIC,
NVIDIA_NFORCE,
NVIDIA_NFORCE2,
}; };
struct agp_version { struct agp_version {
......
...@@ -1007,7 +1007,9 @@ ...@@ -1007,7 +1007,9 @@
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_550XGL 0x017B #define PCI_DEVICE_ID_NVIDIA_QUADRO4_550XGL 0x017B
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_500_GOGL 0x017C #define PCI_DEVICE_ID_NVIDIA_QUADRO4_500_GOGL 0x017C
#define PCI_DEVICE_ID_NVIDIA_IGEFORCE2 0x01a0 #define PCI_DEVICE_ID_NVIDIA_IGEFORCE2 0x01a0
#define PCI_DEVICE_ID_NVIDIA_NFORCE 0x01a4
#define PCI_DEVICE_ID_NVIDIA_NFORCE_IDE 0x01bc #define PCI_DEVICE_ID_NVIDIA_NFORCE_IDE 0x01bc
#define PCI_DEVICE_ID_NVIDIA_NFORCE2 0x01e0
#define PCI_DEVICE_ID_NVIDIA_GEFORCE3 0x0200 #define PCI_DEVICE_ID_NVIDIA_GEFORCE3 0x0200
#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_1 0x0201 #define PCI_DEVICE_ID_NVIDIA_GEFORCE3_1 0x0201
#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_2 0x0202 #define PCI_DEVICE_ID_NVIDIA_GEFORCE3_2 0x0202
......
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