Commit 612762e8 authored by Andy Gross's avatar Andy Gross Committed by Mark Brown

spi: qup: Add DMA capabilities

This patch adds DMA capabilities to the spi-qup driver.  If DMA channels are
present, the QUP will use DMA instead of block mode for transfers to/from SPI
peripherals for transactions larger than the length of a block.
Signed-off-by: default avatarAndy Gross <agross@codeaurora.org>
Signed-off-by: default avatarStanimir Varbanov <stanimir.varbanov@linaro.org>
Reviewed-by: Ivan T. Ivanov <iivanov@mm-sol.com
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent c517d838
...@@ -33,6 +33,11 @@ Optional properties: ...@@ -33,6 +33,11 @@ Optional properties:
nodes. If unspecified, a single SPI device without a chip nodes. If unspecified, a single SPI device without a chip
select can be used. select can be used.
- dmas: Two DMA channel specifiers following the convention outlined
in bindings/dma/dma.txt
- dma-names: Names for the dma channels, if present. There must be at
least one channel named "tx" for transmit and named "rx" for
receive.
SPI slave nodes must be children of the SPI master node and can contain SPI slave nodes must be children of the SPI master node and can contain
properties described in Documentation/devicetree/bindings/spi/spi-bus.txt properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
...@@ -51,6 +56,9 @@ Example: ...@@ -51,6 +56,9 @@ Example:
clocks = <&gcc GCC_BLSP2_QUP2_SPI_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; clocks = <&gcc GCC_BLSP2_QUP2_SPI_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "core", "iface"; clock-names = "core", "iface";
dmas = <&blsp1_bam 13>, <&blsp1_bam 12>;
dma-names = "rx", "tx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&spi8_default>; pinctrl-0 = <&spi8_default>;
......
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