Commit 657a06df authored by Serge Semin's avatar Serge Semin Committed by Linus Walleij

dt-bindings: gpio: Convert snps,dw-apb-gpio to DT schema

Modern device tree bindings are supposed to be created as YAML-files
in accordance with DT schema. This commit replaces Synopsys DW GPIO
legacy bare text binding with YAML file. As before the binding file
states that the corresponding dts node is supposed to be compatible
with generic DW I2C controller indicated by the "snps,dw-apb-gpio"
compatible string and to provide a mandatory registers memory range.
It may also have an optional clock and reset phandle references.

There must be specified at least one subnode with
"snps,dw-apb-gpio-port" compatible string indicating the GPIO port,
which would actually export the GPIO controller functionality. Such
nodes should have traditional GPIO controller properties together
with optional interrupt-controller attributes if the corresponding
controller was synthesized to detect and report the input values
change to the parental IRQ controller.
Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Reviewed-by: default avatarAndy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200323195401.30338-2-Sergey.Semin@baikalelectronics.ruSigned-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 04fd1ca7
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Synopsys DesignWare APB GPIO controller
description: |
Synopsys DesignWare GPIO controllers have a configurable number of ports,
each of which are intended to be represented as child nodes with the generic
GPIO-controller properties as desribed in this bindings file.
maintainers:
- Hoan Tran <hoan@os.amperecomputing.com>
properties:
$nodename:
pattern: "^gpio@[0-9a-f]+$"
compatible:
const: snps,dw-apb-gpio
"#address-cells":
const: 1
"#size-cells":
const: 0
reg:
maxItems: 1
clocks:
items:
- description: APB interface clock source
clock-names:
items:
- const: bus
resets:
maxItems: 1
patternProperties:
"^gpio-(port|controller)@[0-9a-f]+$":
type: object
properties:
compatible:
const: snps,dw-apb-gpio-port
reg:
maxItems: 1
gpio-controller: true
'#gpio-cells':
const: 2
snps,nr-gpios:
description: The number of GPIO pins exported by the port.
default: 32
allOf:
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 1
maximum: 32
interrupts:
description: |
The interrupts to the parent controller raised when GPIOs generate
the interrupts. If the controller provides one combined interrupt
for all GPIOs, specify a single interrupt. If the controller provides
one interrupt for each GPIO, provide a list of interrupts that
correspond to each of the GPIO pins.
minItems: 1
maxItems: 32
interrupt-controller: true
'#interrupt-cells':
const: 2
required:
- compatible
- reg
- gpio-controller
- '#gpio-cells'
dependencies:
interrupt-controller: [ interrupts ]
additionalProperties: false
additionalProperties: false
required:
- compatible
- reg
- "#address-cells"
- "#size-cells"
examples:
- |
gpio: gpio@20000 {
compatible = "snps,dw-apb-gpio";
reg = <0x20000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
porta: gpio-port@0 {
compatible = "snps,dw-apb-gpio-port";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <8>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&vic1>;
interrupts = <0>;
};
portb: gpio-port@1 {
compatible = "snps,dw-apb-gpio-port";
reg = <1>;
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <8>;
};
};
...
* Synopsys DesignWare APB GPIO controller
Required properties:
- compatible : Should contain "snps,dw-apb-gpio"
- reg : Address and length of the register set for the device.
- #address-cells : should be 1 (for addressing port subnodes).
- #size-cells : should be 0 (port subnodes).
The GPIO controller has a configurable number of ports, each of which are
represented as child nodes with the following properties:
Required properties:
- compatible : "snps,dw-apb-gpio-port"
- gpio-controller : Marks the device node as a gpio controller.
- #gpio-cells : Should be two. The first cell is the pin number and
the second cell is used to specify the gpio polarity:
0 = active high
1 = active low
- reg : The integer port index of the port, a single cell.
Optional properties:
- interrupt-controller : The first port may be configured to be an interrupt
controller.
- #interrupt-cells : Specifies the number of cells needed to encode an
interrupt. Shall be set to 2. The first cell defines the interrupt number,
the second encodes the triger flags encoded as described in
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
- interrupts : The interrupts to the parent controller raised when GPIOs
generate the interrupts. If the controller provides one combined interrupt
for all GPIOs, specify a single interrupt. If the controller provides one
interrupt for each GPIO, provide a list of interrupts that correspond to each
of the GPIO pins. When specifying multiple interrupts, if any are unconnected,
use the interrupts-extended property to specify the interrupts and set the
interrupt controller handle for unused interrupts to 0.
- snps,nr-gpios : The number of pins in the port, a single cell.
- resets : Reset line for the controller.
Example:
gpio: gpio@20000 {
compatible = "snps,dw-apb-gpio";
reg = <0x20000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
porta: gpio@0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <8>;
reg = <0>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&vic1>;
interrupts = <0>;
};
portb: gpio@1 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
snps,nr-gpios = <8>;
reg = <1>;
};
};
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