Commit 660a5704 authored by Andrew Lunn's avatar Andrew Lunn Committed by Jakub Kicinski

net: Remove C45 check in C22 only MDIO bus drivers

The MDIO core should not pass a C45 request via the C22 API call any
more. So remove the tests from the drivers.
Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Reviewed-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 45d564bf
...@@ -1777,9 +1777,6 @@ static int ksz_sw_mdio_read(struct mii_bus *bus, int addr, int regnum) ...@@ -1777,9 +1777,6 @@ static int ksz_sw_mdio_read(struct mii_bus *bus, int addr, int regnum)
u16 val; u16 val;
int ret; int ret;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
ret = dev->dev_ops->r_phy(dev, addr, regnum, &val); ret = dev->dev_ops->r_phy(dev, addr, regnum, &val);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -1792,9 +1789,6 @@ static int ksz_sw_mdio_write(struct mii_bus *bus, int addr, int regnum, ...@@ -1792,9 +1789,6 @@ static int ksz_sw_mdio_write(struct mii_bus *bus, int addr, int regnum,
{ {
struct ksz_device *dev = bus->priv; struct ksz_device *dev = bus->priv;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
return dev->dev_ops->w_phy(dev, addr, regnum, val); return dev->dev_ops->w_phy(dev, addr, regnum, val);
} }
......
...@@ -781,9 +781,6 @@ static int a5psw_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg) ...@@ -781,9 +781,6 @@ static int a5psw_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg)
u32 cmd, status; u32 cmd, status;
int ret; int ret;
if (phy_reg & MII_ADDR_C45)
return -EOPNOTSUPP;
cmd = A5PSW_MDIO_COMMAND_READ; cmd = A5PSW_MDIO_COMMAND_READ;
cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_REG_ADDR, phy_reg); cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_REG_ADDR, phy_reg);
cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_PHY_ADDR, phy_id); cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_PHY_ADDR, phy_id);
...@@ -809,9 +806,6 @@ static int a5psw_mdio_write(struct mii_bus *bus, int phy_id, int phy_reg, ...@@ -809,9 +806,6 @@ static int a5psw_mdio_write(struct mii_bus *bus, int phy_id, int phy_reg,
struct a5psw *a5psw = bus->priv; struct a5psw *a5psw = bus->priv;
u32 cmd; u32 cmd;
if (phy_reg & MII_ADDR_C45)
return -EOPNOTSUPP;
cmd = FIELD_PREP(A5PSW_MDIO_COMMAND_REG_ADDR, phy_reg); cmd = FIELD_PREP(A5PSW_MDIO_COMMAND_REG_ADDR, phy_reg);
cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_PHY_ADDR, phy_id); cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_PHY_ADDR, phy_id);
......
...@@ -235,9 +235,6 @@ static int sja1105_base_tx_mdio_read(struct mii_bus *bus, int phy, int reg) ...@@ -235,9 +235,6 @@ static int sja1105_base_tx_mdio_read(struct mii_bus *bus, int phy, int reg)
u32 tmp; u32 tmp;
int rc; int rc;
if (reg & MII_ADDR_C45)
return -EOPNOTSUPP;
rc = sja1105_xfer_u32(priv, SPI_READ, regs->mdio_100base_tx + reg, rc = sja1105_xfer_u32(priv, SPI_READ, regs->mdio_100base_tx + reg,
&tmp, NULL); &tmp, NULL);
if (rc < 0) if (rc < 0)
...@@ -254,9 +251,6 @@ static int sja1105_base_tx_mdio_write(struct mii_bus *bus, int phy, int reg, ...@@ -254,9 +251,6 @@ static int sja1105_base_tx_mdio_write(struct mii_bus *bus, int phy, int reg,
const struct sja1105_regs *regs = priv->info->regs; const struct sja1105_regs *regs = priv->info->regs;
u32 tmp = val; u32 tmp = val;
if (reg & MII_ADDR_C45)
return -EOPNOTSUPP;
return sja1105_xfer_u32(priv, SPI_WRITE, regs->mdio_100base_tx + reg, return sja1105_xfer_u32(priv, SPI_WRITE, regs->mdio_100base_tx + reg,
&tmp, NULL); &tmp, NULL);
} }
......
...@@ -1275,9 +1275,6 @@ static int owl_emac_mdio_read(struct mii_bus *bus, int addr, int regnum) ...@@ -1275,9 +1275,6 @@ static int owl_emac_mdio_read(struct mii_bus *bus, int addr, int regnum)
u32 data, tmp; u32 data, tmp;
int ret; int ret;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
data = OWL_EMAC_BIT_MAC_CSR10_SB; data = OWL_EMAC_BIT_MAC_CSR10_SB;
data |= OWL_EMAC_VAL_MAC_CSR10_OPCODE_RD << OWL_EMAC_OFF_MAC_CSR10_OPCODE; data |= OWL_EMAC_VAL_MAC_CSR10_OPCODE_RD << OWL_EMAC_OFF_MAC_CSR10_OPCODE;
...@@ -1305,9 +1302,6 @@ owl_emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val) ...@@ -1305,9 +1302,6 @@ owl_emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
struct owl_emac_priv *priv = bus->priv; struct owl_emac_priv *priv = bus->priv;
u32 data, tmp; u32 data, tmp;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
data = OWL_EMAC_BIT_MAC_CSR10_SB; data = OWL_EMAC_BIT_MAC_CSR10_SB;
data |= OWL_EMAC_VAL_MAC_CSR10_OPCODE_WR << OWL_EMAC_OFF_MAC_CSR10_OPCODE; data |= OWL_EMAC_VAL_MAC_CSR10_OPCODE_WR << OWL_EMAC_OFF_MAC_CSR10_OPCODE;
......
...@@ -130,9 +130,6 @@ static int tsnep_mdiobus_read(struct mii_bus *bus, int addr, int regnum) ...@@ -130,9 +130,6 @@ static int tsnep_mdiobus_read(struct mii_bus *bus, int addr, int regnum)
u32 md; u32 md;
int retval; int retval;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
md = ECM_MD_READ; md = ECM_MD_READ;
if (!adapter->suppress_preamble) if (!adapter->suppress_preamble)
md |= ECM_MD_PREAMBLE; md |= ECM_MD_PREAMBLE;
...@@ -154,9 +151,6 @@ static int tsnep_mdiobus_write(struct mii_bus *bus, int addr, int regnum, ...@@ -154,9 +151,6 @@ static int tsnep_mdiobus_write(struct mii_bus *bus, int addr, int regnum,
u32 md; u32 md;
int retval; int retval;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
md = ECM_MD_WRITE; md = ECM_MD_WRITE;
if (!adapter->suppress_preamble) if (!adapter->suppress_preamble)
md |= ECM_MD_PREAMBLE; md |= ECM_MD_PREAMBLE;
......
...@@ -146,9 +146,6 @@ static int orion_mdio_smi_read(struct mii_bus *bus, int mii_id, ...@@ -146,9 +146,6 @@ static int orion_mdio_smi_read(struct mii_bus *bus, int mii_id,
u32 val; u32 val;
int ret; int ret;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
ret = orion_mdio_wait_ready(&orion_mdio_smi_ops, bus); ret = orion_mdio_wait_ready(&orion_mdio_smi_ops, bus);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -177,9 +174,6 @@ static int orion_mdio_smi_write(struct mii_bus *bus, int mii_id, ...@@ -177,9 +174,6 @@ static int orion_mdio_smi_write(struct mii_bus *bus, int mii_id,
struct orion_mdio_dev *dev = bus->priv; struct orion_mdio_dev *dev = bus->priv;
int ret; int ret;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
ret = orion_mdio_wait_ready(&orion_mdio_smi_ops, bus); ret = orion_mdio_wait_ready(&orion_mdio_smi_ops, bus);
if (ret < 0) if (ret < 0)
return ret; return ret;
......
...@@ -1378,9 +1378,6 @@ static int mtk_star_mdio_read(struct mii_bus *mii, int phy_id, int regnum) ...@@ -1378,9 +1378,6 @@ static int mtk_star_mdio_read(struct mii_bus *mii, int phy_id, int regnum)
unsigned int val, data; unsigned int val, data;
int ret; int ret;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
mtk_star_mdio_rwok_clear(priv); mtk_star_mdio_rwok_clear(priv);
val = (regnum << MTK_STAR_OFF_PHY_CTRL0_PREG); val = (regnum << MTK_STAR_OFF_PHY_CTRL0_PREG);
...@@ -1407,9 +1404,6 @@ static int mtk_star_mdio_write(struct mii_bus *mii, int phy_id, ...@@ -1407,9 +1404,6 @@ static int mtk_star_mdio_write(struct mii_bus *mii, int phy_id,
struct mtk_star_priv *priv = mii->priv; struct mtk_star_priv *priv = mii->priv;
unsigned int val; unsigned int val;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
mtk_star_mdio_rwok_clear(priv); mtk_star_mdio_rwok_clear(priv);
val = data; val = data;
......
...@@ -213,9 +213,6 @@ static int mlxbf_gige_mdio_read(struct mii_bus *bus, int phy_add, int phy_reg) ...@@ -213,9 +213,6 @@ static int mlxbf_gige_mdio_read(struct mii_bus *bus, int phy_add, int phy_reg)
int ret; int ret;
u32 val; u32 val;
if (phy_reg & MII_ADDR_C45)
return -EOPNOTSUPP;
/* Send mdio read request */ /* Send mdio read request */
cmd = mlxbf_gige_mdio_create_cmd(priv->mdio_gw, 0, phy_add, phy_reg, cmd = mlxbf_gige_mdio_create_cmd(priv->mdio_gw, 0, phy_add, phy_reg,
MLXBF_GIGE_MDIO_CL22_READ); MLXBF_GIGE_MDIO_CL22_READ);
...@@ -249,9 +246,6 @@ static int mlxbf_gige_mdio_write(struct mii_bus *bus, int phy_add, ...@@ -249,9 +246,6 @@ static int mlxbf_gige_mdio_write(struct mii_bus *bus, int phy_add,
u32 cmd; u32 cmd;
int ret; int ret;
if (phy_reg & MII_ADDR_C45)
return -EOPNOTSUPP;
/* Send mdio write request */ /* Send mdio write request */
cmd = mlxbf_gige_mdio_create_cmd(priv->mdio_gw, val, phy_add, phy_reg, cmd = mlxbf_gige_mdio_create_cmd(priv->mdio_gw, val, phy_add, phy_reg,
MLXBF_GIGE_MDIO_CL22_WRITE); MLXBF_GIGE_MDIO_CL22_WRITE);
......
...@@ -61,9 +61,6 @@ static int spl2sw_mii_read(struct mii_bus *bus, int addr, int regnum) ...@@ -61,9 +61,6 @@ static int spl2sw_mii_read(struct mii_bus *bus, int addr, int regnum)
{ {
struct spl2sw_common *comm = bus->priv; struct spl2sw_common *comm = bus->priv;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
return spl2sw_mdio_access(comm, SPL2SW_MDIO_READ_CMD, addr, regnum, 0); return spl2sw_mdio_access(comm, SPL2SW_MDIO_READ_CMD, addr, regnum, 0);
} }
...@@ -72,9 +69,6 @@ static int spl2sw_mii_write(struct mii_bus *bus, int addr, int regnum, u16 val) ...@@ -72,9 +69,6 @@ static int spl2sw_mii_write(struct mii_bus *bus, int addr, int regnum, u16 val)
struct spl2sw_common *comm = bus->priv; struct spl2sw_common *comm = bus->priv;
int ret; int ret;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
ret = spl2sw_mdio_access(comm, SPL2SW_MDIO_WRITE_CMD, addr, regnum, val); ret = spl2sw_mdio_access(comm, SPL2SW_MDIO_WRITE_CMD, addr, regnum, val);
if (ret < 0) if (ret < 0)
return ret; return ret;
......
...@@ -297,9 +297,6 @@ static int i2c_mii_read_rollball(struct mii_bus *bus, int phy_id, int reg) ...@@ -297,9 +297,6 @@ static int i2c_mii_read_rollball(struct mii_bus *bus, int phy_id, int reg)
int bus_addr, ret; int bus_addr, ret;
u16 val; u16 val;
if (!(reg & MII_ADDR_C45))
return -EOPNOTSUPP;
bus_addr = i2c_mii_phy_addr(phy_id); bus_addr = i2c_mii_phy_addr(phy_id);
if (bus_addr != ROLLBALL_PHY_I2C_ADDR) if (bus_addr != ROLLBALL_PHY_I2C_ADDR)
return 0xffff; return 0xffff;
...@@ -331,9 +328,6 @@ static int i2c_mii_write_rollball(struct mii_bus *bus, int phy_id, int reg, ...@@ -331,9 +328,6 @@ static int i2c_mii_write_rollball(struct mii_bus *bus, int phy_id, int reg,
int bus_addr, ret; int bus_addr, ret;
u8 buf[6]; u8 buf[6];
if (!(reg & MII_ADDR_C45))
return -EOPNOTSUPP;
bus_addr = i2c_mii_phy_addr(phy_id); bus_addr = i2c_mii_phy_addr(phy_id);
if (bus_addr != ROLLBALL_PHY_I2C_ADDR) if (bus_addr != ROLLBALL_PHY_I2C_ADDR)
return 0; return 0;
......
...@@ -57,10 +57,6 @@ ipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset) ...@@ -57,10 +57,6 @@ ipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset)
u32 ret_val; u32 ret_val;
int err; int err;
/* Reject clause 45 */
if (reg_offset & MII_ADDR_C45)
return -EOPNOTSUPP;
miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) | miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
((reg_offset << MII_REG_SHIFT) & MII_REG_MASK); ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
...@@ -81,10 +77,6 @@ ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data) ...@@ -81,10 +77,6 @@ ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data)
u32 miiaddr = MII_WRITE | MII_BUSY | MII_CLKRANGE_250_300M; u32 miiaddr = MII_WRITE | MII_BUSY | MII_CLKRANGE_250_300M;
struct ipq8064_mdio *priv = bus->priv; struct ipq8064_mdio *priv = bus->priv;
/* Reject clause 45 */
if (reg_offset & MII_ADDR_C45)
return -EOPNOTSUPP;
regmap_write(priv->base, MII_DATA_REG_ADDR, data); regmap_write(priv->base, MII_DATA_REG_ADDR, data);
miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) | miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
......
...@@ -108,9 +108,6 @@ static int mscc_miim_read(struct mii_bus *bus, int mii_id, int regnum) ...@@ -108,9 +108,6 @@ static int mscc_miim_read(struct mii_bus *bus, int mii_id, int regnum)
u32 val; u32 val;
int ret; int ret;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
ret = mscc_miim_wait_pending(bus); ret = mscc_miim_wait_pending(bus);
if (ret) if (ret)
goto out; goto out;
...@@ -154,9 +151,6 @@ static int mscc_miim_write(struct mii_bus *bus, int mii_id, ...@@ -154,9 +151,6 @@ static int mscc_miim_write(struct mii_bus *bus, int mii_id,
struct mscc_miim_dev *miim = bus->priv; struct mscc_miim_dev *miim = bus->priv;
int ret; int ret;
if (regnum & MII_ADDR_C45)
return -EOPNOTSUPP;
ret = mscc_miim_wait_pending(bus); ret = mscc_miim_wait_pending(bus);
if (ret < 0) if (ret < 0)
goto out; goto out;
......
...@@ -34,9 +34,6 @@ static int mvusb_mdio_read(struct mii_bus *mdio, int dev, int reg) ...@@ -34,9 +34,6 @@ static int mvusb_mdio_read(struct mii_bus *mdio, int dev, int reg)
struct mvusb_mdio *mvusb = mdio->priv; struct mvusb_mdio *mvusb = mdio->priv;
int err, alen; int err, alen;
if (dev & MII_ADDR_C45)
return -EOPNOTSUPP;
mvusb->buf[MVUSB_CMD_ADDR] = cpu_to_le16(0xa400 | (dev << 5) | reg); mvusb->buf[MVUSB_CMD_ADDR] = cpu_to_le16(0xa400 | (dev << 5) | reg);
err = usb_bulk_msg(mvusb->udev, usb_sndbulkpipe(mvusb->udev, 2), err = usb_bulk_msg(mvusb->udev, usb_sndbulkpipe(mvusb->udev, 2),
...@@ -57,9 +54,6 @@ static int mvusb_mdio_write(struct mii_bus *mdio, int dev, int reg, u16 val) ...@@ -57,9 +54,6 @@ static int mvusb_mdio_write(struct mii_bus *mdio, int dev, int reg, u16 val)
struct mvusb_mdio *mvusb = mdio->priv; struct mvusb_mdio *mvusb = mdio->priv;
int alen; int alen;
if (dev & MII_ADDR_C45)
return -EOPNOTSUPP;
mvusb->buf[MVUSB_CMD_ADDR] = cpu_to_le16(0x8000 | (dev << 5) | reg); mvusb->buf[MVUSB_CMD_ADDR] = cpu_to_le16(0x8000 | (dev << 5) | reg);
mvusb->buf[MVUSB_CMD_VAL] = cpu_to_le16(val); mvusb->buf[MVUSB_CMD_VAL] = cpu_to_le16(val);
......
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