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Commit 6650d6db authored by Lucas Stach's avatar Lucas Stach Committed by Shawn Guo
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ARM: imx50: use clock defines in DTS files 

For better readability and no need to look up numbers
in the documentation anymore.
Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent ff65d4ca
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Showing with 51 additions and 28 deletions
arch/arm/boot/dts/imx50.dtsi
View file @ 6650d6db
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include "imx50-pinfunc.h" #include "imx50-pinfunc.h"
#include <dt-bindings/clock/imx5-clock.h>
/ { / {
aliases { aliases {
...@@ -96,7 +97,9 @@ esdhc1: esdhc@50004000 { ...@@ -96,7 +97,9 @@ esdhc1: esdhc@50004000 {
compatible = "fsl,imx50-esdhc"; compatible = "fsl,imx50-esdhc";
reg = <0x50004000 0x4000>; reg = <0x50004000 0x4000>;
interrupts = <1>; interrupts = <1>;
clocks = <&clks 44>, <&clks 0>, <&clks 71>; clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
<&clks IMX5_CLK_DUMMY>,
<&clks IMX5_CLK_ESDHC1_PER_GATE>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
bus-width = <4>; bus-width = <4>;
status = "disabled"; status = "disabled";
...@@ -106,7 +109,9 @@ esdhc2: esdhc@50008000 { ...@@ -106,7 +109,9 @@ esdhc2: esdhc@50008000 {
compatible = "fsl,imx50-esdhc"; compatible = "fsl,imx50-esdhc";
reg = <0x50008000 0x4000>; reg = <0x50008000 0x4000>;
interrupts = <2>; interrupts = <2>;
clocks = <&clks 45>, <&clks 0>, <&clks 72>; clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>,
<&clks IMX5_CLK_DUMMY>,
<&clks IMX5_CLK_ESDHC2_PER_GATE>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
bus-width = <4>; bus-width = <4>;
status = "disabled"; status = "disabled";
...@@ -116,7 +121,8 @@ uart3: serial@5000c000 { ...@@ -116,7 +121,8 @@ uart3: serial@5000c000 {
compatible = "fsl,imx50-uart", "fsl,imx21-uart"; compatible = "fsl,imx50-uart", "fsl,imx21-uart";
reg = <0x5000c000 0x4000>; reg = <0x5000c000 0x4000>;
interrupts = <33>; interrupts = <33>;
clocks = <&clks 32>, <&clks 33>; clocks = <&clks IMX5_CLK_UART3_IPG_GATE>,
<&clks IMX5_CLK_UART3_PER_GATE>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
...@@ -127,7 +133,8 @@ ecspi1: ecspi@50010000 { ...@@ -127,7 +133,8 @@ ecspi1: ecspi@50010000 {
compatible = "fsl,imx50-ecspi", "fsl,imx51-ecspi"; compatible = "fsl,imx50-ecspi", "fsl,imx51-ecspi";
reg = <0x50010000 0x4000>; reg = <0x50010000 0x4000>;
interrupts = <36>; interrupts = <36>;
clocks = <&clks 51>, <&clks 52>; clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>,
<&clks IMX5_CLK_ECSPI1_PER_GATE>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
...@@ -136,7 +143,7 @@ ssi2: ssi@50014000 { ...@@ -136,7 +143,7 @@ ssi2: ssi@50014000 {
compatible = "fsl,imx50-ssi", "fsl,imx21-ssi"; compatible = "fsl,imx50-ssi", "fsl,imx21-ssi";
reg = <0x50014000 0x4000>; reg = <0x50014000 0x4000>;
interrupts = <30>; interrupts = <30>;
clocks = <&clks 49>; clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>;
fsl,fifo-depth = <15>; fsl,fifo-depth = <15>;
fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
status = "disabled"; status = "disabled";
...@@ -146,7 +153,9 @@ esdhc3: esdhc@50020000 { ...@@ -146,7 +153,9 @@ esdhc3: esdhc@50020000 {
compatible = "fsl,imx50-esdhc"; compatible = "fsl,imx50-esdhc";
reg = <0x50020000 0x4000>; reg = <0x50020000 0x4000>;
interrupts = <3>; interrupts = <3>;
clocks = <&clks 46>, <&clks 0>, <&clks 73>; clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>,
<&clks IMX5_CLK_DUMMY>,
<&clks IMX5_CLK_ESDHC3_PER_GATE>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
bus-width = <4>; bus-width = <4>;
status = "disabled"; status = "disabled";
...@@ -156,7 +165,9 @@ esdhc4: esdhc@50024000 { ...@@ -156,7 +165,9 @@ esdhc4: esdhc@50024000 {
compatible = "fsl,imx50-esdhc"; compatible = "fsl,imx50-esdhc";
reg = <0x50024000 0x4000>; reg = <0x50024000 0x4000>;
interrupts = <4>; interrupts = <4>;
clocks = <&clks 47>, <&clks 0>, <&clks 74>; clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>,
<&clks IMX5_CLK_DUMMY>,
<&clks IMX5_CLK_ESDHC4_PER_GATE>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
bus-width = <4>; bus-width = <4>;
status = "disabled"; status = "disabled";
...@@ -167,7 +178,7 @@ usbotg: usb@53f80000 { ...@@ -167,7 +178,7 @@ usbotg: usb@53f80000 {
compatible = "fsl,imx50-usb", "fsl,imx27-usb"; compatible = "fsl,imx50-usb", "fsl,imx27-usb";
reg = <0x53f80000 0x0200>; reg = <0x53f80000 0x0200>;
interrupts = <18>; interrupts = <18>;
clocks = <&clks 124>; clocks = <&clks IMX5_CLK_USB_PHY1_GATE>;
status = "disabled"; status = "disabled";
}; };
...@@ -175,7 +186,7 @@ usbh1: usb@53f80200 { ...@@ -175,7 +186,7 @@ usbh1: usb@53f80200 {
compatible = "fsl,imx50-usb", "fsl,imx27-usb"; compatible = "fsl,imx50-usb", "fsl,imx27-usb";
reg = <0x53f80200 0x0200>; reg = <0x53f80200 0x0200>;
interrupts = <14>; interrupts = <14>;
clocks = <&clks 125>; clocks = <&clks IMX5_CLK_USB_PHY2_GATE>;
status = "disabled"; status = "disabled";
}; };
...@@ -183,7 +194,7 @@ usbh2: usb@53f80400 { ...@@ -183,7 +194,7 @@ usbh2: usb@53f80400 {
compatible = "fsl,imx50-usb", "fsl,imx27-usb"; compatible = "fsl,imx50-usb", "fsl,imx27-usb";
reg = <0x53f80400 0x0200>; reg = <0x53f80400 0x0200>;
interrupts = <16>; interrupts = <16>;
clocks = <&clks 108>; clocks = <&clks IMX5_CLK_USBOH3_GATE>;
status = "disabled"; status = "disabled";
}; };
...@@ -191,7 +202,7 @@ usbh3: usb@53f80600 { ...@@ -191,7 +202,7 @@ usbh3: usb@53f80600 {
compatible = "fsl,imx50-usb", "fsl,imx27-usb"; compatible = "fsl,imx50-usb", "fsl,imx27-usb";
reg = <0x53f80600 0x0200>; reg = <0x53f80600 0x0200>;
interrupts = <17>; interrupts = <17>;
clocks = <&clks 108>; clocks = <&clks IMX5_CLK_USBOH3_GATE>;
status = "disabled"; status = "disabled";
}; };
...@@ -239,14 +250,15 @@ wdog1: wdog@53f98000 { ...@@ -239,14 +250,15 @@ wdog1: wdog@53f98000 {
compatible = "fsl,imx50-wdt", "fsl,imx21-wdt"; compatible = "fsl,imx50-wdt", "fsl,imx21-wdt";
reg = <0x53f98000 0x4000>; reg = <0x53f98000 0x4000>;
interrupts = <58>; interrupts = <58>;
clocks = <&clks 0>; clocks = <&clks IMX5_CLK_DUMMY>;
}; };
gpt: timer@53fa0000 { gpt: timer@53fa0000 {
compatible = "fsl,imx50-gpt", "fsl,imx31-gpt"; compatible = "fsl,imx50-gpt", "fsl,imx31-gpt";
reg = <0x53fa0000 0x4000>; reg = <0x53fa0000 0x4000>;
interrupts = <39>; interrupts = <39>;
clocks = <&clks 36>, <&clks 41>; clocks = <&clks IMX5_CLK_GPT_IPG_GATE>,
<&clks IMX5_CLK_GPT_HF_GATE>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
}; };
...@@ -264,7 +276,8 @@ pwm1: pwm@53fb4000 { ...@@ -264,7 +276,8 @@ pwm1: pwm@53fb4000 {
#pwm-cells = <2>; #pwm-cells = <2>;
compatible = "fsl,imx50-pwm", "fsl,imx27-pwm"; compatible = "fsl,imx50-pwm", "fsl,imx27-pwm";
reg = <0x53fb4000 0x4000>; reg = <0x53fb4000 0x4000>;
clocks = <&clks 37>, <&clks 38>; clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
<&clks IMX5_CLK_PWM1_HF_GATE>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
interrupts = <61>; interrupts = <61>;
}; };
...@@ -273,7 +286,8 @@ pwm2: pwm@53fb8000 { ...@@ -273,7 +286,8 @@ pwm2: pwm@53fb8000 {
#pwm-cells = <2>; #pwm-cells = <2>;
compatible = "fsl,imx50-pwm", "fsl,imx27-pwm"; compatible = "fsl,imx50-pwm", "fsl,imx27-pwm";
reg = <0x53fb8000 0x4000>; reg = <0x53fb8000 0x4000>;
clocks = <&clks 39>, <&clks 40>; clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,
<&clks IMX5_CLK_PWM2_HF_GATE>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
interrupts = <94>; interrupts = <94>;
}; };
...@@ -282,7 +296,8 @@ uart1: serial@53fbc000 { ...@@ -282,7 +296,8 @@ uart1: serial@53fbc000 {
compatible = "fsl,imx50-uart", "fsl,imx21-uart"; compatible = "fsl,imx50-uart", "fsl,imx21-uart";
reg = <0x53fbc000 0x4000>; reg = <0x53fbc000 0x4000>;
interrupts = <31>; interrupts = <31>;
clocks = <&clks 28>, <&clks 29>; clocks = <&clks IMX5_CLK_UART1_IPG_GATE>,
<&clks IMX5_CLK_UART1_PER_GATE>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
...@@ -291,7 +306,8 @@ uart2: serial@53fc0000 { ...@@ -291,7 +306,8 @@ uart2: serial@53fc0000 {
compatible = "fsl,imx50-uart", "fsl,imx21-uart"; compatible = "fsl,imx50-uart", "fsl,imx21-uart";
reg = <0x53fc0000 0x4000>; reg = <0x53fc0000 0x4000>;
interrupts = <32>; interrupts = <32>;
clocks = <&clks 30>, <&clks 31>; clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
<&clks IMX5_CLK_UART2_PER_GATE>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
...@@ -335,7 +351,7 @@ i2c3: i2c@53fec000 { ...@@ -335,7 +351,7 @@ i2c3: i2c@53fec000 {
compatible = "fsl,imx50-i2c", "fsl,imx21-i2c"; compatible = "fsl,imx50-i2c", "fsl,imx21-i2c";
reg = <0x53fec000 0x4000>; reg = <0x53fec000 0x4000>;
interrupts = <64>; interrupts = <64>;
clocks = <&clks 88>; clocks = <&clks IMX5_CLK_I2C3_GATE>;
status = "disabled"; status = "disabled";
}; };
...@@ -343,7 +359,8 @@ uart4: serial@53ff0000 { ...@@ -343,7 +359,8 @@ uart4: serial@53ff0000 {
compatible = "fsl,imx50-uart", "fsl,imx21-uart"; compatible = "fsl,imx50-uart", "fsl,imx21-uart";
reg = <0x53ff0000 0x4000>; reg = <0x53ff0000 0x4000>;
interrupts = <13>; interrupts = <13>;
clocks = <&clks 65>, <&clks 66>; clocks = <&clks IMX5_CLK_UART4_IPG_GATE>,
<&clks IMX5_CLK_UART4_PER_GATE>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
...@@ -360,7 +377,8 @@ uart5: serial@63f90000 { ...@@ -360,7 +377,8 @@ uart5: serial@63f90000 {
compatible = "fsl,imx50-uart", "fsl,imx21-uart"; compatible = "fsl,imx50-uart", "fsl,imx21-uart";
reg = <0x63f90000 0x4000>; reg = <0x63f90000 0x4000>;
interrupts = <86>; interrupts = <86>;
clocks = <&clks 67>, <&clks 68>; clocks = <&clks IMX5_CLK_UART5_IPG_GATE>,
<&clks IMX5_CLK_UART5_PER_GATE>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
...@@ -368,7 +386,7 @@ uart5: serial@63f90000 { ...@@ -368,7 +386,7 @@ uart5: serial@63f90000 {
owire: owire@63fa4000 { owire: owire@63fa4000 {
compatible = "fsl,imx50-owire", "fsl,imx21-owire"; compatible = "fsl,imx50-owire", "fsl,imx21-owire";
reg = <0x63fa4000 0x4000>; reg = <0x63fa4000 0x4000>;
clocks = <&clks 159>; clocks = <&clks IMX5_CLK_OWIRE_GATE>;
status = "disabled"; status = "disabled";
}; };
...@@ -378,7 +396,8 @@ ecspi2: ecspi@63fac000 { ...@@ -378,7 +396,8 @@ ecspi2: ecspi@63fac000 {
compatible = "fsl,imx50-ecspi", "fsl,imx51-ecspi"; compatible = "fsl,imx50-ecspi", "fsl,imx51-ecspi";
reg = <0x63fac000 0x4000>; reg = <0x63fac000 0x4000>;
interrupts = <37>; interrupts = <37>;
clocks = <&clks 53>, <&clks 54>; clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>,
<&clks IMX5_CLK_ECSPI2_PER_GATE>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
...@@ -387,7 +406,8 @@ sdma: sdma@63fb0000 { ...@@ -387,7 +406,8 @@ sdma: sdma@63fb0000 {
compatible = "fsl,imx50-sdma", "fsl,imx35-sdma"; compatible = "fsl,imx50-sdma", "fsl,imx35-sdma";
reg = <0x63fb0000 0x4000>; reg = <0x63fb0000 0x4000>;
interrupts = <6>; interrupts = <6>;
clocks = <&clks 56>, <&clks 56>; clocks = <&clks IMX5_CLK_SDMA_GATE>,
<&clks IMX5_CLK_SDMA_GATE>;
clock-names = "ipg", "ahb"; clock-names = "ipg", "ahb";
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx50.bin"; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx50.bin";
}; };
...@@ -398,7 +418,8 @@ cspi: cspi@63fc0000 { ...@@ -398,7 +418,8 @@ cspi: cspi@63fc0000 {
compatible = "fsl,imx50-cspi", "fsl,imx35-cspi"; compatible = "fsl,imx50-cspi", "fsl,imx35-cspi";
reg = <0x63fc0000 0x4000>; reg = <0x63fc0000 0x4000>;
interrupts = <38>; interrupts = <38>;
clocks = <&clks 55>, <&clks 55>; clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>,
<&clks IMX5_CLK_CSPI_IPG_GATE>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
...@@ -409,7 +430,7 @@ i2c2: i2c@63fc4000 { ...@@ -409,7 +430,7 @@ i2c2: i2c@63fc4000 {
compatible = "fsl,imx50-i2c", "fsl,imx21-i2c"; compatible = "fsl,imx50-i2c", "fsl,imx21-i2c";
reg = <0x63fc4000 0x4000>; reg = <0x63fc4000 0x4000>;
interrupts = <63>; interrupts = <63>;
clocks = <&clks 35>; clocks = <&clks IMX5_CLK_I2C2_GATE>;
status = "disabled"; status = "disabled";
}; };
...@@ -419,7 +440,7 @@ i2c1: i2c@63fc8000 { ...@@ -419,7 +440,7 @@ i2c1: i2c@63fc8000 {
compatible = "fsl,imx50-i2c", "fsl,imx21-i2c"; compatible = "fsl,imx50-i2c", "fsl,imx21-i2c";
reg = <0x63fc8000 0x4000>; reg = <0x63fc8000 0x4000>;
interrupts = <62>; interrupts = <62>;
clocks = <&clks 34>; clocks = <&clks IMX5_CLK_I2C1_GATE>;
status = "disabled"; status = "disabled";
}; };
...@@ -427,7 +448,7 @@ ssi1: ssi@63fcc000 { ...@@ -427,7 +448,7 @@ ssi1: ssi@63fcc000 {
compatible = "fsl,imx50-ssi", "fsl,imx21-ssi"; compatible = "fsl,imx50-ssi", "fsl,imx21-ssi";
reg = <0x63fcc000 0x4000>; reg = <0x63fcc000 0x4000>;
interrupts = <29>; interrupts = <29>;
clocks = <&clks 48>; clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>;
fsl,fifo-depth = <15>; fsl,fifo-depth = <15>;
fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
status = "disabled"; status = "disabled";
...@@ -443,7 +464,9 @@ fec: ethernet@63fec000 { ...@@ -443,7 +464,9 @@ fec: ethernet@63fec000 {
compatible = "fsl,imx53-fec", "fsl,imx25-fec"; compatible = "fsl,imx53-fec", "fsl,imx25-fec";
reg = <0x63fec000 0x4000>; reg = <0x63fec000 0x4000>;
interrupts = <87>; interrupts = <87>;
clocks = <&clks 42>, <&clks 42>, <&clks 42>; clocks = <&clks IMX5_CLK_FEC_GATE>,
<&clks IMX5_CLK_FEC_GATE>,
<&clks IMX5_CLK_FEC_GATE>;
clock-names = "ipg", "ahb", "ptp"; clock-names = "ipg", "ahb", "ptp";
status = "disabled"; status = "disabled";
}; };
......
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