Commit 6680b6a1 authored by Yongqiang Sun's avatar Yongqiang Sun Committed by Alex Deucher

drm/amd/display: Fixed crash

Signed-off-by: default avatarYongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 80bd2096
...@@ -167,24 +167,20 @@ static bool stream_adjust_vmin_vmax(struct dc *dc, ...@@ -167,24 +167,20 @@ static bool stream_adjust_vmin_vmax(struct dc *dc,
struct core_stream *core_stream = DC_STREAM_TO_CORE(stream[0]); struct core_stream *core_stream = DC_STREAM_TO_CORE(stream[0]);
int i = 0; int i = 0;
bool ret = false; bool ret = false;
struct pipe_ctx *pipes;
unsigned int underlay_idx = core_dc->res_pool->underlay_pipe_index;
for (i = 0; i < MAX_PIPES; i++) { for (i = 0; i < MAX_PIPES; i++) {
if (core_dc->current_context->res_ctx.pipe_ctx[i].stream == core_stream struct pipe_ctx *pipe = &core_dc->current_context->res_ctx.pipe_ctx[i];
&& i != underlay_idx) {
pipes = &core_dc->current_context->res_ctx.pipe_ctx[i]; if (pipe->stream == core_stream && pipe->stream_enc) {
core_dc->hwss.set_drr(&pipes, 1, vmin, vmax); core_dc->hwss.set_drr(&pipe, 1, vmin, vmax);
/* build and update the info frame */ /* build and update the info frame */
resource_build_info_frame(pipes); resource_build_info_frame(pipe);
core_dc->hwss.update_info_frame(pipes); core_dc->hwss.update_info_frame(pipe);
ret = true; ret = true;
} }
} }
return ret; return ret;
} }
......
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