watchdog: rzg2l_wdt: Issue a reset before we put the PM clocks
On RZ/Five SoC it was observed that setting timeout (to say 1 sec) wouldn't reset the system. The procedure described in the HW manual (Procedure for Activating Modules) for activating the target module states we need to start supply of the clock module before applying the reset signal. This patch makes sure we follow the same procedure to clear the registers of the WDT module, fixing the issues seen on RZ/Five SoC. While at it re-used rzg2l_wdt_stop() in rzg2l_wdt_set_timeout() as it has the same function calls. Fixes: 4055ee81 ("watchdog: rzg2l_wdt: Add set_timeout callback") Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20221117114907.138583-2-fabrizio.castro.jz@renesas.comSigned-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
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