Commit 6ec6c369 authored by V Sujith Kumar Reddy's avatar V Sujith Kumar Reddy Committed by Mark Brown

ASoC: qcom: lpass-cpu: Fix clock disable failure

Disable MI2S bit clock from PAUSE/STOP/SUSPEND usecase instead of
shutdown time. Acheive this by invoking clk_disable API from
cpu daiops trigger instead of cpu daiops shutdown.
Change non-atomic API "clk_prepare_enable" to atomic API
"clk_enable" in trigger, as trigger is being called from atomic context.

Fixes: 7e6799d8 ("ASoC: qcom: lpass-cpu: Enable MI2S BCLK and LRCLK together")
Signed-off-by: default avatarV Sujith Kumar Reddy <vsujithk@codeaurora.org>
Signed-off-by: default avatarSrinivasa Rao Mandadapu <srivasam@codeaurora.org>
Link: https://lore.kernel.org/r/1603098363-9251-1-git-send-email-srivasam@codeaurora.orgSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent cf9d2198
...@@ -80,6 +80,12 @@ static int lpass_cpu_daiops_startup(struct snd_pcm_substream *substream, ...@@ -80,6 +80,12 @@ static int lpass_cpu_daiops_startup(struct snd_pcm_substream *substream,
dev_err(dai->dev, "error in enabling mi2s osr clk: %d\n", ret); dev_err(dai->dev, "error in enabling mi2s osr clk: %d\n", ret);
return ret; return ret;
} }
ret = clk_prepare(drvdata->mi2s_bit_clk[dai->driver->id]);
if (ret) {
dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret);
clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]);
return ret;
}
return 0; return 0;
} }
...@@ -88,9 +94,8 @@ static void lpass_cpu_daiops_shutdown(struct snd_pcm_substream *substream, ...@@ -88,9 +94,8 @@ static void lpass_cpu_daiops_shutdown(struct snd_pcm_substream *substream,
{ {
struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai); struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
clk_disable_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]);
clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]);
clk_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]);
} }
static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream, static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream,
...@@ -303,10 +308,10 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, ...@@ -303,10 +308,10 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
dev_err(dai->dev, "error writing to i2sctl reg: %d\n", dev_err(dai->dev, "error writing to i2sctl reg: %d\n",
ret); ret);
ret = clk_prepare_enable(drvdata->mi2s_bit_clk[id]); ret = clk_enable(drvdata->mi2s_bit_clk[id]);
if (ret) { if (ret) {
dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret);
clk_disable_unprepare(drvdata->mi2s_osr_clk[id]); clk_disable(drvdata->mi2s_osr_clk[id]);
return ret; return ret;
} }
...@@ -324,6 +329,7 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, ...@@ -324,6 +329,7 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
if (ret) if (ret)
dev_err(dai->dev, "error writing to i2sctl reg: %d\n", dev_err(dai->dev, "error writing to i2sctl reg: %d\n",
ret); ret);
clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]);
break; break;
} }
......
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