Commit 6ee93e12 authored by Maxime Ripard's avatar Maxime Ripard

ARM: sun4i: Add audio PLL

The A10 uses the PLL2 as the audio PLL, which is the parent of all the
other audio clocks in the system (i2s, codec, etc.). Add it to the DTSI.
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: default avatarChen-Yu Tsai <wens@csie.org>
parent f5bad43b
...@@ -195,6 +195,15 @@ pll1: clk@01c20000 { ...@@ -195,6 +195,15 @@ pll1: clk@01c20000 {
clock-output-names = "pll1"; clock-output-names = "pll1";
}; };
pll2: clk@01c20008 {
#clock-cells = <1>;
compatible = "allwinner,sun4i-a10-pll2-clk";
reg = <0x01c20008 0x8>;
clocks = <&osc24M>;
clock-output-names = "pll2-1x", "pll2-2x",
"pll2-4x", "pll2-8x";
};
pll4: clk@01c20018 { pll4: clk@01c20018 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "allwinner,sun4i-a10-pll1-clk"; compatible = "allwinner,sun4i-a10-pll1-clk";
......
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