Commit 6fc9ebbd authored by David Lechner's avatar David Lechner Committed by Sekhar Nori

ARM: davinci: Move clock init after ioremap.

Some clocks (such as the USB PHY clocks in DA8xx) will need to use iomem.
The davinci_common_init() function must be called before the ioremap, so
the clock init is now split out as separate function.
Signed-off-by: default avatarDavid Lechner <david@lechnology.com>
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
parent 8a9d088f
...@@ -577,7 +577,7 @@ EXPORT_SYMBOL(davinci_set_pllrate); ...@@ -577,7 +577,7 @@ EXPORT_SYMBOL(davinci_set_pllrate);
* than that used by default in <soc>.c file. The reference clock rate * than that used by default in <soc>.c file. The reference clock rate
* should be updated early in the boot process; ideally soon after the * should be updated early in the boot process; ideally soon after the
* clock tree has been initialized once with the default reference clock * clock tree has been initialized once with the default reference clock
* rate (davinci_common_init()). * rate (davinci_clk_init()).
* *
* Returns 0 on success, error otherwise. * Returns 0 on success, error otherwise.
*/ */
......
...@@ -103,12 +103,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info) ...@@ -103,12 +103,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
if (ret < 0) if (ret < 0)
goto err; goto err;
if (davinci_soc_info.cpu_clks) {
ret = davinci_clk_init(davinci_soc_info.cpu_clks);
if (ret != 0)
goto err;
}
return; return;
......
...@@ -1214,4 +1214,6 @@ void __init da830_init(void) ...@@ -1214,4 +1214,6 @@ void __init da830_init(void)
da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K); da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module"); WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
davinci_clk_init(davinci_soc_info_da830.cpu_clks);
} }
...@@ -1346,4 +1346,6 @@ void __init da850_init(void) ...@@ -1346,4 +1346,6 @@ void __init da850_init(void)
v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
v &= ~CFGCHIP3_PLL1_MASTER_LOCK; v &= ~CFGCHIP3_PLL1_MASTER_LOCK;
__raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG));
davinci_clk_init(davinci_soc_info_da850.cpu_clks);
} }
...@@ -1052,6 +1052,7 @@ void __init dm355_init(void) ...@@ -1052,6 +1052,7 @@ void __init dm355_init(void)
{ {
davinci_common_init(&davinci_soc_info_dm355); davinci_common_init(&davinci_soc_info_dm355);
davinci_map_sysmod(); davinci_map_sysmod();
davinci_clk_init(davinci_soc_info_dm355.cpu_clks);
} }
int __init dm355_init_video(struct vpfe_config *vpfe_cfg, int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
......
...@@ -1176,6 +1176,7 @@ void __init dm365_init(void) ...@@ -1176,6 +1176,7 @@ void __init dm365_init(void)
{ {
davinci_common_init(&davinci_soc_info_dm365); davinci_common_init(&davinci_soc_info_dm365);
davinci_map_sysmod(); davinci_map_sysmod();
davinci_clk_init(davinci_soc_info_dm365.cpu_clks);
} }
static struct resource dm365_vpss_resources[] = { static struct resource dm365_vpss_resources[] = {
......
...@@ -932,6 +932,7 @@ void __init dm644x_init(void) ...@@ -932,6 +932,7 @@ void __init dm644x_init(void)
{ {
davinci_common_init(&davinci_soc_info_dm644x); davinci_common_init(&davinci_soc_info_dm644x);
davinci_map_sysmod(); davinci_map_sysmod();
davinci_clk_init(davinci_soc_info_dm644x.cpu_clks);
} }
int __init dm644x_init_video(struct vpfe_config *vpfe_cfg, int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
......
...@@ -956,6 +956,7 @@ void __init dm646x_init(void) ...@@ -956,6 +956,7 @@ void __init dm646x_init(void)
{ {
davinci_common_init(&davinci_soc_info_dm646x); davinci_common_init(&davinci_soc_info_dm646x);
davinci_map_sysmod(); davinci_map_sysmod();
davinci_clk_init(davinci_soc_info_dm646x.cpu_clks);
} }
static int __init dm646x_init_devices(void) static int __init dm646x_init_devices(void)
......
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