Commit 71a5cc28 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'mfd-next-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "Core Framework:
   - Add support for Software Nodes to MFD Core
   - Remove support for Device Properties from MFD Core
   - Use standard APIs in MFD Core

  New Drivers:
   - Add support for ROHM BD9576MUF and BD9573MUF PMICs
   - Add support for Netronix Embedded Controller, PWM and RTC
   - Add support for Actions Semi ATC260x PMICs and OnKey

  New Device Support:
   - Add support for DG1 PCIe Graphics Card to Intel PMT
   - Add support for ROHM BD71815 PMIC to ROHM BD71828
   - Add support for Tolino Shine 2 HD to Netronix Embedded Controller
   - Add support for AX10 BMC Secure Updates to Intel M10 BMC

  Removed Device Support:
   - Remove Arizona Extcon support from MFD
   - Remove ST-E AB8500 Power Supply code from MFD
   - Remove AB3100 altogether

  New Functionality:
   - Add support for SMBus and I2C modes to Dialog DA9063
   - Switch to using Software Nodes in Intel (various)

  New/converted Device Tree bindings:
   - rohm bd71815-pmic, rohm bd9576-pmic, netronix ntxec, actions
     atc260x, ricoh rn5t618, qcom pm8xxx

- Fix-ups:
   - Fix error handling/path; intel_pmt
   - Simplify code; rohm-bd718x7, ab8500-core, intel-m10-bmc
   - Trivial clean-ups (reordering, spelling); rohm-generic, rn5t618,
     max8997
   - Use correct data-type; db8500-prcmu
   - Remove superfluous code; lp87565, intel_quark_i2c_gpi, lpc_sch, twl
   - Use generic APIs/defines; lm3533-core, intel_quark_i2c_gpio
   - Regmap related fix-ups; intel-m10-bmc, sec-core
   - Reorder resource freeing during remove; intel_quark_i2c_gpio
   - Make table indexing more robust; intel_quark_i2c_gpio
   - Fix reference imbalances; arizona-irq
   - Staticify and (un)constify things; arizona-spi, stmpe, ene-kb3930,
     intel-lpss-acpi, intel-lpss-pci, atc260x-i2c, intel_quark_i2c_gpio

  Bug Fixes:
   - Fix incorrect (register) values; intel-m10-bmc
   - Kconfig related fixes; ABX500_CORE
   - Do not clear the Auto Reload Register; stm32-timers"

* tag 'mfd-next-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (84 commits)
  mfd: intel-m10-bmc: Add support for MAX10 BMC Secure Updates
  Revert "mfd: max8997: Add of_compatible to Extcon and Charger mfd_cell"
  mfd: twl: Remove unused inline function twl4030charger_usb_en()
  dt-bindings: mfd: Convert pm8xxx bindings to yaml
  dt-bindings: mfd: Add compatible for pmk8350 rtc
  i2c: designware: Get rid of legacy platform data
  mfd: intel_quark_i2c_gpio: Convert I²C to use software nodes
  mfd: lpc_sch: Partially revert "Add support for Intel Quark X1000"
  mfd: arizona: Fix rumtime PM imbalance on error
  mfd: max8997: Replace 8998 with 8997
  mfd: core: Use acpi_find_child_device() for child devices lookup
  mfd: intel_quark_i2c_gpio: Don't play dirty trick with const
  mfd: intel_quark_i2c_gpio: Enable MSI interrupt
  mfd: intel_quark_i2c_gpio: Reuse BAR definitions for MFD cell indexing
  mfd: ntxec: Support for EC in Tolino Shine 2 HD
  mfd: stm32-timers: Avoid clearing auto reload register
  mfd: intel_quark_i2c_gpio: Replace I²C speeds with descriptive definitions
  mfd: intel_quark_i2c_gpio: Remove unused struct device member
  mfd: intel_quark_i2c_gpio: Unregister resources in reversed order
  mfd: Kconfig: ABX500_CORE should depend on ARCH_U8500
  ...
parents be18cd1f f9386c91
......@@ -1933,6 +1933,9 @@ N: Kukjin Kim
E: kgene@kernel.org
D: Samsung S3C, S5P and Exynos ARM architectures
N: Milo Kim
D: TI LP855x, LP8727 and LP8788 drivers
N: Sangbeom Kim
E: sbkim73@samsung.com
D: Samsung SoC Audio (ASoC) drivers
......
......@@ -33,4 +33,11 @@ properties:
power off automatically. Device with key pressed shutdown feature can
specify this property.
reset-time-sec:
description:
Duration in seconds which the key should be kept pressed for device to
reset automatically. Device with key pressed reset feature can specify
this property.
$ref: /schemas/types.yaml#/definitions/uint32
additionalProperties: true
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/actions,atc260x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Actions Semi ATC260x Power Management IC bindings
maintainers:
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
- Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
description: |
ATC260x series PMICs integrates Audio Codec, Power Management, RTC, IR
and GPIO controller blocks. Currently only the PM related functionalities
(i.e. regulators and system power-off/reboot) for the ATC2603C and ATC2609A
chip variants are supported.
ATC2603C includes 3 programmable DC-DC converters, 9 programmable LDO
regulators and 1 fixed LDO regulator.
ATC2609A includes 5 programmable DC-DC converters and 10 programmable LDO
regulators.
allOf:
- $ref: ../input/input.yaml
properties:
compatible:
enum:
- actions,atc2603c
- actions,atc2609a
reg:
maxItems: 1
interrupts:
maxItems: 1
reset-time-sec:
description: |
Duration in seconds which the key should be kept pressed for device
to reset automatically. The hardware default is 8. Use 0 to disable
this functionality.
enum: [0, 6, 8, 10, 12]
regulators:
type: object
description: |
List of child nodes specifying the regulators, depending on chip variant:
* ATC2603C: dcdc[1-3], ldo[1-3,5-8,11,12], switchldo1
* ATC2609A: dcdc[0-4], ldo[0-9]
properties:
compatible:
enum:
- actions,atc2603c-regulator
- actions,atc2609a-regulator
switchldo1:
type: object
$ref: ../regulator/regulator.yaml
properties:
regulator-name: true
regulator-boot-on: true
regulator-always-on: true
regulator-min-microvolt: true
regulator-max-microvolt: true
regulator-allow-bypass: true
regulator-active-discharge: true
additionalProperties: false
patternProperties:
"^(dcdc[0-4]|ldo[0-9]|ldo1[1-2]|switchldo1)-supply$":
description: ATC260x voltage regulators supplies
"^(dcdc[0-4]|ldo[0-9]|ldo1[1-2])$":
type: object
$ref: ../regulator/regulator.yaml
properties:
regulator-name: true
regulator-boot-on: true
regulator-always-on: true
regulator-min-microvolt: true
regulator-max-microvolt: true
regulator-allow-bypass: true
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
const: actions,atc2603c-regulator
then:
patternProperties:
"^(dcdc[0,4]|ldo[0,4,9])(-supply)?$": false
"^(ldo|dcdc)":
properties:
regulator-allow-bypass: false
- if:
properties:
compatible:
contains:
const: actions,atc2609a-regulator
then:
patternProperties:
"^(ldo1[1-2]|switchldo1)(-supply)?$": false
"^(dcdc|ldo[3-9])":
properties:
regulator-allow-bypass: false
required:
- compatible
additionalProperties: false
additionalProperties: false
required:
- compatible
- reg
- interrupts
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
i2c0 {
#address-cells = <1>;
#size-cells = <0>;
pmic@65 {
compatible = "actions,atc2603c";
reg = <0x65>;
interrupt-parent = <&sirq>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
reset-time-sec = <6>;
regulators {
compatible = "actions,atc2603c-regulator";
dcdc1-supply = <&reg_5v0>;
dcdc3-supply = <&reg_5v0>;
ldo5-supply = <&reg_5v0>;
switchldo1-supply = <&vcc>;
vdd_cpu: dcdc1 {
regulator-name = "VDD_CPU";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
};
vcc: dcdc3 {
regulator-name = "VCC";
regulator-min-microvolt = <2600000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vcc_3v1: ldo5 {
regulator-name = "VCC_3V1";
regulator-min-microvolt = <2600000>;
regulator-max-microvolt = <3300000>;
};
sd_vcc: switchldo1 {
regulator-name = "SD_VCC";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
};
};
};
...
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/netronix,ntxec.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Netronix Embedded Controller
maintainers:
- Jonathan Neuschäfer <j.neuschaefer@gmx.net>
description: |
This EC is found in e-book readers of multiple brands (e.g. Kobo, Tolino), and
is typically implemented as a TI MSP430 microcontroller.
properties:
compatible:
const: netronix,ntxec
reg:
items:
- description: The I2C address of the EC
system-power-controller:
type: boolean
description: See Documentation/devicetree/bindings/power/power-controller.txt
interrupts:
minItems: 1
description:
The EC can signal interrupts via a GPIO line
"#pwm-cells":
const: 2
description: |
Number of cells in a PWM specifier.
The following PWM channels are supported:
- 0: The PWM channel controlled by registers 0xa1-0xa7
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
ec: embedded-controller@43 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ntxec>;
compatible = "netronix,ntxec";
reg = <0x43>;
system-power-controller;
interrupt-parent = <&gpio4>;
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
#pwm-cells = <2>;
};
};
backlight {
compatible = "pwm-backlight";
pwms = <&ec 0 50000>;
power-supply = <&backlight_regulator>;
};
backlight_regulator: regulator-dummy {
compatible = "regulator-fixed";
regulator-name = "backlight";
};
Qualcomm PM8xxx PMIC multi-function devices
The PM8xxx family of Power Management ICs are used to provide regulated
voltages and other various functionality to Qualcomm SoCs.
= PROPERTIES
- compatible:
Usage: required
Value type: <string>
Definition: must be one of:
"qcom,pm8058"
"qcom,pm8821"
"qcom,pm8921"
- #address-cells:
Usage: required
Value type: <u32>
Definition: must be 1
- #size-cells:
Usage: required
Value type: <u32>
Definition: must be 0
- interrupts:
Usage: required
Value type: <prop-encoded-array>
Definition: specifies the interrupt that indicates a subdevice
has generated an interrupt (summary interrupt). The
format of the specifier is defined by the binding document
describing the node's interrupt parent.
- #interrupt-cells:
Usage: required
Value type : <u32>
Definition: must be 2. Specifies the number of cells needed to encode
an interrupt source. The 1st cell contains the interrupt
number. The 2nd cell is the trigger type and level flags
encoded as follows:
1 = low-to-high edge triggered
2 = high-to-low edge triggered
4 = active high level-sensitive
8 = active low level-sensitive
- interrupt-controller:
Usage: required
Value type: <empty>
Definition: identifies this node as an interrupt controller
= SUBCOMPONENTS
The PMIC contains multiple independent functions, each described in a subnode.
The below bindings specify the set of valid subnodes.
== Real-Time Clock
- compatible:
Usage: required
Value type: <string>
Definition: must be one of:
"qcom,pm8058-rtc"
"qcom,pm8921-rtc"
"qcom,pm8941-rtc"
"qcom,pm8018-rtc"
- reg:
Usage: required
Value type: <prop-encoded-array>
Definition: single entry specifying the base address of the RTC registers
- interrupts:
Usage: required
Value type: <prop-encoded-array>
Definition: single entry specifying the RTC's alarm interrupt
- allow-set-time:
Usage: optional
Value type: <empty>
Definition: indicates that the setting of RTC time is allowed by
the host CPU
= EXAMPLE
pmicintc: pmic@0 {
compatible = "qcom,pm8921";
interrupts = <104 8>;
#interrupt-cells = <2>;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
rtc@11d {
compatible = "qcom,pm8921-rtc";
reg = <0x11d>;
interrupts = <0x27 0>;
};
};
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/qcom-pm8xxx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm PM8xxx PMIC multi-function devices
maintainers:
- Satya Priya <skakit@codeaurora.org>
description: |
The PM8xxx family of Power Management ICs are used to provide regulated
voltages and other various functionality to Qualcomm SoCs.
properties:
compatible:
enum:
- qcom,pm8058
- qcom,pm8821
- qcom,pm8921
reg:
maxItems: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
interrupts:
maxItems: 1
'#interrupt-cells':
const: 2
interrupt-controller: true
patternProperties:
"rtc@[0-9a-f]+$":
type: object
$ref: "../rtc/qcom-pm8xxx-rtc.yaml"
required:
- compatible
- '#address-cells'
- '#size-cells'
- interrupts
- '#interrupt-cells'
- interrupt-controller
additionalProperties: false
...
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/ricoh,rn5t618.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ricoh RN5T567/RN5T618/RC5T619 PMIC
maintainers:
- Andreas Kemnade <andreas@kemnade.info>
description: |
Ricoh RN5T567/RN5T618/RC5T619 is a power management IC family which
integrates 3 to 5 step-down DCDC converters, 7 to 10 low-dropout regulators,
GPIOs, and a watchdog timer. It can be controlled through an I2C interface.
The RN5T618/RC5T619 provides additionally a Li-ion battery charger,
fuel gauge, and an ADC.
The RC5T619 additionally includes USB charger detection and an RTC.
allOf:
- if:
properties:
compatible:
contains:
const: ricoh,rn5t567
then:
properties:
regulators:
patternProperties:
"^(DCDC[1-4]|LDO[1-5]|LDORTC[12])$":
$ref: ../regulator/regulator.yaml
additionalProperties: false
- if:
properties:
compatible:
contains:
const: ricoh,rn5t618
then:
properties:
regulators:
patternProperties:
"^(DCDC[1-3]|LDO[1-5]|LDORTC[12])$":
$ref: ../regulator/regulator.yaml
additionalProperties: false
- if:
properties:
compatible:
contains:
const: ricoh,rc5t619
then:
properties:
regulators:
patternProperties:
"^(DCDC[1-5]|LDO[1-9]|LDO10|LDORTC[12])$":
$ref: ../regulator/regulator.yaml
additionalProperties: false
properties:
compatible:
enum:
- ricoh,rn5t567
- ricoh,rn5t618
- ricoh,rc5t619
reg:
maxItems: 1
interrupts:
maxItems: 1
system-power-controller:
type: boolean
description: |
See Documentation/devicetree/bindings/power/power-controller.txt
regulators:
type: object
additionalProperties: false
required:
- compatible
- reg
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
pmic@32 {
compatible = "ricoh,rn5t618";
reg = <0x32>;
interrupt-parent = <&gpio5>;
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
system-power-controller;
regulators {
DCDC1 {
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
};
DCDC2 {
regulator-min-microvolt = <1175000>;
regulator-max-microvolt = <1175000>;
};
};
};
};
* Ricoh RN5T567/RN5T618 PMIC
Ricoh RN5T567/RN5T618/RC5T619 is a power management IC family which
integrates 3 to 5 step-down DCDC converters, 7 to 10 low-dropout regulators,
GPIOs, and a watchdog timer. It can be controlled through an I2C interface.
The RN5T618/RC5T619 provides additionally a Li-ion battery charger,
fuel gauge, and an ADC.
The RC5T619 additionnally includes USB charger detection and an RTC.
Required properties:
- compatible: must be one of
"ricoh,rn5t567"
"ricoh,rn5t618"
"ricoh,rc5t619"
- reg: the I2C slave address of the device
Optional properties:
- interrupts: interrupt mapping for IRQ
See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
- system-power-controller:
See Documentation/devicetree/bindings/power/power-controller.txt
Sub-nodes:
- regulators: the node is required if the regulator functionality is
needed. The valid regulator names are: DCDC1, DCDC2, DCDC3, DCDC4
(RN5T567/RC5T619), LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7, LDO8,
LDO9, LDO10, LDORTC1 and LDORTC2.
LDO7-10 are specific to RC5T619.
The common bindings for each individual regulator can be found in:
Documentation/devicetree/bindings/regulator/regulator.txt
Example:
pmic@32 {
compatible = "ricoh,rn5t618";
reg = <0x32>;
interrupt-parent = <&gpio5>;
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
system-power-controller;
regulators {
DCDC1 {
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
};
DCDC2 {
regulator-min-microvolt = <1175000>;
regulator-max-microvolt = <1175000>;
};
};
};
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/rohm,bd71815-pmic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ROHM BD71815 Power Management Integrated Circuit bindings
maintainers:
- Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
description: |
BD71815AGW is a single-chip power management ICs for battery-powered
portable devices. It integrates 5 buck converters, 8 LDOs, a boost driver
for LED and a 500 mA single-cell linear charger. Also included is a Coulomb
counter, a real-time clock (RTC), and a 32.768 kHz clock gate and two GPOs.
properties:
compatible:
const: rohm,bd71815
reg:
description:
I2C slave address.
maxItems: 1
interrupts:
maxItems: 1
gpio-controller: true
"#gpio-cells":
const: 2
description: |
The first cell is the pin number and the second cell is used to specify
flags. See ../gpio/gpio.txt for more information.
clocks:
maxItems: 1
"#clock-cells":
const: 0
clock-output-names:
const: bd71815-32k-out
rohm,clkout-open-drain:
description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos".
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 1
rohm,charger-sense-resistor-ohms:
minimum: 10000000
maximum: 50000000
description: |
BD71827 and BD71828 have SAR ADC for measuring charging currents.
External sense resistor (RSENSE in data sheet) should be used. If
something other but 30MOhm resistor is used the resistance value
should be given here in Ohms.
default: 30000000
regulators:
$ref: ../regulator/rohm,bd71815-regulator.yaml
description:
List of child nodes that specify the regulators.
gpio-reserved-ranges:
description: |
Usage of BD71828 GPIO pins can be changed via OTP. This property can be
used to mark the pins which should not be configured for GPIO. Please see
the ../gpio/gpio.txt for more information.
rohm,enable-hidden-gpo:
description: |
The BD71815 has undocumented GPO at pin E5. Pin is marked as GND at the
data-sheet as it's location in the middle of GND pins makes it hard to
use on PCB. If your board has managed to use this pin you can enable the
second GPO by defining this property. Dont enable this if you are unsure
about how the E5 pin is connected on your board.
type: boolean
required:
- compatible
- reg
- interrupts
- clocks
- "#clock-cells"
- regulators
- gpio-controller
- "#gpio-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/leds/common.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
pmic: pmic@4b {
compatible = "rohm,bd71815";
reg = <0x4b>;
interrupt-parent = <&gpio1>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
clocks = <&osc 0>;
#clock-cells = <0>;
clock-output-names = "bd71815-32k-out";
gpio-controller;
#gpio-cells = <2>;
rohm,charger-sense-resistor-ohms = <10000000>;
regulators {
buck1: buck1 {
regulator-name = "buck1";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <2000000>;
regulator-always-on;
regulator-ramp-delay = <1250>;
rohm,dvs-run-voltage = <1150000>;
rohm,dvs-suspend-voltage = <950000>;
};
buck2: buck2 {
regulator-name = "buck2";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <2000000>;
regulator-always-on;
regulator-ramp-delay = <1250>;
rohm,dvs-run-voltage = <1150000>;
rohm,dvs-suspend-voltage = <950000>;
};
buck3: buck3 {
regulator-name = "buck3";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <2700000>;
regulator-always-on;
};
buck4: buck4 {
regulator-name = "buck4";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1850000>;
regulator-always-on;
};
buck5: buck5 {
regulator-name = "buck5";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo1: ldo1 {
regulator-name = "ldo1";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo2: ldo2 {
regulator-name = "ldo2";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo3: ldo3 {
regulator-name = "ldo3";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo4: ldo4 {
regulator-name = "ldo4";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo5: ldo5 {
regulator-name = "ldo5";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo6: ldodvref {
regulator-name = "ldodvref";
regulator-always-on;
};
ldo7: ldolpsr {
regulator-name = "ldolpsr";
regulator-always-on;
};
boost: wled {
regulator-name = "wled";
regulator-min-microamp = <10>;
regulator-max-microamp = <25000>;
};
};
};
};
......@@ -44,6 +44,12 @@ properties:
clock-output-names:
const: bd71828-32k-out
rohm,clkout-open-drain:
description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos".
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 1
rohm,charger-sense-resistor-ohms:
minimum: 10000000
maximum: 50000000
......
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/rohm,bd9576-pmic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ROHM BD9576MUF and BD9573MUF Power Management Integrated Circuit bindings
maintainers:
- Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
description: |
BD9576MUF and BD9573MUF are power management ICs primarily intended for
powering the R-Car series processors.
The IC provides 6 power outputs with configurable sequencing and safety
monitoring. A watchdog logic with slow ping/windowed modes is also included.
properties:
compatible:
enum:
- rohm,bd9576
- rohm,bd9573
reg:
description:
I2C slave address.
maxItems: 1
interrupts:
maxItems: 1
rohm,vout1-en-low:
description:
BD9576 and BD9573 VOUT1 regulator enable state can be individually
controlled by a GPIO. This is dictated by state of vout1-en pin during
the PMIC startup. If vout1-en is LOW during PMIC startup then the VOUT1
enable sate is controlled via this pin. Set this property if vout1-en
is wired to be down at PMIC start-up.
type: boolean
rohm,vout1-en-gpios:
description:
GPIO specifier to specify the GPIO connected to vout1-en for vout1 ON/OFF
state control.
maxItems: 1
rohm,ddr-sel-low:
description:
The BD9576 and BD9573 output voltage for DDR can be selected by setting
the ddr-sel pin low or high. Set this property if ddr-sel is grounded.
type: boolean
rohm,watchdog-enable-gpios:
description: The GPIO line used to enable the watchdog.
maxItems: 1
rohm,watchdog-ping-gpios:
description: The GPIO line used to ping the watchdog.
maxItems: 1
rohm,hw-timeout-ms:
maxItems: 2
description:
Watchog timeout in milliseconds. If single value is given it is
the maximum timeout. Eg. if pinging watchdog is not done within this time
limit the watchdog will be triggered. If two values are given watchdog
is configured in "window mode". Then first value is limit for short-ping
Eg. if watchdog is pinged sooner than that the watchdog will trigger.
When two values is given the second value is the maximum timeout.
# (HW) minimum for short timeout is 2ms, maximum 220 ms.
# (HW) minimum for max timeout is 4ms, maximum 4416 ms.
regulators:
$ref: ../regulator/rohm,bd9576-regulator.yaml
description:
List of child nodes that specify the regulators.
required:
- compatible
- reg
- regulators
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
pmic: pmic@30 {
compatible = "rohm,bd9576";
reg = <0x30>;
rohm,vout1-en-low;
rohm,vout1-en-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
rohm,ddr-sel-low;
rohm,watchdog-enable-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
rohm,watchdog-ping-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
rohm,hw-timeout-ms = <150>, <2300>;
regulators {
boost1: regulator-vd50 {
regulator-name = "VD50";
};
buck1: regulator-vd18 {
regulator-name = "VD18";
};
buck2: regulator-vdddr {
regulator-name = "VDDDR";
};
buck3: regulator-vd10 {
regulator-name = "VD10";
};
ldo: regulator-voutl1 {
regulator-name = "VOUTL1";
};
sw: regulator-vouts1 {
regulator-name = "VOUTS1";
};
};
};
};
......@@ -17,6 +17,10 @@ properties:
description: I2C slave address
const: 0x60
reset-gpios:
description: GPIO connected to NRST pin (active low reset, pin 20)
maxItems: 1
gpio-controller: true
'#gpio-cells':
......
......@@ -17,6 +17,10 @@ properties:
description: I2C slave address
const: 0x60
reset-gpios:
description: GPIO connected to NRST pin (active low reset, pin 20)
maxItems: 1
gpio-controller: true
'#gpio-cells':
......
......@@ -19,6 +19,10 @@ properties:
description: I2C slave address
const: 0x60
reset-gpios:
description: GPIO connected to NRST pin (active low reset, pin 20)
maxItems: 1
gpio-controller: true
'#gpio-cells':
......
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/regulator/rohm,bd71815-regulator.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ROHM BD71815 Power Management Integrated Circuit regulators
maintainers:
- Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
description: |
This module is part of the ROHM BD718215 MFD device. For more details
see Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml.
The regulator controller is represented as a sub-node of the PMIC node
on the device tree.
The valid names for BD71815 regulator nodes are
buck1, buck2, buck3, buck4, buck5,
ldo1, ldo2, ldo3, ldo4, ldo5,
ldodvref, ldolpsr, wled
properties:
wled:
type: object
description:
properties for wled regulator
$ref: regulator.yaml#
properties:
regulator-name:
const: wled
patternProperties:
"^((ldo|buck)[1-5]|ldolpsr|ldodvref)$":
type: object
description:
Properties for single LDO/BUCK regulator.
$ref: regulator.yaml#
properties:
regulator-name:
pattern: "^((ldo|buck)[1-5]|ldolpsr|ldodvref)$"
description:
should be "ldo1", ..., "ldo5", "buck1", ..., "buck5" and "ldolpsr"
for ldolpsr regulator, "ldodvref" for ldodvref reglator.
rohm,vsel-gpios:
description:
GPIO used to control ldo4 state (when ldo4 is controlled by GPIO).
rohm,dvs-run-voltage:
description:
PMIC "RUN" state voltage in uV when PMIC HW states are used. See
comments below for bucks/LDOs which support this. 0 means
regulator should be disabled at RUN state.
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 3300000
rohm,dvs-snvs-voltage:
description:
Whether to keep regulator enabled at "SNVS" state or not.
0 means regulator should be disabled at SNVS state, non zero voltage
keeps regulator enabled. BD71815 does not change voltage level
when PMIC transitions to SNVS.SNVS voltage depends on the previous
state (from which the PMIC transitioned to SNVS).
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 3300000
rohm,dvs-suspend-voltage:
description:
PMIC "SUSPEND" state voltage in uV when PMIC HW states are used. See
comments below for bucks/LDOs which support this. 0 means
regulator should be disabled at SUSPEND state.
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 3300000
rohm,dvs-lpsr-voltage:
description:
PMIC "LPSR" state voltage in uV when PMIC HW states are used. See
comments below for bucks/LDOs which support this. 0 means
regulator should be disabled at LPSR state.
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 3300000
# Bucks 1 and 2 support giving separate voltages for operational states
# (RUN /CLEAN according to data-sheet) and non operational states
# (LPSR/SUSPEND). The voltage is automatically changed when HW
# state changes. Omitting these properties from bucks 1 and 2 leave
# buck voltages to not be toggled by HW state. Enable status may still
# be toggled by state changes depending on HW default settings.
#
# Bucks 3-5 and ldos 1-5 support setting the RUN state voltage here.
# Given RUN voltage is used at all states if regulator is enabled at
# given state.
# Values given for other states are regarded as enable/disable at
# given state (see below).
#
# All regulators except WLED support specifying enable/disable status
# for each of the HW states (RUN/SNVS/SUSPEND/LPSR). HW defaults can
# be overridden by setting voltage to 0 (regulator disabled at given
# state) or non-zero (regulator enabled at given state). Please note
# that setting non zero voltages for bucks 1/2 will also enable voltage
# changes according to state change.
required:
- regulator-name
unevaluatedProperties: false
additionalProperties: false
......@@ -772,6 +772,8 @@ patternProperties:
description: Broadcom Corporation (formerly NetLogic Microsystems)
"^netron-dy,.*":
description: Netron DY
"^netronix,.*":
description: Netronix, Inc.
"^netxeon,.*":
description: Shenzhen Netxeon Technology CO., LTD
"^neweast,.*":
......
......@@ -2894,6 +2894,18 @@ W: http://www.openaoe.org/
F: Documentation/admin-guide/aoe/
F: drivers/block/aoe/
ATC260X PMIC MFD DRIVER
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
M: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
L: linux-actions@lists.infradead.org
S: Maintained
F: Documentation/devicetree/bindings/mfd/actions,atc260x.yaml
F: drivers/input/misc/atc260x-onkey.c
F: drivers/mfd/atc260*
F: drivers/power/reset/atc260x-poweroff.c
F: drivers/regulator/atc260x-regulator.c
F: include/linux/mfd/atc260x/*
ATHEROS 71XX/9XXX GPIO DRIVER
M: Alban Bedel <albeu@free.fr>
S: Maintained
......@@ -9221,6 +9233,26 @@ F: include/linux/mei_cl_bus.h
F: include/uapi/linux/mei.h
F: samples/mei/*
INTEL MAX 10 BMC MFD DRIVER
M: Xu Yilun <yilun.xu@intel.com>
R: Tom Rix <trix@redhat.com>
S: Maintained
F: Documentation/ABI/testing/sysfs-driver-intel-m10-bmc
F: Documentation/hwmon/intel-m10-bmc-hwmon.rst
F: drivers/hwmon/intel-m10-bmc-hwmon.c
F: drivers/mfd/intel-m10-bmc.c
F: include/linux/mfd/intel-m10-bmc.h
INTEL MAX 10 BMC MFD DRIVER
M: Xu Yilun <yilun.xu@intel.com>
R: Tom Rix <trix@redhat.com>
S: Maintained
F: Documentation/ABI/testing/sysfs-driver-intel-m10-bmc
F: Documentation/hwmon/intel-m10-bmc-hwmon.rst
F: drivers/hwmon/intel-m10-bmc-hwmon.c
F: drivers/mfd/intel-m10-bmc.c
F: include/linux/mfd/intel-m10-bmc.h
INTEL MENLOW THERMAL DRIVER
M: Sujith Thomas <sujith.thomas@intel.com>
L: platform-driver-x86@vger.kernel.org
......@@ -12543,6 +12575,15 @@ F: include/net/netrom.h
F: include/uapi/linux/netrom.h
F: net/netrom/
NETRONIX EMBEDDED CONTROLLER
M: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
S: Maintained
F: Documentation/devicetree/bindings/mfd/netronix,ntxec.yaml
F: drivers/mfd/ntxec.c
F: drivers/pwm/pwm-ntxec.c
F: drivers/rtc/rtc-ntxec.c
F: include/linux/mfd/ntxec.h
NETRONOME ETHERNET DRIVERS
M: Simon Horman <simon.horman@netronome.com>
R: Jakub Kicinski <kuba@kernel.org>
......@@ -15634,20 +15675,27 @@ F: Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt
F: Documentation/devicetree/bindings/regulator/rohm,bd70528-regulator.txt
F: drivers/clk/clk-bd718x7.c
F: drivers/gpio/gpio-bd70528.c
F: drivers/gpio/gpio-bd71815.c
F: drivers/gpio/gpio-bd71828.c
F: drivers/mfd/rohm-bd70528.c
F: drivers/mfd/rohm-bd71828.c
F: drivers/mfd/rohm-bd718x7.c
F: drivers/mfd/rohm-bd9576.c
F: drivers/power/supply/bd70528-charger.c
F: drivers/regulator/bd70528-regulator.c
F: drivers/regulator/bd71815-regulator.c
F: drivers/regulator/bd71828-regulator.c
F: drivers/regulator/bd718x7-regulator.c
F: drivers/regulator/bd9576-regulator.c
F: drivers/regulator/rohm-regulator.c
F: drivers/rtc/rtc-bd70528.c
F: drivers/watchdog/bd70528_wdt.c
F: drivers/watchdog/bd9576_wdt.c
F: include/linux/mfd/rohm-bd70528.h
F: include/linux/mfd/rohm-bd71815.h
F: include/linux/mfd/rohm-bd71828.h
F: include/linux/mfd/rohm-bd718x7.h
F: include/linux/mfd/rohm-bd957x.h
F: include/linux/mfd/rohm-generic.h
F: include/linux/mfd/rohm-shared.h
......@@ -18147,29 +18195,6 @@ S: Maintained
F: sound/soc/codecs/isabelle*
F: sound/soc/codecs/lm49453*
TI LP855x BACKLIGHT DRIVER
M: Milo Kim <milo.kim@ti.com>
S: Maintained
F: Documentation/driver-api/backlight/lp855x-driver.rst
F: drivers/video/backlight/lp855x_bl.c
F: include/linux/platform_data/lp855x.h
TI LP8727 CHARGER DRIVER
M: Milo Kim <milo.kim@ti.com>
S: Maintained
F: drivers/power/supply/lp8727_charger.c
F: include/linux/platform_data/lp8727.h
TI LP8788 MFD DRIVER
M: Milo Kim <milo.kim@ti.com>
S: Maintained
F: drivers/iio/adc/lp8788_adc.c
F: drivers/leds/leds-lp8788.c
F: drivers/mfd/lp8788*.c
F: drivers/power/supply/lp8788-charger.c
F: drivers/regulator/lp8788-*.c
F: include/linux/mfd/lp8788*.h
TI NETCP ETHERNET DRIVER
M: Wingman Kwok <w-kwok2@ti.com>
M: Murali Karicheri <m-karicheri2@ti.com>
......@@ -19587,7 +19612,6 @@ F: Documentation/devicetree/bindings/sound/wlf,arizona.yaml
F: Documentation/hwmon/wm83??.rst
F: arch/arm/mach-s3c/mach-crag6410*
F: drivers/clk/clk-wm83*.c
F: drivers/extcon/extcon-arizona.c
F: drivers/gpio/gpio-*wm*.c
F: drivers/gpio/gpio-arizona.c
F: drivers/hwmon/wm83??-hwmon.c
......@@ -19611,7 +19635,7 @@ F: include/linux/mfd/wm8400*
F: include/linux/regulator/arizona*
F: include/linux/wm97xx.h
F: include/sound/wm????.h
F: sound/soc/codecs/arizona.?
F: sound/soc/codecs/arizona*
F: sound/soc/codecs/cs47l24*
F: sound/soc/codecs/wm*
......
......@@ -13,6 +13,8 @@
#include <linux/regmap.h>
/* clk control registers */
/* BD71815 */
#define BD71815_REG_OUT32K 0x1d
/* BD70528 */
#define BD70528_REG_OUT32K 0x2c
/* BD71828 */
......@@ -118,6 +120,10 @@ static int bd71837_clk_probe(struct platform_device *pdev)
c->reg = BD70528_REG_OUT32K;
c->mask = CLK_OUT_EN_MASK;
break;
case ROHM_CHIP_TYPE_BD71815:
c->reg = BD71815_REG_OUT32K;
c->mask = CLK_OUT_EN_MASK;
break;
default:
dev_err(&pdev->dev, "Unknown clk chip\n");
return -EINVAL;
......@@ -146,6 +152,7 @@ static const struct platform_device_id bd718x7_clk_id[] = {
{ "bd71847-clk", ROHM_CHIP_TYPE_BD71847 },
{ "bd70528-clk", ROHM_CHIP_TYPE_BD70528 },
{ "bd71828-clk", ROHM_CHIP_TYPE_BD71828 },
{ "bd71815-clk", ROHM_CHIP_TYPE_BD71815 },
{ },
};
MODULE_DEVICE_TABLE(platform, bd718x7_clk_id);
......@@ -161,6 +168,6 @@ static struct platform_driver bd71837_clk = {
module_platform_driver(bd71837_clk);
MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
MODULE_DESCRIPTION("BD71837/BD71847/BD70528 chip clk driver");
MODULE_DESCRIPTION("BD718(15/18/28/37/47/50) and BD70528 chip clk driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:bd718xx-clk");
......@@ -21,14 +21,6 @@ config EXTCON_ADC_JACK
help
Say Y here to enable extcon device driver based on ADC values.
config EXTCON_ARIZONA
tristate "Wolfson Arizona EXTCON support"
depends on MFD_ARIZONA && INPUT && SND_SOC
help
Say Y here to enable support for external accessory detection
with Wolfson Arizona devices. These are audio CODECs with
advanced audio accessory detection support.
config EXTCON_AXP288
tristate "X-Power AXP288 EXTCON support"
depends on MFD_AXP20X && USB_SUPPORT && X86 && ACPI
......
......@@ -6,7 +6,6 @@
obj-$(CONFIG_EXTCON) += extcon-core.o
extcon-core-objs += extcon.o devres.o
obj-$(CONFIG_EXTCON_ADC_JACK) += extcon-adc-jack.o
obj-$(CONFIG_EXTCON_ARIZONA) += extcon-arizona.o
obj-$(CONFIG_EXTCON_AXP288) += extcon-axp288.o
obj-$(CONFIG_EXTCON_FSA9480) += extcon-fsa9480.o
obj-$(CONFIG_EXTCON_GPIO) += extcon-gpio.o
......
......@@ -1105,6 +1105,16 @@ config GPIO_BD70528
This driver can also be built as a module. If so, the module
will be called gpio-bd70528.
config GPIO_BD71815
tristate "ROHM BD71815 PMIC GPIO support"
depends on MFD_ROHM_BD71828
help
Support for GPO(s) on ROHM BD71815 PMIC. There are two GPOs
available on the ROHM PMIC.
This driver can also be built as a module. If so, the module
will be called gpio-bd71815.
config GPIO_BD71828
tristate "ROHM BD71828 GPIO support"
depends on MFD_ROHM_BD71828
......
......@@ -39,6 +39,7 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
obj-$(CONFIG_GPIO_BCM_XGS_IPROC) += gpio-xgs-iproc.o
obj-$(CONFIG_GPIO_BD70528) += gpio-bd70528.o
obj-$(CONFIG_GPIO_BD71815) += gpio-bd71815.o
obj-$(CONFIG_GPIO_BD71828) += gpio-bd71828.o
obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o
obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
......
// SPDX-License-Identifier: GPL-2.0
/*
* Support to GPOs on ROHM BD71815
* Copyright 2021 ROHM Semiconductors.
* Author: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
*
* Copyright 2014 Embest Technology Co. Ltd. Inc.
* Author: yanglsh@embest-tech.com
*/
#include <linux/gpio/driver.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
/* For the BD71815 register definitions */
#include <linux/mfd/rohm-bd71815.h>
struct bd71815_gpio {
/* chip.parent points the MFD which provides DT node and regmap */
struct gpio_chip chip;
/* dev points to the platform device for devm and prints */
struct device *dev;
struct regmap *regmap;
};
static int bd71815gpo_get(struct gpio_chip *chip, unsigned int offset)
{
struct bd71815_gpio *bd71815 = gpiochip_get_data(chip);
int ret, val;
ret = regmap_read(bd71815->regmap, BD71815_REG_GPO, &val);
if (ret)
return ret;
return (val >> offset) & 1;
}
static void bd71815gpo_set(struct gpio_chip *chip, unsigned int offset,
int value)
{
struct bd71815_gpio *bd71815 = gpiochip_get_data(chip);
int ret, bit;
bit = BIT(offset);
if (value)
ret = regmap_set_bits(bd71815->regmap, BD71815_REG_GPO, bit);
else
ret = regmap_clear_bits(bd71815->regmap, BD71815_REG_GPO, bit);
if (ret)
dev_warn(bd71815->dev, "failed to toggle GPO\n");
}
static int bd71815_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
unsigned long config)
{
struct bd71815_gpio *bdgpio = gpiochip_get_data(chip);
switch (pinconf_to_config_param(config)) {
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
return regmap_update_bits(bdgpio->regmap,
BD71815_REG_GPO,
BD71815_GPIO_DRIVE_MASK << offset,
BD71815_GPIO_OPEN_DRAIN << offset);
case PIN_CONFIG_DRIVE_PUSH_PULL:
return regmap_update_bits(bdgpio->regmap,
BD71815_REG_GPO,
BD71815_GPIO_DRIVE_MASK << offset,
BD71815_GPIO_CMOS << offset);
default:
break;
}
return -ENOTSUPP;
}
/* BD71815 GPIO is actually GPO */
static int bd71815gpo_direction_get(struct gpio_chip *gc, unsigned int offset)
{
return GPIO_LINE_DIRECTION_OUT;
}
/* Template for GPIO chip */
static const struct gpio_chip bd71815gpo_chip = {
.label = "bd71815",
.owner = THIS_MODULE,
.get = bd71815gpo_get,
.get_direction = bd71815gpo_direction_get,
.set = bd71815gpo_set,
.set_config = bd71815_gpio_set_config,
.can_sleep = true,
};
#define BD71815_TWO_GPIOS GENMASK(1, 0)
#define BD71815_ONE_GPIO BIT(0)
/*
* Sigh. The BD71815 and BD71817 were originally designed to support two GPO
* pins. At some point it was noticed the second GPO pin which is the E5 pin
* located at the center of IC is hard to use on PCB (due to the location). It
* was decided to not promote this second GPO and the pin is marked as GND in
* the datasheet. The functionality is still there though! I guess driving a GPO
* connected to the ground is a bad idea. Thus we do not support it by default.
* OTOH - the original driver written by colleagues at Embest did support
* controlling this second GPO. It is thus possible this is used in some of the
* products.
*
* This driver does not by default support configuring this second GPO
* but allows using it by providing the DT property
* "rohm,enable-hidden-gpo".
*/
static int bd71815_init_valid_mask(struct gpio_chip *gc,
unsigned long *valid_mask,
unsigned int ngpios)
{
if (ngpios != 2)
return 0;
if (gc->parent && device_property_present(gc->parent,
"rohm,enable-hidden-gpo"))
*valid_mask = BD71815_TWO_GPIOS;
else
*valid_mask = BD71815_ONE_GPIO;
return 0;
}
static int gpo_bd71815_probe(struct platform_device *pdev)
{
struct bd71815_gpio *g;
struct device *parent, *dev;
/*
* Bind devm lifetime to this platform device => use dev for devm.
* also the prints should originate from this device.
*/
dev = &pdev->dev;
/* The device-tree and regmap come from MFD => use parent for that */
parent = dev->parent;
g = devm_kzalloc(dev, sizeof(*g), GFP_KERNEL);
if (!g)
return -ENOMEM;
g->chip = bd71815gpo_chip;
/*
* FIXME: As writing of this the sysfs interface for GPIO control does
* not respect the valid_mask. Do not trust it but rather set the ngpios
* to 1 if "rohm,enable-hidden-gpo" is not given.
*
* This check can be removed later if the sysfs export is fixed and
* if the fix is backported.
*
* For now it is safest to just set the ngpios though.
*/
if (device_property_present(parent, "rohm,enable-hidden-gpo"))
g->chip.ngpio = 2;
else
g->chip.ngpio = 1;
g->chip.init_valid_mask = bd71815_init_valid_mask;
g->chip.base = -1;
g->chip.parent = parent;
g->regmap = dev_get_regmap(parent, NULL);
g->dev = dev;
return devm_gpiochip_add_data(dev, &g->chip, g);
}
static struct platform_driver gpo_bd71815_driver = {
.driver = {
.name = "bd71815-gpo",
},
.probe = gpo_bd71815_probe,
};
module_platform_driver(gpo_bd71815_driver);
MODULE_ALIAS("platform:bd71815-gpo");
MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
MODULE_AUTHOR("Peter Yang <yanglsh@embest-tech.com>");
MODULE_DESCRIPTION("GPO interface for BD71815");
MODULE_LICENSE("GPL");
......@@ -22,7 +22,6 @@
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_data/i2c-designware.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
......@@ -206,7 +205,6 @@ static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = {
static int dw_i2c_plat_probe(struct platform_device *pdev)
{
struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
struct i2c_adapter *adap;
struct dw_i2c_dev *dev;
struct i2c_timings *t;
......@@ -236,9 +234,6 @@ static int dw_i2c_plat_probe(struct platform_device *pdev)
reset_control_deassert(dev->rst);
t = &dev->timings;
if (pdata)
t->bus_freq_hz = pdata->i2c_scl_freq;
else
i2c_parse_fw_timings(&pdev->dev, t, false);
i2c_dw_adjust_bus_speed(dev);
......
......@@ -94,6 +94,17 @@ config INPUT_ARIZONA_HAPTICS
To compile this driver as a module, choose M here: the
module will be called arizona-haptics.
config INPUT_ATC260X_ONKEY
tristate "Actions Semi ATC260x PMIC ONKEY"
depends on MFD_ATC260X
help
Support the ONKEY of ATC260x PMICs as an input device reporting
power button status. ONKEY can be used to wakeup from low power
modes and force a reset on long press.
To compile this driver as a module, choose M here: the
module will be called atc260x-onkey.
config INPUT_ATMEL_CAPTOUCH
tristate "Atmel Capacitive Touch Button Driver"
depends on OF || COMPILE_TEST
......
......@@ -17,6 +17,7 @@ obj-$(CONFIG_INPUT_ADXL34X_SPI) += adxl34x-spi.o
obj-$(CONFIG_INPUT_APANEL) += apanel.o
obj-$(CONFIG_INPUT_ARIEL_PWRBUTTON) += ariel-pwrbutton.o
obj-$(CONFIG_INPUT_ARIZONA_HAPTICS) += arizona-haptics.o
obj-$(CONFIG_INPUT_ATC260X_ONKEY) += atc260x-onkey.o
obj-$(CONFIG_INPUT_ATI_REMOTE2) += ati_remote2.o
obj-$(CONFIG_INPUT_ATLAS_BTNS) += atlas_btns.o
obj-$(CONFIG_INPUT_ATMEL_CAPTOUCH) += atmel_captouch.o
......@@ -86,4 +87,3 @@ obj-$(CONFIG_INPUT_WM831X_ON) += wm831x-on.o
obj-$(CONFIG_INPUT_XEN_KBDDEV_FRONTEND) += xen-kbdfront.o
obj-$(CONFIG_INPUT_YEALINK) += yealink.o
obj-$(CONFIG_INPUT_IDEAPAD_SLIDEBAR) += ideapad_slidebar.o
// SPDX-License-Identifier: GPL-2.0+
/*
* Onkey driver for Actions Semi ATC260x PMICs.
*
* Copyright (c) 2020 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
*/
#include <linux/bitfield.h>
#include <linux/input.h>
#include <linux/interrupt.h>
#include <linux/mfd/atc260x/core.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
/* <2s for short press, >2s for long press */
#define KEY_PRESS_TIME_SEC 2
/* Driver internals */
enum atc260x_onkey_reset_status {
KEY_RESET_HW_DEFAULT,
KEY_RESET_DISABLED,
KEY_RESET_USER_SEL,
};
struct atc260x_onkey_params {
u32 reg_int_ctl;
u32 kdwn_state_bm;
u32 long_int_pnd_bm;
u32 short_int_pnd_bm;
u32 kdwn_int_pnd_bm;
u32 press_int_en_bm;
u32 kdwn_int_en_bm;
u32 press_time_bm;
u32 reset_en_bm;
u32 reset_time_bm;
};
struct atc260x_onkey {
struct atc260x *atc260x;
const struct atc260x_onkey_params *params;
struct input_dev *input_dev;
struct delayed_work work;
int irq;
};
static const struct atc260x_onkey_params atc2603c_onkey_params = {
.reg_int_ctl = ATC2603C_PMU_SYS_CTL2,
.long_int_pnd_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_LONG_PRESS,
.short_int_pnd_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_SHORT_PRESS,
.kdwn_int_pnd_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_PD,
.press_int_en_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_INT_EN,
.kdwn_int_en_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_INT_EN,
.kdwn_state_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS,
.press_time_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_TIME,
.reset_en_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_RESET_EN,
.reset_time_bm = ATC2603C_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL,
};
static const struct atc260x_onkey_params atc2609a_onkey_params = {
.reg_int_ctl = ATC2609A_PMU_SYS_CTL2,
.long_int_pnd_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_LONG_PRESS,
.short_int_pnd_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_SHORT_PRESS,
.kdwn_int_pnd_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_PD,
.press_int_en_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_LSP_INT_EN,
.kdwn_int_en_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_INT_EN,
.kdwn_state_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS,
.press_time_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_TIME,
.reset_en_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_RESET_EN,
.reset_time_bm = ATC2609A_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL,
};
static int atc2603x_onkey_hw_init(struct atc260x_onkey *onkey,
enum atc260x_onkey_reset_status reset_status,
u32 reset_time, u32 press_time)
{
u32 reg_bm, reg_val;
reg_bm = onkey->params->long_int_pnd_bm |
onkey->params->short_int_pnd_bm |
onkey->params->kdwn_int_pnd_bm |
onkey->params->press_int_en_bm |
onkey->params->kdwn_int_en_bm;
reg_val = reg_bm | press_time;
reg_bm |= onkey->params->press_time_bm;
if (reset_status == KEY_RESET_DISABLED) {
reg_bm |= onkey->params->reset_en_bm;
} else if (reset_status == KEY_RESET_USER_SEL) {
reg_bm |= onkey->params->reset_en_bm |
onkey->params->reset_time_bm;
reg_val |= onkey->params->reset_en_bm | reset_time;
}
return regmap_update_bits(onkey->atc260x->regmap,
onkey->params->reg_int_ctl, reg_bm, reg_val);
}
static void atc260x_onkey_query(struct atc260x_onkey *onkey)
{
u32 reg_bits;
int ret, key_down;
ret = regmap_read(onkey->atc260x->regmap,
onkey->params->reg_int_ctl, &key_down);
if (ret) {
key_down = 1;
dev_err(onkey->atc260x->dev,
"Failed to read onkey status: %d\n", ret);
} else {
key_down &= onkey->params->kdwn_state_bm;
}
/*
* The hardware generates interrupt only when the onkey pin is
* asserted. Hence, the deassertion of the pin is simulated through
* work queue.
*/
if (key_down) {
schedule_delayed_work(&onkey->work, msecs_to_jiffies(200));
return;
}
/*
* The key-down status bit is cleared when the On/Off button
* is released.
*/
input_report_key(onkey->input_dev, KEY_POWER, 0);
input_sync(onkey->input_dev);
reg_bits = onkey->params->long_int_pnd_bm |
onkey->params->short_int_pnd_bm |
onkey->params->kdwn_int_pnd_bm |
onkey->params->press_int_en_bm |
onkey->params->kdwn_int_en_bm;
/* Clear key press pending events and enable key press interrupts. */
regmap_update_bits(onkey->atc260x->regmap, onkey->params->reg_int_ctl,
reg_bits, reg_bits);
}
static void atc260x_onkey_work(struct work_struct *work)
{
struct atc260x_onkey *onkey = container_of(work, struct atc260x_onkey,
work.work);
atc260x_onkey_query(onkey);
}
static irqreturn_t atc260x_onkey_irq(int irq, void *data)
{
struct atc260x_onkey *onkey = data;
int ret;
/* Disable key press interrupts. */
ret = regmap_update_bits(onkey->atc260x->regmap,
onkey->params->reg_int_ctl,
onkey->params->press_int_en_bm |
onkey->params->kdwn_int_en_bm, 0);
if (ret)
dev_err(onkey->atc260x->dev,
"Failed to disable interrupts: %d\n", ret);
input_report_key(onkey->input_dev, KEY_POWER, 1);
input_sync(onkey->input_dev);
atc260x_onkey_query(onkey);
return IRQ_HANDLED;
}
static int atc260x_onkey_open(struct input_dev *dev)
{
struct atc260x_onkey *onkey = input_get_drvdata(dev);
enable_irq(onkey->irq);
return 0;
}
static void atc260x_onkey_close(struct input_dev *dev)
{
struct atc260x_onkey *onkey = input_get_drvdata(dev);
disable_irq(onkey->irq);
cancel_delayed_work_sync(&onkey->work);
}
static int atc260x_onkey_probe(struct platform_device *pdev)
{
struct atc260x *atc260x = dev_get_drvdata(pdev->dev.parent);
struct atc260x_onkey *onkey;
struct input_dev *input_dev;
enum atc260x_onkey_reset_status reset_status;
u32 press_time = KEY_PRESS_TIME_SEC, reset_time = 0;
int val, error;
onkey = devm_kzalloc(&pdev->dev, sizeof(*onkey), GFP_KERNEL);
if (!onkey)
return -ENOMEM;
error = device_property_read_u32(pdev->dev.parent,
"reset-time-sec", &val);
if (error) {
reset_status = KEY_RESET_HW_DEFAULT;
} else if (val) {
if (val < 6 || val > 12) {
dev_err(&pdev->dev, "reset-time-sec out of range\n");
return -EINVAL;
}
reset_status = KEY_RESET_USER_SEL;
reset_time = (val - 6) / 2;
} else {
reset_status = KEY_RESET_DISABLED;
dev_dbg(&pdev->dev, "Disabled reset on long-press\n");
}
switch (atc260x->ic_type) {
case ATC2603C:
onkey->params = &atc2603c_onkey_params;
press_time = FIELD_PREP(ATC2603C_PMU_SYS_CTL2_ONOFF_PRESS_TIME,
press_time);
reset_time = FIELD_PREP(ATC2603C_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL,
reset_time);
break;
case ATC2609A:
onkey->params = &atc2609a_onkey_params;
press_time = FIELD_PREP(ATC2609A_PMU_SYS_CTL2_ONOFF_PRESS_TIME,
press_time);
reset_time = FIELD_PREP(ATC2609A_PMU_SYS_CTL2_ONOFF_RESET_TIME_SEL,
reset_time);
break;
default:
dev_err(&pdev->dev,
"OnKey not supported for ATC260x PMIC type: %u\n",
atc260x->ic_type);
return -EINVAL;
}
input_dev = devm_input_allocate_device(&pdev->dev);
if (!input_dev) {
dev_err(&pdev->dev, "Failed to allocate input device\n");
return -ENOMEM;
}
onkey->input_dev = input_dev;
onkey->atc260x = atc260x;
input_dev->name = "atc260x-onkey";
input_dev->phys = "atc260x-onkey/input0";
input_dev->open = atc260x_onkey_open;
input_dev->close = atc260x_onkey_close;
input_set_capability(input_dev, EV_KEY, KEY_POWER);
input_set_drvdata(input_dev, onkey);
INIT_DELAYED_WORK(&onkey->work, atc260x_onkey_work);
onkey->irq = platform_get_irq(pdev, 0);
if (onkey->irq < 0)
return onkey->irq;
error = devm_request_threaded_irq(&pdev->dev, onkey->irq, NULL,
atc260x_onkey_irq, IRQF_ONESHOT,
dev_name(&pdev->dev), onkey);
if (error) {
dev_err(&pdev->dev,
"Failed to register IRQ %d: %d\n", onkey->irq, error);
return error;
}
/* Keep IRQ disabled until atc260x_onkey_open() is called. */
disable_irq(onkey->irq);
error = input_register_device(input_dev);
if (error) {
dev_err(&pdev->dev,
"Failed to register input device: %d\n", error);
return error;
}
error = atc2603x_onkey_hw_init(onkey, reset_status,
reset_time, press_time);
if (error)
return error;
device_init_wakeup(&pdev->dev, true);
return 0;
}
static struct platform_driver atc260x_onkey_driver = {
.probe = atc260x_onkey_probe,
.driver = {
.name = "atc260x-onkey",
},
};
module_platform_driver(atc260x_onkey_driver);
MODULE_DESCRIPTION("Onkey driver for ATC260x PMICs");
MODULE_AUTHOR("Cristian Ciocaltea <cristian.ciocaltea@gmail.com>");
MODULE_LICENSE("GPL");
......@@ -967,6 +967,17 @@ config MFD_VIPERBOARD
You need to select the mfd cell drivers separately.
The drivers do not support all features the board exposes.
config MFD_NTXEC
tristate "Netronix embedded controller (EC)"
depends on OF || COMPILE_TEST
depends on I2C
select REGMAP_I2C
select MFD_CORE
help
Say yes here if you want to support the embedded controller found in
certain e-book readers designed by the original design manufacturer
Netronix.
config MFD_RETU
tristate "Nokia Retu and Tahvo multi-function device"
select MFD_CORE
......@@ -1224,7 +1235,8 @@ config MFD_SC27XX_PMIC
config ABX500_CORE
bool "ST-Ericsson ABX500 Mixed Signal Circuit register functions"
default y if ARCH_U300 || ARCH_U8500 || COMPILE_TEST
depends on ARCH_U8500 || COMPILE_TEST
default y if ARCH_U8500
help
Say yes here if you have the ABX500 Mixed Signal IC family
chips. This core driver expose register access functions.
......@@ -1232,30 +1244,6 @@ config ABX500_CORE
remain unchanged when IC changes. Binding of the functions to
actual register access is done by the IC core driver.
config AB3100_CORE
bool "ST-Ericsson AB3100 Mixed Signal Circuit core functions"
depends on I2C=y && ABX500_CORE
select MFD_CORE
default y if ARCH_U300
help
Select this to enable the AB3100 Mixed Signal IC core
functionality. This connects to a AB3100 on the I2C bus
and expose a number of symbols needed for dependent devices
to read and write registers and subscribe to events from
this multi-functional IC. This is needed to use other features
of the AB3100 such as battery-backed RTC, charging control,
LEDs, vibrator, system power and temperature, power management
and ALSA sound.
config AB3100_OTP
tristate "ST-Ericsson AB3100 OTP functions"
depends on AB3100_CORE
default y if AB3100_CORE
help
Select this to enable the AB3100 Mixed Signal IC OTP (one-time
programmable memory) support. This exposes a sysfs file to read
out OTP values.
config AB8500_CORE
bool "ST-Ericsson AB8500 Mixed Signal Power Management chip"
depends on ABX500_CORE && MFD_DB8500_PRCMU
......@@ -1975,19 +1963,31 @@ config MFD_ROHM_BD70528
charger.
config MFD_ROHM_BD71828
tristate "ROHM BD71828 Power Management IC"
tristate "ROHM BD71828 and BD71815 Power Management IC"
depends on I2C=y
depends on OF
select REGMAP_I2C
select REGMAP_IRQ
select MFD_CORE
help
Select this option to get support for the ROHM BD71828 Power
Management IC. BD71828GW is a single-chip power management IC for
battery-powered portable devices. The IC integrates 7 buck
converters, 7 LDOs, and a 1500 mA single-cell linear charger.
Also included is a Coulomb counter, a real-time clock (RTC), and
a 32.768 kHz clock gate.
Select this option to get support for the ROHM BD71828 and BD71815
Power Management ICs. BD71828GW and BD71815AGW are single-chip power
management ICs mainly for battery-powered portable devices.
The BD71828 integrates 7 buck converters and 7 LDOs. The BD71815
has 5 bucks, 7 LDOs, and a boost for driving LEDs. Both ICs provide
also a single-cell linear charger, a Coulomb counter, a real-time
clock (RTC), GPIOs and a 32.768 kHz clock gate.
config MFD_ROHM_BD957XMUF
tristate "ROHM BD9576MUF and BD9573MUF Power Management ICs"
depends on I2C=y
depends on OF
select REGMAP_I2C
select MFD_CORE
help
Select this option to get support for the ROHM BD9576MUF and
BD9573MUF Power Management ICs. BD9576 and BD9573 are primarily
designed to be used to power R-Car series processors.
config MFD_STM32_LPTIMER
tristate "Support for STM32 Low-Power Timer"
......@@ -2055,6 +2055,24 @@ config MFD_WCD934X
This driver provides common support WCD934x audio codec and its
associated Pin Controller, Soundwire Controller and Audio codec.
config MFD_ATC260X
tristate
select MFD_CORE
select REGMAP
select REGMAP_IRQ
config MFD_ATC260X_I2C
tristate "Actions Semi ATC260x PMICs with I2C"
select MFD_ATC260X
select REGMAP_I2C
depends on I2C
help
Support for the Actions Semi ATC260x PMICs controlled via I2C.
This driver provides common support for accessing the ATC2603C
and ATC2609A chip variants, additional drivers must be enabled
in order to use the functionality of the device.
config MFD_KHADAS_MCU
tristate "Support for Khadas System control Microcontroller"
depends on I2C
......
......@@ -178,8 +178,6 @@ obj-$(CONFIG_MFD_PCF50633) += pcf50633.o
obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o
obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o
obj-$(CONFIG_ABX500_CORE) += abx500-core.o
obj-$(CONFIG_AB3100_CORE) += ab3100-core.o
obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o
obj-$(CONFIG_AB8500_DEBUG) += ab8500-debugfs.o
obj-$(CONFIG_MFD_DB8500_PRCMU) += db8500-prcmu.o
# ab8500-core need to come after db8500-prcmu (which provides the channel)
......@@ -218,6 +216,7 @@ obj-$(CONFIG_MFD_INTEL_PMC_BXT) += intel_pmc_bxt.o
obj-$(CONFIG_MFD_INTEL_PMT) += intel_pmt.o
obj-$(CONFIG_MFD_PALMAS) += palmas.o
obj-$(CONFIG_MFD_VIPERBOARD) += viperboard.o
obj-$(CONFIG_MFD_NTXEC) += ntxec.o
obj-$(CONFIG_MFD_RC5T583) += rc5t583.o rc5t583-irq.o
obj-$(CONFIG_MFD_RK808) += rk808.o
obj-$(CONFIG_MFD_RN5T618) += rn5t618.o
......@@ -261,6 +260,7 @@ obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
obj-$(CONFIG_MFD_ROHM_BD70528) += rohm-bd70528.o
obj-$(CONFIG_MFD_ROHM_BD71828) += rohm-bd71828.o
obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
obj-$(CONFIG_MFD_ROHM_BD957XMUF) += rohm-bd9576.o
obj-$(CONFIG_MFD_STMFX) += stmfx.o
obj-$(CONFIG_MFD_KHADAS_MCU) += khadas-mcu.o
obj-$(CONFIG_MFD_ACER_A500_EC) += acer-ec-a500.o
......@@ -268,3 +268,6 @@ obj-$(CONFIG_MFD_ACER_A500_EC) += acer-ec-a500.o
obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o
obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o
obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o
obj-$(CONFIG_MFD_ATC260X) += atc260x-core.o
obj-$(CONFIG_MFD_ATC260X_I2C) += atc260x-i2c.o
This diff is collapsed.
// SPDX-License-Identifier: GPL-2.0-only
/*
* drivers/mfd/ab3100_otp.c
*
* Copyright (C) 2007-2009 ST-Ericsson AB
* Driver to read out OTP from the AB3100 Mixed-signal circuit
* Author: Linus Walleij <linus.walleij@stericsson.com>
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mfd/abx500.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
/* The OTP registers */
#define AB3100_OTP0 0xb0
#define AB3100_OTP1 0xb1
#define AB3100_OTP2 0xb2
#define AB3100_OTP3 0xb3
#define AB3100_OTP4 0xb4
#define AB3100_OTP5 0xb5
#define AB3100_OTP6 0xb6
#define AB3100_OTP7 0xb7
#define AB3100_OTPP 0xbf
/**
* struct ab3100_otp
* @dev: containing device
* @locked: whether the OTP is locked, after locking, no more bits
* can be changed but before locking it is still possible
* to change bits from 1->0.
* @freq: clocking frequency for the OTP, this frequency is either
* 32768Hz or 1MHz/30
* @paf: product activation flag, indicates whether this is a real
* product (paf true) or a lab board etc (paf false)
* @imeich: if this is set it is possible to override the
* IMEI number found in the tac, fac and svn fields with
* (secured) software
* @cid: customer ID
* @tac: type allocation code of the IMEI
* @fac: final assembly code of the IMEI
* @svn: software version number of the IMEI
* @debugfs: a debugfs file used when dumping to file
*/
struct ab3100_otp {
struct device *dev;
bool locked;
u32 freq;
bool paf;
bool imeich;
u16 cid:14;
u32 tac:20;
u8 fac;
u32 svn:20;
struct dentry *debugfs;
};
static int __init ab3100_otp_read(struct ab3100_otp *otp)
{
u8 otpval[8];
u8 otpp;
int err;
err = abx500_get_register_interruptible(otp->dev, 0,
AB3100_OTPP, &otpp);
if (err) {
dev_err(otp->dev, "unable to read OTPP register\n");
return err;
}
err = abx500_get_register_page_interruptible(otp->dev, 0,
AB3100_OTP0, otpval, 8);
if (err) {
dev_err(otp->dev, "unable to read OTP register page\n");
return err;
}
/* Cache OTP properties, they never change by nature */
otp->locked = (otpp & 0x80);
otp->freq = (otpp & 0x40) ? 32768 : 34100;
otp->paf = (otpval[1] & 0x80);
otp->imeich = (otpval[1] & 0x40);
otp->cid = ((otpval[1] << 8) | otpval[0]) & 0x3fff;
otp->tac = ((otpval[4] & 0x0f) << 16) | (otpval[3] << 8) | otpval[2];
otp->fac = ((otpval[5] & 0x0f) << 4) | (otpval[4] >> 4);
otp->svn = (otpval[7] << 12) | (otpval[6] << 4) | (otpval[5] >> 4);
return 0;
}
/*
* This is a simple debugfs human-readable file that dumps out
* the contents of the OTP.
*/
#ifdef CONFIG_DEBUG_FS
static int ab3100_show_otp(struct seq_file *s, void *v)
{
struct ab3100_otp *otp = s->private;
seq_printf(s, "OTP is %s\n", otp->locked ? "LOCKED" : "UNLOCKED");
seq_printf(s, "OTP clock switch startup is %uHz\n", otp->freq);
seq_printf(s, "PAF is %s\n", otp->paf ? "SET" : "NOT SET");
seq_printf(s, "IMEI is %s\n", otp->imeich ?
"CHANGEABLE" : "NOT CHANGEABLE");
seq_printf(s, "CID: 0x%04x (decimal: %d)\n", otp->cid, otp->cid);
seq_printf(s, "IMEI: %u-%u-%u\n", otp->tac, otp->fac, otp->svn);
return 0;
}
static int ab3100_otp_open(struct inode *inode, struct file *file)
{
return single_open(file, ab3100_show_otp, inode->i_private);
}
static const struct file_operations ab3100_otp_operations = {
.open = ab3100_otp_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static void __init ab3100_otp_init_debugfs(struct device *dev,
struct ab3100_otp *otp)
{
otp->debugfs = debugfs_create_file("ab3100_otp", S_IFREG | S_IRUGO,
NULL, otp, &ab3100_otp_operations);
}
static void __exit ab3100_otp_exit_debugfs(struct ab3100_otp *otp)
{
debugfs_remove(otp->debugfs);
}
#else
/* Compile this out if debugfs not selected */
static inline void __init ab3100_otp_init_debugfs(struct device *dev,
struct ab3100_otp *otp)
{
}
static inline void __exit ab3100_otp_exit_debugfs(struct ab3100_otp *otp)
{
}
#endif
#define SHOW_AB3100_ATTR(name) \
static ssize_t ab3100_otp_##name##_show(struct device *dev, \
struct device_attribute *attr, \
char *buf) \
{\
struct ab3100_otp *otp = dev_get_drvdata(dev); \
return sprintf(buf, "%u\n", otp->name); \
}
SHOW_AB3100_ATTR(locked)
SHOW_AB3100_ATTR(freq)
SHOW_AB3100_ATTR(paf)
SHOW_AB3100_ATTR(imeich)
SHOW_AB3100_ATTR(cid)
SHOW_AB3100_ATTR(fac)
SHOW_AB3100_ATTR(tac)
SHOW_AB3100_ATTR(svn)
static struct device_attribute ab3100_otp_attrs[] = {
__ATTR(locked, S_IRUGO, ab3100_otp_locked_show, NULL),
__ATTR(freq, S_IRUGO, ab3100_otp_freq_show, NULL),
__ATTR(paf, S_IRUGO, ab3100_otp_paf_show, NULL),
__ATTR(imeich, S_IRUGO, ab3100_otp_imeich_show, NULL),
__ATTR(cid, S_IRUGO, ab3100_otp_cid_show, NULL),
__ATTR(fac, S_IRUGO, ab3100_otp_fac_show, NULL),
__ATTR(tac, S_IRUGO, ab3100_otp_tac_show, NULL),
__ATTR(svn, S_IRUGO, ab3100_otp_svn_show, NULL),
};
static int __init ab3100_otp_probe(struct platform_device *pdev)
{
struct ab3100_otp *otp;
int err = 0;
int i;
otp = devm_kzalloc(&pdev->dev, sizeof(struct ab3100_otp), GFP_KERNEL);
if (!otp)
return -ENOMEM;
otp->dev = &pdev->dev;
/* Replace platform data coming in with a local struct */
platform_set_drvdata(pdev, otp);
err = ab3100_otp_read(otp);
if (err)
return err;
dev_info(&pdev->dev, "AB3100 OTP readout registered\n");
/* sysfs entries */
for (i = 0; i < ARRAY_SIZE(ab3100_otp_attrs); i++) {
err = device_create_file(&pdev->dev,
&ab3100_otp_attrs[i]);
if (err)
goto err;
}
/* debugfs entries */
ab3100_otp_init_debugfs(&pdev->dev, otp);
return 0;
err:
while (--i >= 0)
device_remove_file(&pdev->dev, &ab3100_otp_attrs[i]);
return err;
}
static int __exit ab3100_otp_remove(struct platform_device *pdev)
{
struct ab3100_otp *otp = platform_get_drvdata(pdev);
int i;
for (i = 0; i < ARRAY_SIZE(ab3100_otp_attrs); i++)
device_remove_file(&pdev->dev,
&ab3100_otp_attrs[i]);
ab3100_otp_exit_debugfs(otp);
return 0;
}
static struct platform_driver ab3100_otp_driver = {
.driver = {
.name = "ab3100-otp",
},
.remove = __exit_p(ab3100_otp_remove),
};
module_platform_driver_probe(ab3100_otp_driver, ab3100_otp_probe);
MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
MODULE_DESCRIPTION("AB3100 OTP Readout Driver");
MODULE_LICENSE("GPL");
......@@ -120,12 +120,6 @@
static DEFINE_SPINLOCK(on_stat_lock);
static u8 turn_on_stat_mask = 0xFF;
static u8 turn_on_stat_set;
static bool no_bm; /* No battery management */
/*
* not really modular, but the easiest way to keep compat with existing
* bootargs behaviour is to continue using module_param here.
*/
module_param(no_bm, bool, S_IRUGO);
#define AB9540_MODEM_CTRL2_REG 0x23
#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
......@@ -1254,14 +1248,12 @@ static int ab8500_probe(struct platform_device *pdev)
if (ret)
return ret;
if (!no_bm) {
/* Add battery management devices */
ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
ARRAY_SIZE(ab8500_bm_devs), NULL,
0, ab8500->domain);
if (ret)
dev_err(ab8500->dev, "error adding bm devices\n");
}
if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
......
......@@ -881,11 +881,6 @@ static const char * const wm5102_supplies[] = {
static const struct mfd_cell wm5102_devs[] = {
{ .name = "arizona-micsupp" },
{ .name = "arizona-gpio" },
{
.name = "arizona-extcon",
.parent_supplies = wm5102_supplies,
.num_parent_supplies = 1, /* We only need MICVDD */
},
{ .name = "arizona-haptics" },
{ .name = "arizona-pwm" },
{
......@@ -898,11 +893,6 @@ static const struct mfd_cell wm5102_devs[] = {
static const struct mfd_cell wm5110_devs[] = {
{ .name = "arizona-micsupp" },
{ .name = "arizona-gpio" },
{
.name = "arizona-extcon",
.parent_supplies = wm5102_supplies,
.num_parent_supplies = 1, /* We only need MICVDD */
},
{ .name = "arizona-haptics" },
{ .name = "arizona-pwm" },
{
......@@ -939,11 +929,6 @@ static const char * const wm8997_supplies[] = {
static const struct mfd_cell wm8997_devs[] = {
{ .name = "arizona-micsupp" },
{ .name = "arizona-gpio" },
{
.name = "arizona-extcon",
.parent_supplies = wm8997_supplies,
.num_parent_supplies = 1, /* We only need MICVDD */
},
{ .name = "arizona-haptics" },
{ .name = "arizona-pwm" },
{
......@@ -956,11 +941,6 @@ static const struct mfd_cell wm8997_devs[] = {
static const struct mfd_cell wm8998_devs[] = {
{ .name = "arizona-micsupp" },
{ .name = "arizona-gpio" },
{
.name = "arizona-extcon",
.parent_supplies = wm5102_supplies,
.num_parent_supplies = 1, /* We only need MICVDD */
},
{ .name = "arizona-haptics" },
{ .name = "arizona-pwm" },
{
......
......@@ -100,7 +100,7 @@ static irqreturn_t arizona_irq_thread(int irq, void *data)
unsigned int val;
int ret;
ret = pm_runtime_get_sync(arizona->dev);
ret = pm_runtime_resume_and_get(arizona->dev);
if (ret < 0) {
dev_err(arizona->dev, "Failed to resume device: %d\n", ret);
return IRQ_NONE;
......
......@@ -25,8 +25,8 @@
#include "arizona.h"
#ifdef CONFIG_ACPI
const struct acpi_gpio_params reset_gpios = { 1, 0, false };
const struct acpi_gpio_params ldoena_gpios = { 2, 0, false };
static const struct acpi_gpio_params reset_gpios = { 1, 0, false };
static const struct acpi_gpio_params ldoena_gpios = { 2, 0, false };
static const struct acpi_gpio_mapping arizona_acpi_gpios[] = {
{ "reset-gpios", &reset_gpios, 1, },
......
// SPDX-License-Identifier: GPL-2.0+
/*
* Core support for ATC260x PMICs
*
* Copyright (C) 2019 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* Copyright (C) 2020 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
*/
#include <linux/interrupt.h>
#include <linux/mfd/atc260x/core.h>
#include <linux/mfd/core.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
#define ATC260X_CHIP_REV_MAX 31
struct atc260x_init_regs {
unsigned int cmu_devrst;
unsigned int cmu_devrst_ints;
unsigned int ints_msk;
unsigned int pad_en;
unsigned int pad_en_extirq;
};
static void regmap_lock_mutex(void *__mutex)
{
struct mutex *mutex = __mutex;
/*
* Using regmap within an atomic context (e.g. accessing a PMIC when
* powering system down) is normally allowed only if the regmap type
* is MMIO and the regcache type is either REGCACHE_NONE or
* REGCACHE_FLAT. For slow buses like I2C and SPI, the regmap is
* internally protected by a mutex which is acquired non-atomically.
*
* Let's improve this by using a customized locking scheme inspired
* from I2C atomic transfer. See i2c_in_atomic_xfer_mode() for a
* starting point.
*/
if (system_state > SYSTEM_RUNNING && irqs_disabled())
mutex_trylock(mutex);
else
mutex_lock(mutex);
}
static void regmap_unlock_mutex(void *__mutex)
{
struct mutex *mutex = __mutex;
mutex_unlock(mutex);
}
static const struct regmap_config atc2603c_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.max_register = ATC2603C_SADDR,
.cache_type = REGCACHE_NONE,
};
static const struct regmap_config atc2609a_regmap_config = {
.reg_bits = 8,
.val_bits = 16,
.max_register = ATC2609A_SADDR,
.cache_type = REGCACHE_NONE,
};
static const struct regmap_irq atc2603c_regmap_irqs[] = {
REGMAP_IRQ_REG(ATC2603C_IRQ_AUDIO, 0, ATC2603C_INTS_MSK_AUDIO),
REGMAP_IRQ_REG(ATC2603C_IRQ_OV, 0, ATC2603C_INTS_MSK_OV),
REGMAP_IRQ_REG(ATC2603C_IRQ_OC, 0, ATC2603C_INTS_MSK_OC),
REGMAP_IRQ_REG(ATC2603C_IRQ_OT, 0, ATC2603C_INTS_MSK_OT),
REGMAP_IRQ_REG(ATC2603C_IRQ_UV, 0, ATC2603C_INTS_MSK_UV),
REGMAP_IRQ_REG(ATC2603C_IRQ_ALARM, 0, ATC2603C_INTS_MSK_ALARM),
REGMAP_IRQ_REG(ATC2603C_IRQ_ONOFF, 0, ATC2603C_INTS_MSK_ONOFF),
REGMAP_IRQ_REG(ATC2603C_IRQ_SGPIO, 0, ATC2603C_INTS_MSK_SGPIO),
REGMAP_IRQ_REG(ATC2603C_IRQ_IR, 0, ATC2603C_INTS_MSK_IR),
REGMAP_IRQ_REG(ATC2603C_IRQ_REMCON, 0, ATC2603C_INTS_MSK_REMCON),
REGMAP_IRQ_REG(ATC2603C_IRQ_POWER_IN, 0, ATC2603C_INTS_MSK_POWERIN),
};
static const struct regmap_irq atc2609a_regmap_irqs[] = {
REGMAP_IRQ_REG(ATC2609A_IRQ_AUDIO, 0, ATC2609A_INTS_MSK_AUDIO),
REGMAP_IRQ_REG(ATC2609A_IRQ_OV, 0, ATC2609A_INTS_MSK_OV),
REGMAP_IRQ_REG(ATC2609A_IRQ_OC, 0, ATC2609A_INTS_MSK_OC),
REGMAP_IRQ_REG(ATC2609A_IRQ_OT, 0, ATC2609A_INTS_MSK_OT),
REGMAP_IRQ_REG(ATC2609A_IRQ_UV, 0, ATC2609A_INTS_MSK_UV),
REGMAP_IRQ_REG(ATC2609A_IRQ_ALARM, 0, ATC2609A_INTS_MSK_ALARM),
REGMAP_IRQ_REG(ATC2609A_IRQ_ONOFF, 0, ATC2609A_INTS_MSK_ONOFF),
REGMAP_IRQ_REG(ATC2609A_IRQ_WKUP, 0, ATC2609A_INTS_MSK_WKUP),
REGMAP_IRQ_REG(ATC2609A_IRQ_IR, 0, ATC2609A_INTS_MSK_IR),
REGMAP_IRQ_REG(ATC2609A_IRQ_REMCON, 0, ATC2609A_INTS_MSK_REMCON),
REGMAP_IRQ_REG(ATC2609A_IRQ_POWER_IN, 0, ATC2609A_INTS_MSK_POWERIN),
};
static const struct regmap_irq_chip atc2603c_regmap_irq_chip = {
.name = "atc2603c",
.irqs = atc2603c_regmap_irqs,
.num_irqs = ARRAY_SIZE(atc2603c_regmap_irqs),
.num_regs = 1,
.status_base = ATC2603C_INTS_PD,
.mask_base = ATC2603C_INTS_MSK,
.mask_invert = true,
};
static const struct regmap_irq_chip atc2609a_regmap_irq_chip = {
.name = "atc2609a",
.irqs = atc2609a_regmap_irqs,
.num_irqs = ARRAY_SIZE(atc2609a_regmap_irqs),
.num_regs = 1,
.status_base = ATC2609A_INTS_PD,
.mask_base = ATC2609A_INTS_MSK,
.mask_invert = true,
};
static const struct resource atc2603c_onkey_resources[] = {
DEFINE_RES_IRQ(ATC2603C_IRQ_ONOFF),
};
static const struct resource atc2609a_onkey_resources[] = {
DEFINE_RES_IRQ(ATC2609A_IRQ_ONOFF),
};
static const struct mfd_cell atc2603c_mfd_cells[] = {
{ .name = "atc260x-regulator" },
{ .name = "atc260x-pwrc" },
{
.name = "atc260x-onkey",
.num_resources = ARRAY_SIZE(atc2603c_onkey_resources),
.resources = atc2603c_onkey_resources,
},
};
static const struct mfd_cell atc2609a_mfd_cells[] = {
{ .name = "atc260x-regulator" },
{ .name = "atc260x-pwrc" },
{
.name = "atc260x-onkey",
.num_resources = ARRAY_SIZE(atc2609a_onkey_resources),
.resources = atc2609a_onkey_resources,
},
};
static const struct atc260x_init_regs atc2603c_init_regs = {
.cmu_devrst = ATC2603C_CMU_DEVRST,
.cmu_devrst_ints = ATC2603C_CMU_DEVRST_INTS,
.ints_msk = ATC2603C_INTS_MSK,
.pad_en = ATC2603C_PAD_EN,
.pad_en_extirq = ATC2603C_PAD_EN_EXTIRQ,
};
static const struct atc260x_init_regs atc2609a_init_regs = {
.cmu_devrst = ATC2609A_CMU_DEVRST,
.cmu_devrst_ints = ATC2609A_CMU_DEVRST_INTS,
.ints_msk = ATC2609A_INTS_MSK,
.pad_en = ATC2609A_PAD_EN,
.pad_en_extirq = ATC2609A_PAD_EN_EXTIRQ,
};
static void atc260x_cmu_reset(struct atc260x *atc260x)
{
const struct atc260x_init_regs *regs = atc260x->init_regs;
/* Assert reset */
regmap_update_bits(atc260x->regmap, regs->cmu_devrst,
regs->cmu_devrst_ints, ~regs->cmu_devrst_ints);
/* De-assert reset */
regmap_update_bits(atc260x->regmap, regs->cmu_devrst,
regs->cmu_devrst_ints, regs->cmu_devrst_ints);
}
static void atc260x_dev_init(struct atc260x *atc260x)
{
const struct atc260x_init_regs *regs = atc260x->init_regs;
/* Initialize interrupt block */
atc260x_cmu_reset(atc260x);
/* Disable all interrupt sources */
regmap_write(atc260x->regmap, regs->ints_msk, 0);
/* Enable EXTIRQ pad */
regmap_update_bits(atc260x->regmap, regs->pad_en,
regs->pad_en_extirq, regs->pad_en_extirq);
}
/**
* atc260x_match_device(): Setup ATC260x variant related fields
*
* @atc260x: ATC260x device to setup (.dev field must be set)
* @regmap_cfg: regmap config associated with this ATC260x device
*
* This lets the ATC260x core configure the MFD cells and register maps
* for later use.
*/
int atc260x_match_device(struct atc260x *atc260x, struct regmap_config *regmap_cfg)
{
struct device *dev = atc260x->dev;
const void *of_data;
of_data = of_device_get_match_data(dev);
if (!of_data)
return -ENODEV;
atc260x->ic_type = (unsigned long)of_data;
switch (atc260x->ic_type) {
case ATC2603C:
*regmap_cfg = atc2603c_regmap_config;
atc260x->regmap_irq_chip = &atc2603c_regmap_irq_chip;
atc260x->cells = atc2603c_mfd_cells;
atc260x->nr_cells = ARRAY_SIZE(atc2603c_mfd_cells);
atc260x->type_name = "atc2603c";
atc260x->rev_reg = ATC2603C_CHIP_VER;
atc260x->init_regs = &atc2603c_init_regs;
break;
case ATC2609A:
*regmap_cfg = atc2609a_regmap_config;
atc260x->regmap_irq_chip = &atc2609a_regmap_irq_chip;
atc260x->cells = atc2609a_mfd_cells;
atc260x->nr_cells = ARRAY_SIZE(atc2609a_mfd_cells);
atc260x->type_name = "atc2609a";
atc260x->rev_reg = ATC2609A_CHIP_VER;
atc260x->init_regs = &atc2609a_init_regs;
break;
default:
dev_err(dev, "Unsupported ATC260x device type: %u\n",
atc260x->ic_type);
return -EINVAL;
}
atc260x->regmap_mutex = devm_kzalloc(dev, sizeof(*atc260x->regmap_mutex),
GFP_KERNEL);
if (!atc260x->regmap_mutex)
return -ENOMEM;
mutex_init(atc260x->regmap_mutex);
regmap_cfg->lock = regmap_lock_mutex,
regmap_cfg->unlock = regmap_unlock_mutex,
regmap_cfg->lock_arg = atc260x->regmap_mutex;
return 0;
}
EXPORT_SYMBOL_GPL(atc260x_match_device);
/**
* atc260x_device_probe(): Probe a configured ATC260x device
*
* @atc260x: ATC260x device to probe (must be configured)
*
* This function lets the ATC260x core register the ATC260x MFD devices
* and IRQCHIP. The ATC260x device passed in must be fully configured
* with atc260x_match_device, its IRQ set, and regmap created.
*/
int atc260x_device_probe(struct atc260x *atc260x)
{
struct device *dev = atc260x->dev;
unsigned int chip_rev;
int ret;
if (!atc260x->irq) {
dev_err(dev, "No interrupt support\n");
return -EINVAL;
}
/* Initialize the hardware */
atc260x_dev_init(atc260x);
ret = regmap_read(atc260x->regmap, atc260x->rev_reg, &chip_rev);
if (ret) {
dev_err(dev, "Failed to get chip revision\n");
return ret;
}
if (chip_rev > ATC260X_CHIP_REV_MAX) {
dev_err(dev, "Unknown chip revision: %u\n", chip_rev);
return -EINVAL;
}
atc260x->ic_ver = __ffs(chip_rev + 1U);
dev_info(dev, "Detected chip type %s rev.%c\n",
atc260x->type_name, 'A' + atc260x->ic_ver);
ret = devm_regmap_add_irq_chip(dev, atc260x->regmap, atc260x->irq, IRQF_ONESHOT,
-1, atc260x->regmap_irq_chip, &atc260x->irq_data);
if (ret) {
dev_err(dev, "Failed to add IRQ chip: %d\n", ret);
return ret;
}
ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
atc260x->cells, atc260x->nr_cells, NULL, 0,
regmap_irq_get_domain(atc260x->irq_data));
if (ret) {
dev_err(dev, "Failed to add child devices: %d\n", ret);
regmap_del_irq_chip(atc260x->irq, atc260x->irq_data);
}
return ret;
}
EXPORT_SYMBOL_GPL(atc260x_device_probe);
MODULE_DESCRIPTION("ATC260x PMICs Core support");
MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
MODULE_AUTHOR("Cristian Ciocaltea <cristian.ciocaltea@gmail.com>");
MODULE_LICENSE("GPL");
// SPDX-License-Identifier: GPL-2.0+
/*
* I2C bus interface for ATC260x PMICs
*
* Copyright (C) 2019 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* Copyright (C) 2020 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
*/
#include <linux/i2c.h>
#include <linux/mfd/atc260x/core.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/regmap.h>
static int atc260x_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct atc260x *atc260x;
struct regmap_config regmap_cfg;
int ret;
atc260x = devm_kzalloc(&client->dev, sizeof(*atc260x), GFP_KERNEL);
if (!atc260x)
return -ENOMEM;
atc260x->dev = &client->dev;
atc260x->irq = client->irq;
ret = atc260x_match_device(atc260x, &regmap_cfg);
if (ret)
return ret;
i2c_set_clientdata(client, atc260x);
atc260x->regmap = devm_regmap_init_i2c(client, &regmap_cfg);
if (IS_ERR(atc260x->regmap)) {
ret = PTR_ERR(atc260x->regmap);
dev_err(&client->dev, "failed to init regmap: %d\n", ret);
return ret;
}
return atc260x_device_probe(atc260x);
}
static const struct of_device_id atc260x_i2c_of_match[] = {
{ .compatible = "actions,atc2603c", .data = (void *)ATC2603C },
{ .compatible = "actions,atc2609a", .data = (void *)ATC2609A },
{ }
};
MODULE_DEVICE_TABLE(of, atc260x_i2c_of_match);
static struct i2c_driver atc260x_i2c_driver = {
.driver = {
.name = "atc260x",
.of_match_table = of_match_ptr(atc260x_i2c_of_match),
},
.probe = atc260x_i2c_probe,
};
module_i2c_driver(atc260x_i2c_driver);
MODULE_DESCRIPTION("ATC260x PMICs I2C bus interface");
MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
MODULE_AUTHOR("Cristian Ciocaltea <cristian.ciocaltea@gmail.com>");
MODULE_LICENSE("GPL");
......@@ -442,6 +442,16 @@ static int da9063_i2c_probe(struct i2c_client *i2c,
return ret;
}
/* If SMBus is not available and only I2C is possible, enter I2C mode */
if (i2c_check_functionality(i2c->adapter, I2C_FUNC_I2C)) {
ret = regmap_clear_bits(da9063->regmap, DA9063_REG_CONFIG_J,
DA9063_TWOWIRE_TO);
if (ret < 0) {
dev_err(da9063->dev, "Failed to set Two-Wire Bus Mode.\n");
return -EIO;
}
}
return da9063_device_init(da9063, i2c->irq);
}
......
......@@ -33,7 +33,7 @@ struct kb3930 {
struct gpio_descs *off_gpios;
};
struct kb3930 *kb3930_power_off;
static struct kb3930 *kb3930_power_off;
#define EC_GPIO_WAVE 0
#define EC_GPIO_OFF_MODE 1
......
......@@ -22,55 +22,71 @@ static const struct intel_lpss_platform_info spt_info = {
.clk_rate = 120000000,
};
static struct property_entry spt_i2c_properties[] = {
static const struct property_entry spt_i2c_properties[] = {
PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
{ },
};
static const struct software_node spt_i2c_node = {
.properties = spt_i2c_properties,
};
static const struct intel_lpss_platform_info spt_i2c_info = {
.clk_rate = 120000000,
.properties = spt_i2c_properties,
.swnode = &spt_i2c_node,
};
static struct property_entry uart_properties[] = {
static const struct property_entry uart_properties[] = {
PROPERTY_ENTRY_U32("reg-io-width", 4),
PROPERTY_ENTRY_U32("reg-shift", 2),
PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
{ },
};
static const struct software_node uart_node = {
.properties = uart_properties,
};
static const struct intel_lpss_platform_info spt_uart_info = {
.clk_rate = 120000000,
.clk_con_id = "baudclk",
.properties = uart_properties,
.swnode = &uart_node,
};
static const struct intel_lpss_platform_info bxt_info = {
.clk_rate = 100000000,
};
static struct property_entry bxt_i2c_properties[] = {
static const struct property_entry bxt_i2c_properties[] = {
PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
{ },
};
static const struct software_node bxt_i2c_node = {
.properties = bxt_i2c_properties,
};
static const struct intel_lpss_platform_info bxt_i2c_info = {
.clk_rate = 133000000,
.properties = bxt_i2c_properties,
.swnode = &bxt_i2c_node,
};
static struct property_entry apl_i2c_properties[] = {
static const struct property_entry apl_i2c_properties[] = {
PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 207),
PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
{ },
};
static const struct software_node apl_i2c_node = {
.properties = apl_i2c_properties,
};
static const struct intel_lpss_platform_info apl_i2c_info = {
.clk_rate = 133000000,
.properties = apl_i2c_properties,
.swnode = &apl_i2c_node,
};
static const struct acpi_device_id intel_lpss_acpi_ids[] = {
......
......@@ -65,27 +65,35 @@ static const struct intel_lpss_platform_info spt_info = {
.clk_rate = 120000000,
};
static struct property_entry spt_i2c_properties[] = {
static const struct property_entry spt_i2c_properties[] = {
PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230),
{ },
};
static const struct software_node spt_i2c_node = {
.properties = spt_i2c_properties,
};
static const struct intel_lpss_platform_info spt_i2c_info = {
.clk_rate = 120000000,
.properties = spt_i2c_properties,
.swnode = &spt_i2c_node,
};
static struct property_entry uart_properties[] = {
static const struct property_entry uart_properties[] = {
PROPERTY_ENTRY_U32("reg-io-width", 4),
PROPERTY_ENTRY_U32("reg-shift", 2),
PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
{ },
};
static const struct software_node uart_node = {
.properties = uart_properties,
};
static const struct intel_lpss_platform_info spt_uart_info = {
.clk_rate = 120000000,
.clk_con_id = "baudclk",
.properties = uart_properties,
.swnode = &uart_node,
};
static const struct intel_lpss_platform_info bxt_info = {
......@@ -95,53 +103,65 @@ static const struct intel_lpss_platform_info bxt_info = {
static const struct intel_lpss_platform_info bxt_uart_info = {
.clk_rate = 100000000,
.clk_con_id = "baudclk",
.properties = uart_properties,
.swnode = &uart_node,
};
static struct property_entry bxt_i2c_properties[] = {
static const struct property_entry bxt_i2c_properties[] = {
PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42),
PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
{ },
};
static const struct software_node bxt_i2c_node = {
.properties = bxt_i2c_properties,
};
static const struct intel_lpss_platform_info bxt_i2c_info = {
.clk_rate = 133000000,
.properties = bxt_i2c_properties,
.swnode = &bxt_i2c_node,
};
static struct property_entry apl_i2c_properties[] = {
static const struct property_entry apl_i2c_properties[] = {
PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 207),
PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208),
{ },
};
static const struct software_node apl_i2c_node = {
.properties = apl_i2c_properties,
};
static const struct intel_lpss_platform_info apl_i2c_info = {
.clk_rate = 133000000,
.properties = apl_i2c_properties,
.swnode = &apl_i2c_node,
};
static struct property_entry glk_i2c_properties[] = {
static const struct property_entry glk_i2c_properties[] = {
PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 313),
PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 290),
{ },
};
static const struct software_node glk_i2c_node = {
.properties = glk_i2c_properties,
};
static const struct intel_lpss_platform_info glk_i2c_info = {
.clk_rate = 133000000,
.properties = glk_i2c_properties,
.swnode = &glk_i2c_node,
};
static const struct intel_lpss_platform_info cnl_i2c_info = {
.clk_rate = 216000000,
.properties = spt_i2c_properties,
.swnode = &spt_i2c_node,
};
static const struct intel_lpss_platform_info ehl_i2c_info = {
.clk_rate = 100000000,
.properties = bxt_i2c_properties,
.swnode = &bxt_i2c_node,
};
static const struct pci_device_id intel_lpss_pci_ids[] = {
......
......@@ -399,7 +399,7 @@ int intel_lpss_probe(struct device *dev,
if (ret)
return ret;
lpss->cell->properties = info->properties;
lpss->cell->swnode = info->swnode;
intel_lpss_init_dev(lpss);
......
......@@ -15,14 +15,14 @@
struct device;
struct resource;
struct property_entry;
struct software_node;
struct intel_lpss_platform_info {
struct resource *mem;
int irq;
unsigned long clk_rate;
const char *clk_con_id;
struct property_entry *properties;
const struct software_node *swnode;
};
int intel_lpss_probe(struct device *dev,
......
......@@ -28,10 +28,23 @@ static struct mfd_cell m10bmc_pacn3000_subdevs[] = {
{ .name = "n3000bmc-secure" },
};
static const struct regmap_range m10bmc_regmap_range[] = {
regmap_reg_range(M10BMC_LEGACY_BUILD_VER, M10BMC_LEGACY_BUILD_VER),
regmap_reg_range(M10BMC_SYS_BASE, M10BMC_SYS_END),
regmap_reg_range(M10BMC_FLASH_BASE, M10BMC_FLASH_END),
};
static const struct regmap_access_table m10bmc_access_table = {
.yes_ranges = m10bmc_regmap_range,
.n_yes_ranges = ARRAY_SIZE(m10bmc_regmap_range),
};
static struct regmap_config intel_m10bmc_regmap_config = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
.wr_table = &m10bmc_access_table,
.rd_table = &m10bmc_access_table,
.max_register = M10BMC_MEM_END,
};
......@@ -121,17 +134,14 @@ static int check_m10bmc_version(struct intel_m10bmc *ddata)
int ret;
/*
* This check is to filter out the very old legacy BMC versions,
* M10BMC_LEGACY_SYS_BASE is the offset to this old block of mmio
* registers. In the old BMC chips, the BMC version info is stored
* in this old version register (M10BMC_LEGACY_SYS_BASE +
* M10BMC_BUILD_VER), so its read out value would have not been
* LEGACY_INVALID (0xffffffff). But in new BMC chips that the
* driver supports, the value of this register should be
* LEGACY_INVALID.
* This check is to filter out the very old legacy BMC versions. In the
* old BMC chips, the BMC version info is stored in the old version
* register (M10BMC_LEGACY_BUILD_VER), so its read out value would have
* not been M10BMC_VER_LEGACY_INVALID (0xffffffff). But in new BMC
* chips that the driver supports, the value of this register should be
* M10BMC_VER_LEGACY_INVALID.
*/
ret = m10bmc_raw_read(ddata,
M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER, &v);
ret = m10bmc_raw_read(ddata, M10BMC_LEGACY_BUILD_VER, &v);
if (ret)
return -ENODEV;
......
......@@ -16,8 +16,9 @@
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/dmi.h>
#include <linux/i2c.h>
#include <linux/platform_data/gpio-dwapb.h>
#include <linux/platform_data/i2c-designware.h>
#include <linux/property.h>
/* PCI BAR for register base address */
#define MFD_I2C_BAR 0
......@@ -45,29 +46,48 @@
#define INTEL_QUARK_I2C_CLK_HZ 33000000
struct intel_quark_mfd {
struct device *dev;
struct clk *i2c_clk;
struct clk_lookup *i2c_clk_lookup;
};
static const struct property_entry intel_quark_i2c_controller_standard_properties[] = {
PROPERTY_ENTRY_U32("clock-frequency", I2C_MAX_STANDARD_MODE_FREQ),
{ }
};
static const struct software_node intel_quark_i2c_controller_standard_node = {
.name = "intel-quark-i2c-controller",
.properties = intel_quark_i2c_controller_standard_properties,
};
static const struct property_entry intel_quark_i2c_controller_fast_properties[] = {
PROPERTY_ENTRY_U32("clock-frequency", I2C_MAX_FAST_MODE_FREQ),
{ }
};
static const struct software_node intel_quark_i2c_controller_fast_node = {
.name = "intel-quark-i2c-controller",
.properties = intel_quark_i2c_controller_fast_properties,
};
static const struct dmi_system_id dmi_platform_info[] = {
{
.matches = {
DMI_EXACT_MATCH(DMI_BOARD_NAME, "Galileo"),
},
.driver_data = (void *)100000,
.driver_data = (void *)&intel_quark_i2c_controller_standard_node,
},
{
.matches = {
DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
},
.driver_data = (void *)400000,
.driver_data = (void *)&intel_quark_i2c_controller_fast_node,
},
{
.matches = {
DMI_EXACT_MATCH(DMI_BOARD_NAME, "SIMATIC IOT2000"),
},
.driver_data = (void *)400000,
.driver_data = (void *)&intel_quark_i2c_controller_fast_node,
},
{}
};
......@@ -98,15 +118,7 @@ static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = {
};
static struct mfd_cell intel_quark_mfd_cells[] = {
{
.id = MFD_GPIO_BAR,
.name = "gpio-dwapb",
.acpi_match = &intel_quark_acpi_match_gpio,
.num_resources = ARRAY_SIZE(intel_quark_gpio_res),
.resources = intel_quark_gpio_res,
.ignore_resource_conflicts = true,
},
{
[MFD_I2C_BAR] = {
.id = MFD_I2C_BAR,
.name = "i2c_designware",
.acpi_match = &intel_quark_acpi_match_i2c,
......@@ -114,6 +126,14 @@ static struct mfd_cell intel_quark_mfd_cells[] = {
.resources = intel_quark_i2c_res,
.ignore_resource_conflicts = true,
},
[MFD_GPIO_BAR] = {
.id = MFD_GPIO_BAR,
.name = "gpio-dwapb",
.acpi_match = &intel_quark_acpi_match_gpio,
.num_resources = ARRAY_SIZE(intel_quark_gpio_res),
.resources = intel_quark_gpio_res,
.ignore_resource_conflicts = true,
},
};
static const struct pci_device_id intel_quark_mfd_ids[] = {
......@@ -157,48 +177,37 @@ static void intel_quark_unregister_i2c_clk(struct device *dev)
clk_unregister(quark_mfd->i2c_clk);
}
static int intel_quark_i2c_setup(struct pci_dev *pdev, struct mfd_cell *cell)
static int intel_quark_i2c_setup(struct pci_dev *pdev)
{
struct mfd_cell *cell = &intel_quark_mfd_cells[MFD_I2C_BAR];
struct resource *res = intel_quark_i2c_res;
const struct dmi_system_id *dmi_id;
struct dw_i2c_platform_data *pdata;
struct resource *res = (struct resource *)cell->resources;
struct device *dev = &pdev->dev;
res[INTEL_QUARK_IORES_MEM].start =
pci_resource_start(pdev, MFD_I2C_BAR);
res[INTEL_QUARK_IORES_MEM].end =
pci_resource_end(pdev, MFD_I2C_BAR);
res[INTEL_QUARK_IORES_MEM].start = pci_resource_start(pdev, MFD_I2C_BAR);
res[INTEL_QUARK_IORES_MEM].end = pci_resource_end(pdev, MFD_I2C_BAR);
res[INTEL_QUARK_IORES_IRQ].start = pdev->irq;
res[INTEL_QUARK_IORES_IRQ].end = pdev->irq;
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return -ENOMEM;
res[INTEL_QUARK_IORES_IRQ].start = pci_irq_vector(pdev, 0);
res[INTEL_QUARK_IORES_IRQ].end = pci_irq_vector(pdev, 0);
/* Normal mode by default */
pdata->i2c_scl_freq = 100000;
cell->swnode = &intel_quark_i2c_controller_standard_node;
dmi_id = dmi_first_match(dmi_platform_info);
if (dmi_id)
pdata->i2c_scl_freq = (uintptr_t)dmi_id->driver_data;
cell->platform_data = pdata;
cell->pdata_size = sizeof(*pdata);
cell->swnode = (struct software_node *)dmi_id->driver_data;
return 0;
}
static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell)
static int intel_quark_gpio_setup(struct pci_dev *pdev)
{
struct mfd_cell *cell = &intel_quark_mfd_cells[MFD_GPIO_BAR];
struct resource *res = intel_quark_gpio_res;
struct dwapb_platform_data *pdata;
struct resource *res = (struct resource *)cell->resources;
struct device *dev = &pdev->dev;
res[INTEL_QUARK_IORES_MEM].start =
pci_resource_start(pdev, MFD_GPIO_BAR);
res[INTEL_QUARK_IORES_MEM].end =
pci_resource_end(pdev, MFD_GPIO_BAR);
res[INTEL_QUARK_IORES_MEM].start = pci_resource_start(pdev, MFD_GPIO_BAR);
res[INTEL_QUARK_IORES_MEM].end = pci_resource_end(pdev, MFD_GPIO_BAR);
pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
......@@ -217,7 +226,7 @@ static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell)
pdata->properties->idx = 0;
pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO;
pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE;
pdata->properties->irq[0] = pdev->irq;
pdata->properties->irq[0] = pci_irq_vector(pdev, 0);
pdata->properties->irq_shared = true;
cell->platform_data = pdata;
......@@ -240,29 +249,37 @@ static int intel_quark_mfd_probe(struct pci_dev *pdev,
if (!quark_mfd)
return -ENOMEM;
quark_mfd->dev = &pdev->dev;
dev_set_drvdata(&pdev->dev, quark_mfd);
ret = intel_quark_register_i2c_clk(&pdev->dev);
if (ret)
return ret;
ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[1]);
if (ret)
pci_set_master(pdev);
/* This driver only requires 1 IRQ vector */
ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
if (ret < 0)
goto err_unregister_i2c_clk;
ret = intel_quark_gpio_setup(pdev, &intel_quark_mfd_cells[0]);
ret = intel_quark_i2c_setup(pdev);
if (ret)
goto err_unregister_i2c_clk;
goto err_free_irq_vectors;
ret = intel_quark_gpio_setup(pdev);
if (ret)
goto err_free_irq_vectors;
ret = mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells,
ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
NULL);
if (ret)
goto err_unregister_i2c_clk;
goto err_free_irq_vectors;
return 0;
err_free_irq_vectors:
pci_free_irq_vectors(pdev);
err_unregister_i2c_clk:
intel_quark_unregister_i2c_clk(&pdev->dev);
return ret;
......@@ -270,8 +287,9 @@ static int intel_quark_mfd_probe(struct pci_dev *pdev,
static void intel_quark_mfd_remove(struct pci_dev *pdev)
{
intel_quark_unregister_i2c_clk(&pdev->dev);
mfd_remove_devices(&pdev->dev);
pci_free_irq_vectors(pdev);
intel_quark_unregister_i2c_clk(&pdev->dev);
}
static struct pci_driver intel_quark_mfd_driver = {
......
......@@ -358,7 +358,7 @@ static struct attribute *lm3533_attributes[] = {
static umode_t lm3533_attr_is_visible(struct kobject *kobj,
struct attribute *attr, int n)
{
struct device *dev = container_of(kobj, struct device, kobj);
struct device *dev = kobj_to_dev(kobj);
struct lm3533 *lm3533 = dev_get_drvdata(dev);
struct device_attribute *dattr = to_dev_attr(attr);
struct lm3533_device_attribute *lattr = to_lm3533_dev_attr(dattr);
......
......@@ -26,9 +26,6 @@
#define GPIO_IO_SIZE 64
#define GPIO_IO_SIZE_CENTERTON 128
/* Intel Quark X1000 GPIO IRQ Number */
#define GPIO_IRQ_QUARK_X1000 9
#define WDTBASE 0x84
#define WDT_IO_SIZE 64
......@@ -43,30 +40,25 @@ struct lpc_sch_info {
unsigned int io_size_smbus;
unsigned int io_size_gpio;
unsigned int io_size_wdt;
int irq_gpio;
};
static struct lpc_sch_info sch_chipset_info[] = {
[LPC_SCH] = {
.io_size_smbus = SMBUS_IO_SIZE,
.io_size_gpio = GPIO_IO_SIZE,
.irq_gpio = -1,
},
[LPC_ITC] = {
.io_size_smbus = SMBUS_IO_SIZE,
.io_size_gpio = GPIO_IO_SIZE,
.io_size_wdt = WDT_IO_SIZE,
.irq_gpio = -1,
},
[LPC_CENTERTON] = {
.io_size_smbus = SMBUS_IO_SIZE,
.io_size_gpio = GPIO_IO_SIZE_CENTERTON,
.io_size_wdt = WDT_IO_SIZE,
.irq_gpio = -1,
},
[LPC_QUARK_X1000] = {
.io_size_gpio = GPIO_IO_SIZE,
.irq_gpio = GPIO_IRQ_QUARK_X1000,
.io_size_wdt = WDT_IO_SIZE,
},
};
......@@ -113,13 +105,13 @@ static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name,
}
static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
const char *name, int size, int irq,
int id, struct mfd_cell *cell)
const char *name, int size, int id,
struct mfd_cell *cell)
{
struct resource *res;
int ret;
res = devm_kcalloc(&pdev->dev, 2, sizeof(*res), GFP_KERNEL);
res = devm_kzalloc(&pdev->dev, sizeof(*res), GFP_KERNEL);
if (!res)
return -ENOMEM;
......@@ -135,18 +127,6 @@ static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
cell->ignore_resource_conflicts = true;
cell->id = id;
/* Check if we need to add an IRQ resource */
if (irq < 0)
return 0;
res++;
res->start = irq;
res->end = irq;
res->flags = IORESOURCE_IRQ;
cell->num_resources++;
return 0;
}
......@@ -158,7 +138,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
int ret;
ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
info->io_size_smbus, -1,
info->io_size_smbus,
id->device, &lpc_sch_cells[cells]);
if (ret < 0)
return ret;
......@@ -166,7 +146,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
cells++;
ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
info->io_size_gpio, info->irq_gpio,
info->io_size_gpio,
id->device, &lpc_sch_cells[cells]);
if (ret < 0)
return ret;
......@@ -174,7 +154,7 @@ static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
cells++;
ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
info->io_size_wdt, -1,
info->io_size_wdt,
id->device, &lpc_sch_cells[cells]);
if (ret < 0)
return ret;
......
......@@ -29,9 +29,9 @@
static const struct mfd_cell max8997_devs[] = {
{ .name = "max8997-pmic", },
{ .name = "max8997-rtc", },
{ .name = "max8997-battery", .of_compatible = "maxim,max8997-battery", },
{ .name = "max8997-battery", },
{ .name = "max8997-haptic", },
{ .name = "max8997-muic", .of_compatible = "maxim,max8997-muic", },
{ .name = "max8997-muic", },
{ .name = "max8997-led", .id = 1 },
{ .name = "max8997-led", .id = 2 },
};
......
......@@ -65,7 +65,7 @@ static void mfd_acpi_add_device(const struct mfd_cell *cell,
{
const struct mfd_cell_acpi_match *match = cell->acpi_match;
struct acpi_device *parent, *child;
struct acpi_device *adev;
struct acpi_device *adev = NULL;
parent = ACPI_COMPANION(pdev->dev.parent);
if (!parent)
......@@ -77,10 +77,9 @@ static void mfd_acpi_add_device(const struct mfd_cell *cell,
* _ADR or it will use the parent handle if is no ID is given.
*
* Note that use of _ADR is a grey area in the ACPI specification,
* though Intel Galileo Gen2 is using it to distinguish the children
* devices.
* though at least Intel Galileo Gen 2 is using it to distinguish
* the children devices.
*/
adev = parent;
if (match) {
if (match->pnpid) {
struct acpi_device_id ids[2] = {};
......@@ -93,22 +92,11 @@ static void mfd_acpi_add_device(const struct mfd_cell *cell,
}
}
} else {
unsigned long long adr;
acpi_status status;
list_for_each_entry(child, &parent->children, node) {
status = acpi_evaluate_integer(child->handle,
"_ADR", NULL,
&adr);
if (ACPI_SUCCESS(status) && match->adr == adr) {
adev = child;
break;
}
}
adev = acpi_find_child_device(parent, match->adr, false);
}
}
ACPI_COMPANION_SET(&pdev->dev, adev);
ACPI_COMPANION_SET(&pdev->dev, adev ?: parent);
}
#else
static inline void mfd_acpi_add_device(const struct mfd_cell *cell,
......@@ -238,8 +226,8 @@ static int mfd_add_device(struct device *parent, int id,
goto fail_of_entry;
}
if (cell->properties) {
ret = platform_device_add_properties(pdev, cell->properties);
if (cell->swnode) {
ret = device_add_software_node(&pdev->dev, cell->swnode);
if (ret)
goto fail_of_entry;
}
......@@ -304,6 +292,7 @@ static int mfd_add_device(struct device *parent, int id,
list_del(&of_entry->list);
kfree(of_entry);
}
device_remove_software_node(&pdev->dev);
fail_alias:
regulator_bulk_unregister_supply_alias(&pdev->dev,
cell->parent_supplies,
......@@ -372,6 +361,8 @@ static int mfd_remove_devices_fn(struct device *dev, void *data)
regulator_bulk_unregister_supply_alias(dev, cell->parent_supplies,
cell->num_parent_supplies);
device_remove_software_node(&pdev->dev);
platform_device_unregister(pdev);
return 0;
}
......
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* The Netronix embedded controller is a microcontroller found in some
* e-book readers designed by the original design manufacturer Netronix, Inc.
* It contains RTC, battery monitoring, system power management, and PWM
* functionality.
*
* This driver implements register access, version detection, and system
* power-off/reset.
*
* Copyright 2020 Jonathan Neuschäfer <j.neuschaefer@gmx.net>
*/
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/i2c.h>
#include <linux/mfd/core.h>
#include <linux/mfd/ntxec.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/reboot.h>
#include <linux/regmap.h>
#include <linux/types.h>
#include <asm/unaligned.h>
#define NTXEC_REG_VERSION 0x00
#define NTXEC_REG_POWEROFF 0x50
#define NTXEC_REG_POWERKEEP 0x70
#define NTXEC_REG_RESET 0x90
#define NTXEC_POWEROFF_VALUE 0x0100
#define NTXEC_POWERKEEP_VALUE 0x0800
#define NTXEC_RESET_VALUE 0xff00
static struct i2c_client *poweroff_restart_client;
static void ntxec_poweroff(void)
{
int res;
u8 buf[3] = { NTXEC_REG_POWEROFF };
struct i2c_msg msgs[] = {
{
.addr = poweroff_restart_client->addr,
.flags = 0,
.len = sizeof(buf),
.buf = buf,
},
};
put_unaligned_be16(NTXEC_POWEROFF_VALUE, buf + 1);
res = i2c_transfer(poweroff_restart_client->adapter, msgs, ARRAY_SIZE(msgs));
if (res < 0)
dev_warn(&poweroff_restart_client->dev,
"Failed to power off (err = %d)\n", res);
/*
* The time from the register write until the host CPU is powered off
* has been observed to be about 2.5 to 3 seconds. Sleep long enough to
* safely avoid returning from the poweroff handler.
*/
msleep(5000);
}
static int ntxec_restart(struct notifier_block *nb,
unsigned long action, void *data)
{
int res;
u8 buf[3] = { NTXEC_REG_RESET };
/*
* NOTE: The lower half of the reset value is not sent, because sending
* it causes an I2C error. (The reset handler in the downstream driver
* does send the full two-byte value, but doesn't check the result).
*/
struct i2c_msg msgs[] = {
{
.addr = poweroff_restart_client->addr,
.flags = 0,
.len = sizeof(buf) - 1,
.buf = buf,
},
};
put_unaligned_be16(NTXEC_RESET_VALUE, buf + 1);
res = i2c_transfer(poweroff_restart_client->adapter, msgs, ARRAY_SIZE(msgs));
if (res < 0)
dev_warn(&poweroff_restart_client->dev,
"Failed to restart (err = %d)\n", res);
return NOTIFY_DONE;
}
static struct notifier_block ntxec_restart_handler = {
.notifier_call = ntxec_restart,
.priority = 128,
};
static int regmap_ignore_write(void *context,
unsigned int reg, unsigned int val)
{
struct regmap *regmap = context;
regmap_write(regmap, reg, val);
return 0;
}
static int regmap_wrap_read(void *context, unsigned int reg,
unsigned int *val)
{
struct regmap *regmap = context;
return regmap_read(regmap, reg, val);
}
/*
* Some firmware versions do not ack written data, add a wrapper. It
* is used to stack another regmap on top.
*/
static const struct regmap_config regmap_config_noack = {
.name = "ntxec_noack",
.reg_bits = 8,
.val_bits = 16,
.cache_type = REGCACHE_NONE,
.reg_write = regmap_ignore_write,
.reg_read = regmap_wrap_read
};
static const struct regmap_config regmap_config = {
.name = "ntxec",
.reg_bits = 8,
.val_bits = 16,
.cache_type = REGCACHE_NONE,
.val_format_endian = REGMAP_ENDIAN_BIG,
};
static const struct mfd_cell ntxec_subdev[] = {
{ .name = "ntxec-rtc" },
{ .name = "ntxec-pwm" },
};
static const struct mfd_cell ntxec_subdev_pwm[] = {
{ .name = "ntxec-pwm" },
};
static int ntxec_probe(struct i2c_client *client)
{
struct ntxec *ec;
unsigned int version;
int res;
const struct mfd_cell *subdevs;
size_t n_subdevs;
ec = devm_kmalloc(&client->dev, sizeof(*ec), GFP_KERNEL);
if (!ec)
return -ENOMEM;
ec->dev = &client->dev;
ec->regmap = devm_regmap_init_i2c(client, &regmap_config);
if (IS_ERR(ec->regmap)) {
dev_err(ec->dev, "Failed to set up regmap for device\n");
return PTR_ERR(ec->regmap);
}
/* Determine the firmware version */
res = regmap_read(ec->regmap, NTXEC_REG_VERSION, &version);
if (res < 0) {
dev_err(ec->dev, "Failed to read firmware version number\n");
return res;
}
/* Bail out if we encounter an unknown firmware version */
switch (version) {
case NTXEC_VERSION_KOBO_AURA:
subdevs = ntxec_subdev;
n_subdevs = ARRAY_SIZE(ntxec_subdev);
break;
case NTXEC_VERSION_TOLINO_SHINE2:
subdevs = ntxec_subdev_pwm;
n_subdevs = ARRAY_SIZE(ntxec_subdev_pwm);
/* Another regmap stacked on top of the other */
ec->regmap = devm_regmap_init(ec->dev, NULL,
ec->regmap,
&regmap_config_noack);
if (IS_ERR(ec->regmap))
return PTR_ERR(ec->regmap);
break;
default:
dev_err(ec->dev,
"Netronix embedded controller version %04x is not supported.\n",
version);
return -ENODEV;
}
dev_info(ec->dev,
"Netronix embedded controller version %04x detected.\n", version);
if (of_device_is_system_power_controller(ec->dev->of_node)) {
/*
* Set the 'powerkeep' bit. This is necessary on some boards
* in order to keep the system running.
*/
res = regmap_write(ec->regmap, NTXEC_REG_POWERKEEP,
NTXEC_POWERKEEP_VALUE);
if (res < 0)
return res;
if (poweroff_restart_client)
/*
* Another instance of the driver already took
* poweroff/restart duties.
*/
dev_err(ec->dev, "poweroff_restart_client already assigned\n");
else
poweroff_restart_client = client;
if (pm_power_off)
/* Another driver already registered a poweroff handler. */
dev_err(ec->dev, "pm_power_off already assigned\n");
else
pm_power_off = ntxec_poweroff;
res = register_restart_handler(&ntxec_restart_handler);
if (res)
dev_err(ec->dev,
"Failed to register restart handler: %d\n", res);
}
i2c_set_clientdata(client, ec);
res = devm_mfd_add_devices(ec->dev, PLATFORM_DEVID_NONE,
subdevs, n_subdevs, NULL, 0, NULL);
if (res)
dev_err(ec->dev, "Failed to add subdevices: %d\n", res);
return res;
}
static int ntxec_remove(struct i2c_client *client)
{
if (client == poweroff_restart_client) {
poweroff_restart_client = NULL;
pm_power_off = NULL;
unregister_restart_handler(&ntxec_restart_handler);
}
return 0;
}
static const struct of_device_id of_ntxec_match_table[] = {
{ .compatible = "netronix,ntxec", },
{}
};
MODULE_DEVICE_TABLE(of, of_ntxec_match_table);
static struct i2c_driver ntxec_driver = {
.driver = {
.name = "ntxec",
.of_match_table = of_ntxec_match_table,
},
.probe_new = ntxec_probe,
.remove = ntxec_remove,
};
module_i2c_driver(ntxec_driver);
MODULE_AUTHOR("Jonathan Neuschäfer <j.neuschaefer@gmx.net>");
MODULE_DESCRIPTION("Core driver for Netronix EC");
MODULE_LICENSE("GPL");
......@@ -45,8 +45,11 @@ static bool rn5t618_volatile_reg(struct device *dev, unsigned int reg)
case RN5T618_INTMON:
case RN5T618_RTC_CTRL1 ... RN5T618_RTC_CTRL2:
case RN5T618_RTC_SECONDS ... RN5T618_RTC_YEAR:
case RN5T618_CHGCTL1:
case RN5T618_REGISET1 ... RN5T618_REGISET2:
case RN5T618_CHGSTATE:
case RN5T618_CHGCTRL_IRR ... RN5T618_CHGERR_MONI:
case RN5T618_GCHGDET:
case RN5T618_CONTROL ... RN5T618_CC_AVEREG0:
return true;
default:
......
This diff is collapsed.
......@@ -91,9 +91,9 @@ static const struct regmap_config bd718xx_regmap_config = {
.cache_type = REGCACHE_RBTREE,
};
static int bd718xx_init_press_duration(struct bd718xx *bd718xx)
static int bd718xx_init_press_duration(struct regmap *regmap,
struct device *dev)
{
struct device* dev = bd718xx->chip.dev;
u32 short_press_ms, long_press_ms;
u32 short_press_value, long_press_value;
int ret;
......@@ -102,8 +102,7 @@ static int bd718xx_init_press_duration(struct bd718xx *bd718xx)
&short_press_ms);
if (!ret) {
short_press_value = min(15u, (short_press_ms + 250) / 500);
ret = regmap_update_bits(bd718xx->chip.regmap,
BD718XX_REG_PWRONCONFIG0,
ret = regmap_update_bits(regmap, BD718XX_REG_PWRONCONFIG0,
BD718XX_PWRBTN_PRESS_DURATION_MASK,
short_press_value);
if (ret) {
......@@ -116,8 +115,7 @@ static int bd718xx_init_press_duration(struct bd718xx *bd718xx)
&long_press_ms);
if (!ret) {
long_press_value = min(15u, (long_press_ms + 500) / 1000);
ret = regmap_update_bits(bd718xx->chip.regmap,
BD718XX_REG_PWRONCONFIG1,
ret = regmap_update_bits(regmap, BD718XX_REG_PWRONCONFIG1,
BD718XX_PWRBTN_PRESS_DURATION_MASK,
long_press_value);
if (ret) {
......@@ -132,7 +130,8 @@ static int bd718xx_init_press_duration(struct bd718xx *bd718xx)
static int bd718xx_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
struct bd718xx *bd718xx;
struct regmap *regmap;
struct regmap_irq_chip_data *irq_data;
int ret;
unsigned int chip_type;
struct mfd_cell *mfd;
......@@ -142,13 +141,6 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c,
dev_err(&i2c->dev, "No IRQ configured\n");
return -EINVAL;
}
bd718xx = devm_kzalloc(&i2c->dev, sizeof(struct bd718xx), GFP_KERNEL);
if (!bd718xx)
return -ENOMEM;
bd718xx->chip_irq = i2c->irq;
chip_type = (unsigned int)(uintptr_t)
of_device_get_match_data(&i2c->dev);
switch (chip_type) {
......@@ -164,29 +156,26 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c,
dev_err(&i2c->dev, "Unknown device type");
return -EINVAL;
}
bd718xx->chip.dev = &i2c->dev;
dev_set_drvdata(&i2c->dev, bd718xx);
bd718xx->chip.regmap = devm_regmap_init_i2c(i2c,
&bd718xx_regmap_config);
if (IS_ERR(bd718xx->chip.regmap)) {
regmap = devm_regmap_init_i2c(i2c, &bd718xx_regmap_config);
if (IS_ERR(regmap)) {
dev_err(&i2c->dev, "regmap initialization failed\n");
return PTR_ERR(bd718xx->chip.regmap);
return PTR_ERR(regmap);
}
ret = devm_regmap_add_irq_chip(&i2c->dev, bd718xx->chip.regmap,
bd718xx->chip_irq, IRQF_ONESHOT, 0,
&bd718xx_irq_chip, &bd718xx->irq_data);
ret = devm_regmap_add_irq_chip(&i2c->dev, regmap, i2c->irq,
IRQF_ONESHOT, 0, &bd718xx_irq_chip,
&irq_data);
if (ret) {
dev_err(&i2c->dev, "Failed to add irq_chip\n");
return ret;
}
ret = bd718xx_init_press_duration(bd718xx);
ret = bd718xx_init_press_duration(regmap, &i2c->dev);
if (ret)
return ret;
ret = regmap_irq_get_virq(bd718xx->irq_data, BD718XX_INT_PWRBTN_S);
ret = regmap_irq_get_virq(irq_data, BD718XX_INT_PWRBTN_S);
if (ret < 0) {
dev_err(&i2c->dev, "Failed to get the IRQ\n");
......@@ -195,9 +184,9 @@ static int bd718xx_i2c_probe(struct i2c_client *i2c,
button.irq = ret;
ret = devm_mfd_add_devices(bd718xx->chip.dev, PLATFORM_DEVID_AUTO,
ret = devm_mfd_add_devices(&i2c->dev, PLATFORM_DEVID_AUTO,
mfd, cells, NULL, 0,
regmap_irq_get_domain(bd718xx->irq_data));
regmap_irq_get_domain(irq_data));
if (ret)
dev_err(&i2c->dev, "Failed to create subdevices\n");
......
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2021 ROHM Semiconductors
*
* ROHM BD9576MUF and BD9573MUF PMIC driver
*/
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/irq.h>
#include <linux/mfd/core.h>
#include <linux/mfd/rohm-bd957x.h>
#include <linux/mfd/rohm-generic.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
#include <linux/types.h>
enum {
BD957X_REGULATOR_CELL,
BD957X_WDT_CELL,
};
/*
* Due to the BD9576MUF nasty IRQ behaiour we don't always populate IRQs.
* These will be added to regulator resources only if IRQ information for the
* PMIC is populated in device-tree.
*/
static const struct resource bd9576_regulator_irqs[] = {
DEFINE_RES_IRQ_NAMED(BD9576_INT_THERM, "bd9576-temp"),
DEFINE_RES_IRQ_NAMED(BD9576_INT_OVD, "bd9576-ovd"),
DEFINE_RES_IRQ_NAMED(BD9576_INT_UVD, "bd9576-uvd"),
};
static struct mfd_cell bd9573_mfd_cells[] = {
[BD957X_REGULATOR_CELL] = { .name = "bd9573-regulator", },
[BD957X_WDT_CELL] = { .name = "bd9576-wdt", },
};
static struct mfd_cell bd9576_mfd_cells[] = {
[BD957X_REGULATOR_CELL] = { .name = "bd9576-regulator", },
[BD957X_WDT_CELL] = { .name = "bd9576-wdt", },
};
static const struct regmap_range volatile_ranges[] = {
regmap_reg_range(BD957X_REG_SMRB_ASSERT, BD957X_REG_SMRB_ASSERT),
regmap_reg_range(BD957X_REG_PMIC_INTERNAL_STAT,
BD957X_REG_PMIC_INTERNAL_STAT),
regmap_reg_range(BD957X_REG_INT_THERM_STAT, BD957X_REG_INT_THERM_STAT),
regmap_reg_range(BD957X_REG_INT_OVP_STAT, BD957X_REG_INT_SYS_STAT),
regmap_reg_range(BD957X_REG_INT_MAIN_STAT, BD957X_REG_INT_MAIN_STAT),
};
static const struct regmap_access_table volatile_regs = {
.yes_ranges = &volatile_ranges[0],
.n_yes_ranges = ARRAY_SIZE(volatile_ranges),
};
static struct regmap_config bd957x_regmap = {
.reg_bits = 8,
.val_bits = 8,
.volatile_table = &volatile_regs,
.max_register = BD957X_MAX_REGISTER,
.cache_type = REGCACHE_RBTREE,
};
static struct regmap_irq bd9576_irqs[] = {
REGMAP_IRQ_REG(BD9576_INT_THERM, 0, BD957X_MASK_INT_MAIN_THERM),
REGMAP_IRQ_REG(BD9576_INT_OVP, 0, BD957X_MASK_INT_MAIN_OVP),
REGMAP_IRQ_REG(BD9576_INT_SCP, 0, BD957X_MASK_INT_MAIN_SCP),
REGMAP_IRQ_REG(BD9576_INT_OCP, 0, BD957X_MASK_INT_MAIN_OCP),
REGMAP_IRQ_REG(BD9576_INT_OVD, 0, BD957X_MASK_INT_MAIN_OVD),
REGMAP_IRQ_REG(BD9576_INT_UVD, 0, BD957X_MASK_INT_MAIN_UVD),
REGMAP_IRQ_REG(BD9576_INT_UVP, 0, BD957X_MASK_INT_MAIN_UVP),
REGMAP_IRQ_REG(BD9576_INT_SYS, 0, BD957X_MASK_INT_MAIN_SYS),
};
static struct regmap_irq_chip bd9576_irq_chip = {
.name = "bd9576_irq",
.irqs = &bd9576_irqs[0],
.num_irqs = ARRAY_SIZE(bd9576_irqs),
.status_base = BD957X_REG_INT_MAIN_STAT,
.mask_base = BD957X_REG_INT_MAIN_MASK,
.ack_base = BD957X_REG_INT_MAIN_STAT,
.init_ack_masked = true,
.num_regs = 1,
.irq_reg_stride = 1,
};
static int bd957x_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
int ret;
struct regmap *regmap;
struct mfd_cell *cells;
int num_cells;
unsigned long chip_type;
struct irq_domain *domain;
bool usable_irqs;
chip_type = (unsigned long)of_device_get_match_data(&i2c->dev);
switch (chip_type) {
case ROHM_CHIP_TYPE_BD9576:
cells = bd9576_mfd_cells;
num_cells = ARRAY_SIZE(bd9576_mfd_cells);
usable_irqs = !!i2c->irq;
break;
case ROHM_CHIP_TYPE_BD9573:
cells = bd9573_mfd_cells;
num_cells = ARRAY_SIZE(bd9573_mfd_cells);
/*
* BD9573 only supports fatal IRQs which we can not handle
* because SoC is going to lose the power.
*/
usable_irqs = false;
break;
default:
dev_err(&i2c->dev, "Unknown device type");
return -EINVAL;
}
regmap = devm_regmap_init_i2c(i2c, &bd957x_regmap);
if (IS_ERR(regmap)) {
dev_err(&i2c->dev, "Failed to initialize Regmap\n");
return PTR_ERR(regmap);
}
/*
* BD9576 behaves badly. It kepts IRQ line asserted for the whole
* duration of detected HW condition (like over temperature). So we
* don't require IRQ to be populated.
* If IRQ information is not given, then we mask all IRQs and do not
* provide IRQ resources to regulator driver - which then just omits
* the notifiers.
*/
if (usable_irqs) {
struct regmap_irq_chip_data *irq_data;
struct mfd_cell *regulators;
regulators = &bd9576_mfd_cells[BD957X_REGULATOR_CELL];
regulators->resources = bd9576_regulator_irqs;
regulators->num_resources = ARRAY_SIZE(bd9576_regulator_irqs);
ret = devm_regmap_add_irq_chip(&i2c->dev, regmap, i2c->irq,
IRQF_ONESHOT, 0,
&bd9576_irq_chip, &irq_data);
if (ret) {
dev_err(&i2c->dev, "Failed to add IRQ chip\n");
return ret;
}
domain = regmap_irq_get_domain(irq_data);
} else {
ret = regmap_update_bits(regmap, BD957X_REG_INT_MAIN_MASK,
BD957X_MASK_INT_ALL,
BD957X_MASK_INT_ALL);
if (ret)
return ret;
domain = NULL;
}
ret = devm_mfd_add_devices(&i2c->dev, PLATFORM_DEVID_AUTO, cells,
num_cells, NULL, 0, domain);
if (ret)
dev_err(&i2c->dev, "Failed to create subdevices\n");
return ret;
}
static const struct of_device_id bd957x_of_match[] = {
{ .compatible = "rohm,bd9576", .data = (void *)ROHM_CHIP_TYPE_BD9576, },
{ .compatible = "rohm,bd9573", .data = (void *)ROHM_CHIP_TYPE_BD9573, },
{ },
};
MODULE_DEVICE_TABLE(of, bd957x_of_match);
static struct i2c_driver bd957x_drv = {
.driver = {
.name = "rohm-bd957x",
.of_match_table = bd957x_of_match,
},
.probe = &bd957x_i2c_probe,
};
module_i2c_driver(bd957x_drv);
MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
MODULE_DESCRIPTION("ROHM BD9576MUF and BD9573MUF Power Management IC driver");
MODULE_LICENSE("GPL");
......@@ -549,19 +549,7 @@ static struct i2c_driver sec_pmic_driver = {
.shutdown = sec_pmic_shutdown,
.id_table = sec_pmic_id,
};
static int __init sec_pmic_init(void)
{
return i2c_add_driver(&sec_pmic_driver);
}
subsys_initcall(sec_pmic_init);
static void __exit sec_pmic_exit(void)
{
i2c_del_driver(&sec_pmic_driver);
}
module_exit(sec_pmic_exit);
module_i2c_driver(sec_pmic_driver);
MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
MODULE_DESCRIPTION("Core support for the S5M MFD");
......
......@@ -158,13 +158,18 @@ static const struct regmap_config stm32_timers_regmap_cfg = {
static void stm32_timers_get_arr_size(struct stm32_timers *ddata)
{
u32 arr;
/* Backup ARR to restore it after getting the maximum value */
regmap_read(ddata->regmap, TIM_ARR, &arr);
/*
* Only the available bits will be written so when readback
* we get the maximum value of auto reload register
*/
regmap_write(ddata->regmap, TIM_ARR, ~0L);
regmap_read(ddata->regmap, TIM_ARR, &ddata->max_arr);
regmap_write(ddata->regmap, TIM_ARR, 0x0);
regmap_write(ddata->regmap, TIM_ARR, arr);
}
static int stm32_timers_dma_probe(struct device *dev,
......
......@@ -312,7 +312,7 @@ EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
* GPIO (all variants)
*/
static const struct resource stmpe_gpio_resources[] = {
static struct resource stmpe_gpio_resources[] = {
/* Start and end filled dynamically */
{
.flags = IORESOURCE_IRQ,
......@@ -336,7 +336,8 @@ static const struct mfd_cell stmpe_gpio_cell_noirq = {
* Keypad (1601, 2401, 2403)
*/
static const struct resource stmpe_keypad_resources[] = {
static struct resource stmpe_keypad_resources[] = {
/* Start and end filled dynamically */
{
.name = "KEYPAD",
.flags = IORESOURCE_IRQ,
......@@ -357,7 +358,8 @@ static const struct mfd_cell stmpe_keypad_cell = {
/*
* PWM (1601, 2401, 2403)
*/
static const struct resource stmpe_pwm_resources[] = {
static struct resource stmpe_pwm_resources[] = {
/* Start and end filled dynamically */
{
.name = "PWM0",
.flags = IORESOURCE_IRQ,
......@@ -445,7 +447,8 @@ static struct stmpe_variant_info stmpe801_noirq = {
* Touchscreen (STMPE811 or STMPE610)
*/
static const struct resource stmpe_ts_resources[] = {
static struct resource stmpe_ts_resources[] = {
/* Start and end filled dynamically */
{
.name = "TOUCH_DET",
.flags = IORESOURCE_IRQ,
......@@ -467,7 +470,8 @@ static const struct mfd_cell stmpe_ts_cell = {
* ADC (STMPE811)
*/
static const struct resource stmpe_adc_resources[] = {
static struct resource stmpe_adc_resources[] = {
/* Start and end filled dynamically */
{
.name = "STMPE_TEMP_SENS",
.flags = IORESOURCE_IRQ,
......
......@@ -393,6 +393,14 @@ config PWM_MXS
To compile this driver as a module, choose M here: the module
will be called pwm-mxs.
config PWM_NTXEC
tristate "Netronix embedded controller PWM support"
depends on MFD_NTXEC
help
Say yes here if you want to support the PWM output of the embedded
controller found in certain e-book readers designed by the original
design manufacturer Netronix.
config PWM_OMAP_DMTIMER
tristate "OMAP Dual-Mode Timer PWM support"
depends on OF
......
......@@ -35,6 +35,7 @@ obj-$(CONFIG_PWM_MESON) += pwm-meson.o
obj-$(CONFIG_PWM_MEDIATEK) += pwm-mediatek.o
obj-$(CONFIG_PWM_MTK_DISP) += pwm-mtk-disp.o
obj-$(CONFIG_PWM_MXS) += pwm-mxs.o
obj-$(CONFIG_PWM_NTXEC) += pwm-ntxec.o
obj-$(CONFIG_PWM_OMAP_DMTIMER) += pwm-omap-dmtimer.o
obj-$(CONFIG_PWM_PCA9685) += pwm-pca9685.o
obj-$(CONFIG_PWM_PXA) += pwm-pxa.o
......
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......@@ -204,6 +204,17 @@ config REGULATOR_BD70528
This driver can also be built as a module. If so, the module
will be called bd70528-regulator.
config REGULATOR_BD71815
tristate "ROHM BD71815 Power Regulator"
depends on MFD_ROHM_BD71828
help
This driver supports voltage regulators on ROHM BD71815 PMIC.
This will enable support for the software controllable buck
and LDO regulators and a current regulator for LEDs.
This driver can also be built as a module. If so, the module
will be called bd71815-regulator.
config REGULATOR_BD71828
tristate "ROHM BD71828 Power Regulator"
depends on MFD_ROHM_BD71828
......
......@@ -30,6 +30,7 @@ obj-$(CONFIG_REGULATOR_ATC260X) += atc260x-regulator.o
obj-$(CONFIG_REGULATOR_AXP20X) += axp20x-regulator.o
obj-$(CONFIG_REGULATOR_BCM590XX) += bcm590xx-regulator.o
obj-$(CONFIG_REGULATOR_BD70528) += bd70528-regulator.o
obj-$(CONFIG_REGULATOR_BD71815) += bd71815-regulator.o
obj-$(CONFIG_REGULATOR_BD71828) += bd71828-regulator.o
obj-$(CONFIG_REGULATOR_BD718XX) += bd718x7-regulator.o
obj-$(CONFIG_REGULATOR_BD9571MWV) += bd9571mwv-regulator.o
......
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