Commit 7296443b authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Chanwoo Choi

PM / devfreq: tegra30: Handle possible round-rate error

The EMC clock rate rounding technically could fail, hence let's handle
the error cases properly.
Reviewed-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Tested-by: default avatarPeter Geis <pgwipeout@gmail.com>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
parent d49eeb1e
...@@ -592,8 +592,8 @@ static int tegra_devfreq_probe(struct platform_device *pdev) ...@@ -592,8 +592,8 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
struct tegra_devfreq_device *dev; struct tegra_devfreq_device *dev;
struct tegra_devfreq *tegra; struct tegra_devfreq *tegra;
struct devfreq *devfreq; struct devfreq *devfreq;
unsigned long rate;
unsigned int i; unsigned int i;
long rate;
int err; int err;
tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL); tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL);
...@@ -650,8 +650,14 @@ static int tegra_devfreq_probe(struct platform_device *pdev) ...@@ -650,8 +650,14 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
reset_control_deassert(tegra->reset); reset_control_deassert(tegra->reset);
tegra->max_freq = clk_round_rate(tegra->emc_clock, ULONG_MAX) / KHZ; rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
if (rate < 0) {
dev_err(&pdev->dev, "Failed to round clock rate: %ld\n", rate);
return rate;
}
tegra->cur_freq = clk_get_rate(tegra->emc_clock) / KHZ; tegra->cur_freq = clk_get_rate(tegra->emc_clock) / KHZ;
tegra->max_freq = rate / KHZ;
for (i = 0; i < ARRAY_SIZE(actmon_device_configs); i++) { for (i = 0; i < ARRAY_SIZE(actmon_device_configs); i++) {
dev = tegra->devices + i; dev = tegra->devices + i;
...@@ -662,6 +668,13 @@ static int tegra_devfreq_probe(struct platform_device *pdev) ...@@ -662,6 +668,13 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
for (rate = 0; rate <= tegra->max_freq * KHZ; rate++) { for (rate = 0; rate <= tegra->max_freq * KHZ; rate++) {
rate = clk_round_rate(tegra->emc_clock, rate); rate = clk_round_rate(tegra->emc_clock, rate);
if (rate < 0) {
dev_err(&pdev->dev,
"Failed to round clock rate: %ld\n", rate);
err = rate;
goto remove_opps;
}
err = dev_pm_opp_add(&pdev->dev, rate, 0); err = dev_pm_opp_add(&pdev->dev, rate, 0);
if (err) { if (err) {
dev_err(&pdev->dev, "Failed to add OPP: %d\n", err); dev_err(&pdev->dev, "Failed to add OPP: %d\n", err);
......
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