Commit 74451424 authored by Divy Le Ray's avatar Divy Le Ray Committed by David S. Miller

cxgb3: Add Aeluros 2020 phy support

Add support for the AEL2020 phy.
Add PCI IDs of the boards using this phy.
Signed-off-by: default avatarDivy Le Ray <divy@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c3a8c5b6
This diff is collapsed.
...@@ -802,6 +802,8 @@ int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter, ...@@ -802,6 +802,8 @@ int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
int phy_addr, const struct mdio_ops *mdio_ops); int phy_addr, const struct mdio_ops *mdio_ops);
int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter, int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter,
int phy_addr, const struct mdio_ops *mdio_ops); int phy_addr, const struct mdio_ops *mdio_ops);
int t3_ael2020_phy_prep(struct cphy *phy, struct adapter *adapter,
int phy_addr, const struct mdio_ops *mdio_ops);
int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr, int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr,
const struct mdio_ops *mdio_ops); const struct mdio_ops *mdio_ops);
int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter, int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
......
...@@ -91,6 +91,8 @@ static const struct pci_device_id cxgb3_pci_tbl[] = { ...@@ -91,6 +91,8 @@ static const struct pci_device_id cxgb3_pci_tbl[] = {
CH_DEVICE(0x31, 3), /* T3B20 */ CH_DEVICE(0x31, 3), /* T3B20 */
CH_DEVICE(0x32, 1), /* T3B02 */ CH_DEVICE(0x32, 1), /* T3B02 */
CH_DEVICE(0x35, 6), /* T3C20-derived T3C10 */ CH_DEVICE(0x35, 6), /* T3C20-derived T3C10 */
CH_DEVICE(0x36, 3), /* S320E-CR */
CH_DEVICE(0x37, 7), /* N320E-G2 */
{0,} {0,}
}; };
......
...@@ -526,6 +526,11 @@ static const struct adapter_info t3_adap_info[] = { ...@@ -526,6 +526,11 @@ static const struct adapter_info t3_adap_info[] = {
F_GPIO10_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, F_GPIO10_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
{ S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI, { S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
&mi1_mdio_ext_ops, "Chelsio T310" }, &mi1_mdio_ext_ops, "Chelsio T310" },
{1, 0, 0,
F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN |
F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL,
{ S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
&mi1_mdio_ext_ops, "Chelsio N320E-G2" },
}; };
/* /*
...@@ -552,6 +557,8 @@ static const struct port_type_info port_types[] = { ...@@ -552,6 +557,8 @@ static const struct port_type_info port_types[] = {
{ t3_qt2045_phy_prep }, { t3_qt2045_phy_prep },
{ t3_ael1006_phy_prep }, { t3_ael1006_phy_prep },
{ NULL }, { NULL },
{ NULL },
{ t3_ael2020_phy_prep },
}; };
#define VPD_ENTRY(name, len) \ #define VPD_ENTRY(name, len) \
......
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