Commit 7457affc authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents 06170b11 35d8faae
......@@ -194,7 +194,7 @@ amba_attr(resource, "\t%08lx\t%08lx\t%08lx\n",
int amba_device_register(struct amba_device *dev, struct resource *parent)
{
u32 pid, cid;
void *tmp;
void __iomem *tmp;
int i, ret;
dev->dev.release = amba_device_release;
......
......@@ -27,9 +27,9 @@
#include <asm/io.h>
#include <asm/page.h>
static u32 __isamem_convert_addr(void *addr)
static void __iomem *__isamem_convert_addr(void __iomem *addr)
{
u32 ret, a = (u32) addr;
u32 ret, a = (u32 __force) addr;
/*
* The PCMCIA controller is wired up as follows:
......@@ -53,41 +53,43 @@ static u32 __isamem_convert_addr(void *addr)
ret += 0xe8000000;
if ((a & 0x20000) == (a & 0x40000) >> 1)
return ret;
return (void __iomem *)ret;
BUG();
return 0;
return NULL;
}
/*
* read[bwl] and write[bwl]
*/
u8 __readb(void *addr)
u8 __readb(void __iomem *addr)
{
u32 ret, a = __isamem_convert_addr(addr);
void __iomem *a = __isamem_convert_addr(addr);
u32 ret;
if ((int)addr & 1)
if ((unsigned long)addr & 1)
ret = __raw_readl(a);
else
ret = __raw_readb(a);
return ret;
}
u16 __readw(void *addr)
u16 __readw(void __iomem *addr)
{
u32 a = __isamem_convert_addr(addr);
void __iomem *a = __isamem_convert_addr(addr);
if ((int)addr & 1)
if ((unsigned long)addr & 1)
BUG();
return __raw_readw(a);
}
u32 __readl(void *addr)
u32 __readl(void __iomem *addr)
{
u32 ret, a = __isamem_convert_addr(addr);
void __iomem *a = __isamem_convert_addr(addr);
u32 ret;
if ((int)addr & 3)
if ((unsigned long)addr & 3)
BUG();
ret = __raw_readw(a);
......@@ -99,31 +101,31 @@ EXPORT_SYMBOL(__readb);
EXPORT_SYMBOL(__readw);
EXPORT_SYMBOL(__readl);
void __writeb(u8 val, void *addr)
void __writeb(u8 val, void __iomem *addr)
{
u32 a = __isamem_convert_addr(addr);
void __iomem *a = __isamem_convert_addr(addr);
if ((int)addr & 1)
if ((unsigned long)addr & 1)
__raw_writel(val, a);
else
__raw_writeb(val, a);
}
void __writew(u16 val, void *addr)
void __writew(u16 val, void __iomem *addr)
{
u32 a = __isamem_convert_addr(addr);
void __iomem *a = __isamem_convert_addr(addr);
if ((int)addr & 1)
if ((unsigned long)addr & 1)
BUG();
__raw_writew(val, a);
}
void __writel(u32 val, void *addr)
void __writel(u32 val, void __iomem *addr)
{
u32 a = __isamem_convert_addr(addr);
void __iomem *a = __isamem_convert_addr(addr);
if ((int)addr & 3)
if ((unsigned long)addr & 3)
BUG();
__raw_writew(val, a);
......@@ -153,7 +155,7 @@ u8 __inb8(unsigned int port)
if (SUPERIO_PORT(port))
ret = __raw_readb(ISAIO_BASE + (port << 2));
else {
u32 a = ISAIO_BASE + ((port & ~1) << 1);
void __iomem *a = ISAIO_BASE + ((port & ~1) << 1);
/*
* Shame nothing else does
......@@ -180,7 +182,7 @@ u8 __inb16(unsigned int port)
if (SUPERIO_PORT(port))
ret = __raw_readb(ISAIO_BASE + (port << 2));
else {
u32 a = ISAIO_BASE + ((port & ~1) << 1);
void __iomem *a = ISAIO_BASE + ((port & ~1) << 1);
/*
* Shame nothing else does
......@@ -200,7 +202,7 @@ u16 __inw(unsigned int port)
if (SUPERIO_PORT(port))
ret = __raw_readw(ISAIO_BASE + (port << 2));
else {
u32 a = ISAIO_BASE + ((port & ~1) << 1);
void __iomem *a = ISAIO_BASE + ((port & ~1) << 1);
/*
* Shame nothing else does
......@@ -218,7 +220,7 @@ u16 __inw(unsigned int port)
*/
u32 __inl(unsigned int port)
{
u32 a;
void __iomem *a;
if (SUPERIO_PORT(port) || port & 3)
BUG();
......@@ -241,7 +243,7 @@ void __outb8(u8 val, unsigned int port)
if (SUPERIO_PORT(port))
__raw_writeb(val, ISAIO_BASE + (port << 2));
else {
u32 a = ISAIO_BASE + ((port & ~1) << 1);
void __iomem *a = ISAIO_BASE + ((port & ~1) << 1);
/*
* Shame nothing else does
......@@ -261,7 +263,7 @@ void __outb16(u8 val, unsigned int port)
if (SUPERIO_PORT(port))
__raw_writeb(val, ISAIO_BASE + (port << 2));
else {
u32 a = ISAIO_BASE + ((port & ~1) << 1);
void __iomem *a = ISAIO_BASE + ((port & ~1) << 1);
/*
* Shame nothing else does
......
......@@ -52,7 +52,7 @@
#include <asm/arch/map.h>
/* io map for dma */
static void *dma_base;
static void __iomem *dma_base;
/* dma channel state information */
s3c2410_dma_chan_t s3c2410_chans[S3C2410_DMA_CHANNELS];
......@@ -1065,7 +1065,7 @@ static int __init s3c2410_init_dma(void)
/* dma channel irqs are in order.. */
cp->number = channel;
cp->irq = channel + IRQ_DMA0;
cp->regs = (unsigned long)dma_base + (channel*0x40);
cp->regs = dma_base + (channel*0x40);
/* point current stats somewhere */
cp->stats = &cp->stats_store;
......@@ -1075,7 +1075,7 @@ static int __init s3c2410_init_dma(void)
cp->load_timeout = 1<<18;
printk("DMA channel %d at %08lx, irq %d\n",
printk("DMA channel %d at %p, irq %d\n",
cp->number, cp->regs, cp->irq);
}
......
......@@ -130,7 +130,7 @@ remap_area_pages(unsigned long start, unsigned long phys_addr,
* 'flags' are the extra L_PTE_ flags that you want to specify for this
* mapping. See include/asm-arm/proc-armv/pgtable.h for more information.
*/
void *
void __iomem *
__ioremap(unsigned long phys_addr, size_t size, unsigned long flags,
unsigned long align)
{
......@@ -161,11 +161,11 @@ __ioremap(unsigned long phys_addr, size_t size, unsigned long flags,
vfree(addr);
return NULL;
}
return (void *) (offset + (char *)addr);
return (void __iomem *) (offset + (char *)addr);
}
EXPORT_SYMBOL(__ioremap);
void __iounmap(void *addr)
void __iounmap(void __iomem *addr)
{
vfree((void *) (PAGE_MASK & (unsigned long) addr));
}
......
......@@ -69,7 +69,7 @@ static void mmci_stop_data(struct mmci_host *host)
static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
{
unsigned int datactrl, timeout, irqmask;
void *base;
void __iomem *base;
DBG(host, "blksz %04x blks %04x flags %08x\n",
1 << data->blksz_bits, data->blocks, data->flags);
......@@ -108,7 +108,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
static void
mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c)
{
void *base = host->base;
void __iomem *base = host->base;
DBG(host, "op %02x arg %08x flags %08x\n",
cmd->opcode, cmd->arg, cmd->flags);
......@@ -169,7 +169,7 @@ static void
mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
unsigned int status)
{
void *base = host->base;
void __iomem *base = host->base;
host->cmd = NULL;
......@@ -193,7 +193,7 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd,
static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain)
{
void *base = host->base;
void __iomem *base = host->base;
char *ptr = buffer;
u32 status;
......@@ -222,7 +222,7 @@ static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int rema
static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status)
{
void *base = host->base;
void __iomem *base = host->base;
char *ptr = buffer;
do {
......@@ -251,7 +251,7 @@ static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int rem
static irqreturn_t mmci_pio_irq(int irq, void *dev_id, struct pt_regs *regs)
{
struct mmci_host *host = dev_id;
void *base = host->base;
void __iomem *base = host->base;
u32 status;
status = readl(base + MMCISTATUS);
......
......@@ -120,7 +120,7 @@
struct clk;
struct mmci_host {
void *base;
void __iomem *base;
struct mmc_request *mrq;
struct mmc_command *cmd;
struct mmc_data *data;
......
This diff is collapsed.
......@@ -745,7 +745,7 @@ static struct uart_driver amba_reg = {
static int pl011_probe(struct amba_device *dev, void *id)
{
struct uart_amba_port *uap;
void *base;
void __iomem *base;
int i, ret;
for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
......
......@@ -22,9 +22,9 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((a))
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) ((unsigned long)(a))
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
/*
* We don't support ins[lb]/outs[lb]. Make them fault.
......
......@@ -27,13 +27,13 @@ void __outw(u16 val, unsigned int port);
u32 __inl(unsigned int port);
void __outl(u32 val, unsigned int port);
u8 __readb(void *addr);
u16 __readw(void *addr);
u32 __readl(void *addr);
u8 __readb(void __iomem *addr);
u16 __readw(void __iomem *addr);
u32 __readl(void __iomem *addr);
void __writeb(u8 val, void *addr);
void __writew(u16 val, void *addr);
void __writel(u32 val, void *addr);
void __writeb(u8 val, void __iomem *addr);
void __writew(u16 val, void __iomem *addr);
void __writel(u32 val, void __iomem *addr);
/*
* Argh, someone forgot the IOCS16 line. We therefore have to handle
......@@ -64,7 +64,7 @@ void __writel(u32 val, void *addr);
#define writew(v,b) __writew(v,b)
#define writel(v,b) __writel(v,b)
#define __arch_ioremap(cookie,sz,c,a) ((void *)(cookie))
#define __arch_ioremap(cookie,sz,c,a) ((void __iomem *)(cookie))
#define __arch_iounmap(cookie) do { } while (0)
extern void insb(unsigned int port, void *buf, int sz);
......
......@@ -19,25 +19,27 @@
/*
* Translation of various region addresses to virtual addresses
*/
#define __io(a) (PCIO_BASE + (a))
#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
#if 1
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) (PCIMEM_BASE + (unsigned long)(a))
#define __mem_pci(a) (a)
#define __mem_isa(a) ((a) + PCIMEM_BASE)
#else
static inline unsigned long ___mem_pci(unsigned long a)
static inline void __iomem *___mem_pci(void __iomem *p)
{
unsigned long a = (unsigned long)p;
BUG_ON(a <= 0xc0000000 || a >= 0xe0000000);
return a;
return p;
}
static inline unsigned long ___mem_isa(unsigned long a)
static inline void __iomem *___mem_isa(void __iomem *p)
{
unsigned long a = (unsigned long)p;
BUG_ON(a >= 16*1048576);
return PCIMEM_BASE + a;
return p + PCIMEM_BASE;
}
#define __mem_pci(a) ___mem_pci((unsigned long)(a))
#define __mem_isa(a) ___mem_isa((unsigned long)(a))
#define __mem_pci(a) ___mem_pci(a)
#define __mem_isa(a) ___mem_isa(a)
#endif
#endif
......@@ -33,7 +33,7 @@
#define insw __arch_readsw
#define insl __arch_readsl*/
#define __io(a) (a)
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#endif
......@@ -18,7 +18,7 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) (a)
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#endif
......@@ -22,7 +22,7 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) (a)
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#endif
......@@ -22,8 +22,8 @@
#define IO_SPACE_LIMIT 0xffff
#define __io(a) (PCI_IO_VADDR + (a))
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) (PCI_MEMORY_VADDR + (unsigned long)(a))
#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
#define __mem_pci(a) (a)
#define __mem_isa(a) ((a) + PCI_MEMORY_VADDR)
#endif
......@@ -13,8 +13,8 @@
#define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((p))
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) ((unsigned long)(a))
#define __io(p) ((void __iomem *)(p))
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
#endif
......@@ -16,7 +16,7 @@
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_pci(a) (a)
/*
* Pick up VMALLOC_END
......
......@@ -46,7 +46,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
*/
#ifndef CONFIG_IXP4XX_INDIRECT_PCI
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_pci(a) (a)
#else
......@@ -58,10 +58,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
* access registers. If something outside of PCI is ioremap'd, we
* fallback to the default.
*/
static inline void *
static inline void __iomem *
__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align)
{
extern void * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
if((addr < 0x48000000) || (addr > 0x4fffffff))
return __ioremap(addr, size, flags, align);
......@@ -69,9 +69,9 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned
}
static inline void
__ixp4xx_iounmap(void *addr)
__ixp4xx_iounmap(void __iomem *addr)
{
extern void __iounmap(void *addr);
extern void __iounmap(void __iomem *addr);
if ((u32)addr >= VMALLOC_START)
__iounmap(addr);
......
......@@ -17,9 +17,9 @@
/*
* There are not real ISA nor PCI buses, so we fake it.
*/
#define __io_pci(a) (PCIO_BASE + (a))
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) ((unsigned long)(a))
#define __io_pci(a) ((void __iomem *)(PCIO_BASE + (a)))
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
#define __ioaddr(p) __io_pci(p)
......
......@@ -14,8 +14,8 @@
#define IO_SPACE_LIMIT 0xffffffff
/* No ISA or PCI bus on this machine. */
#define __io(a) (a)
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) ((unsigned long)(a))
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
#endif /* __ASM_ARCH_IO_H */
......@@ -40,9 +40,9 @@
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) (PCIO_BASE + (a))
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) ((unsigned long)(a))
#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
/*
* ----------------------------------------------------------------------------
......
......@@ -12,8 +12,8 @@
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) (a)
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) ((unsigned long)(a))
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
#endif
......@@ -250,6 +250,6 @@ DECLARE_IO(int,l,"")
/*
* 1:1 mapping for ioremapped regions.
*/
#define __mem_pci(x) ((unsigned long)(x))
#define __mem_pci(x) (x)
#endif
......@@ -198,7 +198,7 @@ struct s3c2410_dma_chan_s {
unsigned int flags; /* channel flags */
/* channel's hardware position and configuration */
unsigned long regs; /* channels registers */
void __iomem *regs; /* channels registers */
unsigned int irq; /* channel irq */
unsigned long addr_reg; /* data address register */
unsigned long dcon; /* default value of DCON */
......
......@@ -16,8 +16,8 @@
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) (PCIO_BASE + (a))
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) ((unsigned long)(a))
#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
#endif
......@@ -170,7 +170,7 @@ DECLARE_IO(long,l,"")
addr; \
})
#define __mem_pci(addr) addr
#define __mem_pci(addr) (addr)
#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
......
......@@ -22,8 +22,8 @@
#define IO_SPACE_LIMIT 0xffff
#define __io(a) ((a))
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) ((unsigned long)(a))
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
#endif
......@@ -141,7 +141,7 @@ struct clcd_fb {
struct clcd_panel *panel;
struct clcd_board *board;
void *board_data;
void *regs;
void __iomem *regs;
u32 clcd_cntl;
u32 cmap[16];
};
......
......@@ -39,21 +39,21 @@
* Generic IO read/write. These perform native-endian accesses. Note
* that some architectures will want to re-define __raw_{read,write}w.
*/
extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
extern void __raw_readsl(unsigned int addr, void *data, int longlen);
extern void __raw_readsb(void __iomem *addr, void *data, int bytelen);
extern void __raw_readsw(void __iomem *addr, void *data, int wordlen);
extern void __raw_readsl(void __iomem *addr, void *data, int longlen);
#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v))
#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v))
#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v))
#define __raw_writeb(v,a) (*(volatile unsigned char __force *)(a) = (v))
#define __raw_writew(v,a) (*(volatile unsigned short __force *)(a) = (v))
#define __raw_writel(v,a) (*(volatile unsigned int __force *)(a) = (v))
#define __raw_readb(a) (*(volatile unsigned char *)(a))
#define __raw_readw(a) (*(volatile unsigned short *)(a))
#define __raw_readl(a) (*(volatile unsigned int *)(a))
#define __raw_readb(a) (*(volatile unsigned char __force *)(a))
#define __raw_readw(a) (*(volatile unsigned short __force *)(a))
#define __raw_readl(a) (*(volatile unsigned int __force *)(a))
/*
* Bad read/write accesses...
......@@ -156,17 +156,17 @@ extern void _memset_io(void __iomem *, int, size_t);
#define readw_relaxed(addr) readw(addr)
#define readl_relaxed(addr) readl(addr)
#define readsb(p,d,l) __raw_readsb((unsigned int)__mem_pci(p),d,l)
#define readsw(p,d,l) __raw_readsw((unsigned int)__mem_pci(p),d,l)
#define readsl(p,d,l) __raw_readsl((unsigned int)__mem_pci(p),d,l)
#define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l)
#define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l)
#define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l)
#define writeb(v,c) __raw_writeb(v,__mem_pci(c))
#define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c))
#define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c))
#define writesb(p,d,l) __raw_writesb((unsigned int)__mem_pci(p),d,l)
#define writesw(p,d,l) __raw_writesw((unsigned int)__mem_pci(p),d,l)
#define writesl(p,d,l) __raw_writesl((unsigned int)__mem_pci(p),d,l)
#define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l)
#define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l)
#define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l)
#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
......@@ -268,8 +268,8 @@ isa_check_signature(unsigned long io_addr, const unsigned char *signature,
* ioremap takes a PCI memory address, as specified in
* Documentation/IO-mapping.txt.
*/
extern void * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
extern void __iounmap(void *addr);
extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
extern void __iounmap(void __iomem *addr);
#ifndef __arch_ioremap
#define ioremap(cookie,size) __ioremap(cookie,size,0,1)
......
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