[PATCH] reformat m68knommu 68360/uCquicc crt0_ram.S

This patch reformats the 68360 crt_ram.S file to make it consistent
with the other m68knommu assembler files, and generally to good
style standards :-)

arch/m68knommu/platform/68360/uCquicc/crt0_ram.S

@@ -15,7 +15,6 @@
 #include <linux/config.h>
 
 .global _stext
-.global __bss_start
 .global _start
 
 .global _rambase
@@ -26,7 +25,6 @@
 
 .global _quicc_base
 .global _periph_base
-.global _dprbase
 
 #define REGB                        0x1000
 #define PEPAR                       (_dprbase + REGB + 0x0016)
@@ -94,8 +92,10 @@
 #include <asm/m68360_regs.h>
 
 	
-/* By the time this RAM specific code begins to execute, DPRAM
- * and DRAM should already be mapped and accessible. */
+/*
+ * By the time this RAM specific code begins to execute, DPRAM
+ * and DRAM should already be mapped and accessible.
+ */
 
 	.text
 _start:
@@ -103,8 +103,7 @@ _stext:
 	nop
 	ori.w	#MCU_DISABLE_INTRPTS, %sr	/* disable interrupts: */
 	/* We should not need to setup the boot stack the reset should do it. */
-    movea.l	#_boot_stack,           %sp     /*set up stack at the end of DRAM:*/
-
+	movea.l	#__ramend, %sp			/*set up stack at the end of DRAM:*/
 
 set_mbar_register:
 	moveq.l	#0x07, %d1			/* Setup MBAR */
@@ -119,14 +118,13 @@ set_mbar_register:
 	moveq.l	#0x05, %d1
 	movec.l	%d1, %dfc
 
-/* Now we can begin to access registers in DPRAM */
+	/* Now we can begin to access registers in DPRAM */
 
 set_sim_mcr:
 	/* Set Module Configuration Register */
 	move.l	#MCU_SIM_MCR, MCR
 
-/* to do:	Determine cause of reset */
-
+	/* to do:	Determine cause of reset */
 
 	/*
 	 *       configure system clock MC68360 p. 6-40
@@ -137,20 +135,19 @@ set_sim_clock:
 	move.b	#MCU_SIM_CLKOCR, CLKOCR
 	move.w	#MCU_SIM_CDVCR, CDVCR
 
-    // Wait for the PLL to settle
+	/* Wait for the PLL to settle */
 	move.w	#16384, %d0
 pll_settle_wait:
 	subi.w	#1, %d0
 	bne	pll_settle_wait
 
 	/* Setup the system protection register, and watchdog timer register */
-
 	move.b	#MCU_SIM_SWIV, SWIV
 	move.w	#MCU_SIM_PICR, PICR
 	move.w	#MCU_SIM_PITR, PITR
 	move.w	#MCU_SIM_SYPCR, SYPCR
 
-/* Clear DPRAM - system + parameter */
+	/* Clear DPRAM - system + parameter */
 	movea.l	#_dprbase, %a0
 	movea.l	#_dprbase+0x2000, %a1
 
@@ -161,9 +158,7 @@ clear_dpram:
 	bhi	clear_dpram
 
 configure_memory_controller:    
-    /*
-    *   Set up Global Memory Register (GMR)
-    */
+	/* Set up Global Memory Register (GMR) */
 	move.l	#MCU_SIM_GMR, %d0
 	move.l	%d0, GMR
 
@@ -179,23 +174,21 @@ configure_chip_select_0:
 	ori.l	#SIM_BR0_MASK, %d0
 	move.l	%d0, BR0
 
-
 configure_chip_select_1:
-    move.l      #__flashend,    %d0
-    subi.l      #__flashstart,  %d0
+	move.l	#__rom_end, %d0
+	subi.l	#__rom_start, %d0
 	subq.l	#0x01, %d0
 	eori.l	#SIM_OR_MASK, %d0
 	ori.l	#SIM_OR1_MASK, %d0
 	move.l	%d0, OR1
 
-    move.l      #__flashstart,  %d0
+	move.l	#__rom_start, %d0
 	ori.l	#SIM_BR1_MASK, %d0
 	move.l	%d0, BR1
 
-
 	move.w	#MCU_SIM_PEPAR, PEPAR 
 
-/* point to vector table: */
+	/* point to vector table: */
 	move.l	#_romvec, %a0
 	move.l	#_ramvec, %a1
 copy_vectors:
@@ -212,9 +205,9 @@ copy_vectors:
 
 
 	/* Copy data segment from ROM to RAM */
-	moveal	#__data_rom_start, %a0
-	moveal	#__data_start, %a1
-	moveal	#__data_end, %a2
+	moveal	#_stext, %a0
+	moveal	#_sdata, %a1
+	moveal	#_edata, %a2
 
 	/* Copy %a0 to %a1 until %a1 == %a2 */
 LD1:
@@ -222,11 +215,11 @@ LD1:
 	addq.l	#0x04, %a0
 	move.l	%d0, %a1@
 	addq.l	#0x04, %a1
-    cmp.l   #__data_end,    %a1
+	cmp.l	#_edata, %a1
 	blt     LD1
 
-	moveal	#__bss_start, %a0
-	moveal	#end, %a1
+	moveal	#_sbss, %a0
+	moveal	#_ebss, %a1
 
 	/* Copy 0 to %a0 until %a0 == %a1 */
 L1:
@@ -240,15 +233,15 @@ load_quicc:
 store_ram_size:
 	/* Set ram size information */
 	move.l	#_sdata, _rambase
-    move.l  #end,       _ramstart
+	move.l	#_ebss, _ramstart
 	move.l	#__ramend, %d0
 	sub.l	#0x1000, %d0			/* Reserve 4K for stack space.*/
 	move.l	%d0, _ramend			/* Different from __ramend.*/
 
 store_flash_size:
 	/* Set rom size information */
-    move.l  #__flashend,    %d0
-    sub.l   #__flashstart,  %d0
+	move.l	#__rom_end, %d0
+	sub.l	#__rom_start, %d0
 	move.l	%d0, rom_length
     
 	pea	0
@@ -261,14 +254,11 @@ store_flash_size:
 
 lp:
 	jsr	start_kernel
- /*   jmp lp */
 
 _exit:
-
 	jmp	_exit
 
 
-
 	.data
 	.align 4
 env:
@@ -285,6 +275,9 @@ _ramstart:
 	.long   0
 _ramend:
 	.long   0
+_dprbase:
+	.long	0xffffe000
+
 	.text
 
     /*
@@ -293,7 +286,7 @@ _ramend:
      */
  
 .section ".data.initvect","awx"
-    .long   _boot_stack /* Reset: Initial Stack Pointer                 - 0.  */
+    .long   __ramend	/* Reset: Initial Stack Pointer                 - 0.  */
     .long   _start      /* Reset: Initial Program Counter               - 1.  */
     .long   buserr      /* Bus Error                                    - 2.  */
     .long   trap        /* Address Error                                - 3.  */