Commit 7627dc80 authored by Russell King's avatar Russell King

ARM: GIC: private a standard get_irqnr_preamble assembler macro

Provide a standard get_irqnr_preamble assembler macro for platforms
to use, which retrieves the base address of the GIC CPU interface
from gic_cpu_base_addr.  Allow platforms to override this by defining
HAVE_GET_IRQNR_PREAMBLE.
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Tested-by: default avatarAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent bef8f9ee
...@@ -10,6 +10,13 @@ ...@@ -10,6 +10,13 @@
#include <asm/hardware/gic.h> #include <asm/hardware/gic.h>
#ifndef HAVE_GET_IRQNR_PREAMBLE
.macro get_irqnr_preamble, base, tmp
ldr \base, =gic_cpu_base_addr
ldr \base, [\base]
.endm
#endif
/* /*
* The interrupt numbering scheme is defined in the * The interrupt numbering scheme is defined in the
* interrupt controller spec. To wit: * interrupt controller spec. To wit:
......
...@@ -14,10 +14,5 @@ ...@@ -14,10 +14,5 @@
.macro disable_fiq .macro disable_fiq
.endm .endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =gic_cpu_base_addr
ldr \base, [\base]
.endm
.macro arch_ret_to_user, tmp1, tmp2 .macro arch_ret_to_user, tmp1, tmp2
.endm .endm
...@@ -170,6 +170,7 @@ omap_irq_base: .word 0 ...@@ -170,6 +170,7 @@ omap_irq_base: .word 0
#ifdef CONFIG_ARCH_OMAP4 #ifdef CONFIG_ARCH_OMAP4
#define HAVE_GET_IRQNR_PREAMBLE
#include <asm/hardware/entry-macro-gic.S> #include <asm/hardware/entry-macro-gic.S>
.macro get_irqnr_preamble, base, tmp .macro get_irqnr_preamble, base, tmp
......
...@@ -13,11 +13,6 @@ ...@@ -13,11 +13,6 @@
.macro disable_fiq .macro disable_fiq
.endm .endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =gic_cpu_base_addr
ldr \base, [\base]
.endm
.macro arch_ret_to_user, tmp1, tmp2 .macro arch_ret_to_user, tmp1, tmp2
.endm .endm
...@@ -16,7 +16,7 @@ ...@@ -16,7 +16,7 @@
#include <mach/io.h> #include <mach/io.h>
#if defined(CONFIG_ARM_GIC) #if defined(CONFIG_ARM_GIC)
#define HAVE_GET_IRQNR_PREAMBLE
#include <asm/hardware/entry-macro-gic.S> #include <asm/hardware/entry-macro-gic.S>
/* Uses the GIC interrupt controller built into the cpu */ /* Uses the GIC interrupt controller built into the cpu */
......
...@@ -11,6 +11,7 @@ ...@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied. * warranty of any kind, whether express or implied.
*/ */
#include <mach/hardware.h> #include <mach/hardware.h>
#define HAVE_GET_IRQNR_PREAMBLE
#include <asm/hardware/entry-macro-gic.S> #include <asm/hardware/entry-macro-gic.S>
.macro disable_fiq .macro disable_fiq
......
...@@ -3,10 +3,5 @@ ...@@ -3,10 +3,5 @@
.macro disable_fiq .macro disable_fiq
.endm .endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =gic_cpu_base_addr
ldr \base, [\base]
.endm
.macro arch_ret_to_user, tmp1, tmp2 .macro arch_ret_to_user, tmp1, tmp2
.endm .endm
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