Commit 76f10b9a authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu/vi: rename fiji cg functions

They can be used for other VI parts.
Acked-by: default avatarTom St Denis <tom.stdenis@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 64694905
...@@ -1203,7 +1203,7 @@ static int vi_common_soft_reset(void *handle) ...@@ -1203,7 +1203,7 @@ static int vi_common_soft_reset(void *handle)
return 0; return 0;
} }
static void fiji_update_bif_medium_grain_light_sleep(struct amdgpu_device *adev, static void vi_update_bif_medium_grain_light_sleep(struct amdgpu_device *adev,
bool enable) bool enable)
{ {
uint32_t temp, data; uint32_t temp, data;
...@@ -1223,7 +1223,7 @@ static void fiji_update_bif_medium_grain_light_sleep(struct amdgpu_device *adev, ...@@ -1223,7 +1223,7 @@ static void fiji_update_bif_medium_grain_light_sleep(struct amdgpu_device *adev,
WREG32_PCIE(ixPCIE_CNTL2, data); WREG32_PCIE(ixPCIE_CNTL2, data);
} }
static void fiji_update_hdp_medium_grain_clock_gating(struct amdgpu_device *adev, static void vi_update_hdp_medium_grain_clock_gating(struct amdgpu_device *adev,
bool enable) bool enable)
{ {
uint32_t temp, data; uint32_t temp, data;
...@@ -1239,7 +1239,7 @@ static void fiji_update_hdp_medium_grain_clock_gating(struct amdgpu_device *adev ...@@ -1239,7 +1239,7 @@ static void fiji_update_hdp_medium_grain_clock_gating(struct amdgpu_device *adev
WREG32(mmHDP_HOST_PATH_CNTL, data); WREG32(mmHDP_HOST_PATH_CNTL, data);
} }
static void fiji_update_hdp_light_sleep(struct amdgpu_device *adev, static void vi_update_hdp_light_sleep(struct amdgpu_device *adev,
bool enable) bool enable)
{ {
uint32_t temp, data; uint32_t temp, data;
...@@ -1255,7 +1255,7 @@ static void fiji_update_hdp_light_sleep(struct amdgpu_device *adev, ...@@ -1255,7 +1255,7 @@ static void fiji_update_hdp_light_sleep(struct amdgpu_device *adev,
WREG32(mmHDP_MEM_POWER_LS, data); WREG32(mmHDP_MEM_POWER_LS, data);
} }
static void fiji_update_rom_medium_grain_clock_gating(struct amdgpu_device *adev, static void vi_update_rom_medium_grain_clock_gating(struct amdgpu_device *adev,
bool enable) bool enable)
{ {
uint32_t temp, data; uint32_t temp, data;
...@@ -1280,13 +1280,22 @@ static int vi_common_set_clockgating_state(void *handle, ...@@ -1280,13 +1280,22 @@ static int vi_common_set_clockgating_state(void *handle,
switch (adev->asic_type) { switch (adev->asic_type) {
case CHIP_FIJI: case CHIP_FIJI:
fiji_update_bif_medium_grain_light_sleep(adev, vi_update_bif_medium_grain_light_sleep(adev,
state == AMD_CG_STATE_GATE ? true : false); state == AMD_CG_STATE_GATE ? true : false);
fiji_update_hdp_medium_grain_clock_gating(adev, vi_update_hdp_medium_grain_clock_gating(adev,
state == AMD_CG_STATE_GATE ? true : false); state == AMD_CG_STATE_GATE ? true : false);
fiji_update_hdp_light_sleep(adev, vi_update_hdp_light_sleep(adev,
state == AMD_CG_STATE_GATE ? true : false); state == AMD_CG_STATE_GATE ? true : false);
fiji_update_rom_medium_grain_clock_gating(adev, vi_update_rom_medium_grain_clock_gating(adev,
state == AMD_CG_STATE_GATE ? true : false);
break;
case CHIP_CARRIZO:
case CHIP_STONEY:
vi_update_bif_medium_grain_light_sleep(adev,
state == AMD_CG_STATE_GATE ? true : false);
vi_update_hdp_medium_grain_clock_gating(adev,
state == AMD_CG_STATE_GATE ? true : false);
vi_update_hdp_light_sleep(adev,
state == AMD_CG_STATE_GATE ? true : false); state == AMD_CG_STATE_GATE ? true : false);
break; break;
default: default:
......
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