Commit 78be29ab authored by Bjorn Helgaas's avatar Bjorn Helgaas

Merge branch 'pci/misc'

- Tidy setup-irq.c comments (Pranay Sanghai)

- Fix misspellings (Krzysztof Wilczyński)

- Fix sprintf(), sscanf() format mismatches (Krzysztof Wilczyński)

- Tidy cpqphp code formatting (Krzysztof Wilczyński)

- Remove unused pci_pool wrappers, which have been replaced by dma_pool
  (Cai Huoqing)

- Remove a redundant initialization in __pci_reset_function_locked() (Colin
  Ian King)

- Use 'unsigned int' instead of 'unsigned' (Krzysztof Wilczyński)

- Update PCI subsystem information in MAINTAINERS (Krzysztof Wilczyński)

- Include generic <linux/> headers instead of <asm/> for cpqphp and vmd
  (Krzysztof Wilczyński)

* pci/misc:
  PCI: vmd: Drop redundant includes of <asm/device.h>, <asm/msi.h>
  PCI: cpqphp: Use <linux/io.h> instead of <asm/io.h>
  MAINTAINERS: Update PCI subsystem information
  PCI: Prefer 'unsigned int' over bare 'unsigned'
  PCI: Remove redundant 'rc' initialization
  PCI: Remove unused pci_pool wrappers
  PCI: cpqphp: Format if-statement code block correctly
  PCI: Use unsigned to match sscanf("%x") in pci_dev_str_match_path()
  PCI: hv: Remove unnecessary use of %hx
  PCI: Correct misspelled and remove duplicated words
  PCI: Tidy comments
parents 10d0f97f ca25c637
......@@ -14440,9 +14440,12 @@ M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
R: Krzysztof Wilczyński <kw@linux.com>
L: linux-pci@vger.kernel.org
S: Supported
Q: https://patchwork.kernel.org/project/linux-pci/list/
B: https://bugzilla.kernel.org
C: irc://irc.oftc.net/linux-pci
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git
F: Documentation/PCI/endpoint/*
F: Documentation/misc-devices/pci-endpoint-test.rst
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kishon/pci-endpoint.git
F: drivers/misc/pci_endpoint_test.c
F: drivers/pci/endpoint/
F: tools/pci/
......@@ -14488,15 +14491,21 @@ R: Rob Herring <robh@kernel.org>
R: Krzysztof Wilczyński <kw@linux.com>
L: linux-pci@vger.kernel.org
S: Supported
Q: http://patchwork.ozlabs.org/project/linux-pci/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git/
Q: https://patchwork.kernel.org/project/linux-pci/list/
B: https://bugzilla.kernel.org
C: irc://irc.oftc.net/linux-pci
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git
F: drivers/pci/controller/
F: drivers/pci/pci-bridge-emul.c
F: drivers/pci/pci-bridge-emul.h
PCI SUBSYSTEM
M: Bjorn Helgaas <bhelgaas@google.com>
L: linux-pci@vger.kernel.org
S: Supported
Q: http://patchwork.ozlabs.org/project/linux-pci/list/
Q: https://patchwork.kernel.org/project/linux-pci/list/
B: https://bugzilla.kernel.org
C: irc://irc.oftc.net/linux-pci
T: git git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
F: Documentation/PCI/
F: Documentation/devicetree/bindings/pci/
......
......@@ -3126,14 +3126,14 @@ static int hv_pci_probe(struct hv_device *hdev,
if (dom == HVPCI_DOM_INVALID) {
dev_err(&hdev->device,
"Unable to use dom# 0x%hx or other numbers", dom_req);
"Unable to use dom# 0x%x or other numbers", dom_req);
ret = -EINVAL;
goto free_bus;
}
if (dom != dom_req)
dev_info(&hdev->device,
"PCI dom# 0x%hx has collision, using 0x%hx",
"PCI dom# 0x%x has collision, using 0x%x",
dom_req, dom);
hbus->bridge->domain_nr = dom;
......
......@@ -17,7 +17,7 @@ static void set_val(u32 v, int where, int size, u32 *val)
{
int shift = (where & 3) * 8;
pr_debug("set_val %04x: %08x\n", (unsigned)(where & ~3), v);
pr_debug("set_val %04x: %08x\n", (unsigned int)(where & ~3), v);
v >>= shift;
if (size == 1)
v &= 0xff;
......@@ -187,7 +187,7 @@ static int thunder_ecam_config_read(struct pci_bus *bus, unsigned int devfn,
pr_debug("%04x:%04x - Fix pass#: %08x, where: %03x, devfn: %03x\n",
vendor_device & 0xffff, vendor_device >> 16, class_rev,
(unsigned) where, devfn);
(unsigned int)where, devfn);
/* Check for non type-00 header */
if (cfg_type == 0) {
......
......@@ -302,7 +302,7 @@ static void xgene_msi_isr(struct irq_desc *desc)
/*
* MSIINTn (n is 0..F) indicates if there is a pending MSI interrupt
* If bit x of this register is set (x is 0..7), one or more interupts
* If bit x of this register is set (x is 0..7), one or more interrupts
* corresponding to MSInIRx is set.
*/
grp_select = xgene_msi_int_read(xgene_msi, msi_grp);
......
......@@ -145,7 +145,7 @@
#define BRCM_INT_PCI_MSI_LEGACY_NR 8
#define BRCM_INT_PCI_MSI_SHIFT 0
/* MSI target adresses */
/* MSI target addresses */
#define BRCM_MSI_TARGET_ADDR_LT_4GB 0x0fffffffcULL
#define BRCM_MSI_TARGET_ADDR_GT_4GB 0xffffffffcULL
......
......@@ -249,7 +249,7 @@ enum iproc_pcie_reg {
/*
* To hold the address of the register where the MSI writes are
* programed. When ARM GICv3 ITS is used, this should be programmed
* programmed. When ARM GICv3 ITS is used, this should be programmed
* with the address of the GITS_TRANSLATER register.
*/
IPROC_PCIE_MSI_ADDR_LO,
......
......@@ -18,8 +18,6 @@
#include <linux/rcupdate.h>
#include <asm/irqdomain.h>
#include <asm/device.h>
#include <asm/msi.h>
#define VMD_CFGBAR 0
#define VMD_MEMBAR1 2
......
......@@ -700,7 +700,7 @@ EXPORT_SYMBOL_GPL(pci_epc_linkup);
/**
* pci_epc_init_notify() - Notify the EPF device that EPC device's core
* initialization is completed.
* @epc: the EPC device whose core initialization is completeds
* @epc: the EPC device whose core initialization is completed
*
* Invoke to Notify the EPF device that the EPC device's initialization
* is completed.
......
......@@ -224,7 +224,7 @@ EXPORT_SYMBOL_GPL(pci_epf_add_vepf);
* be removed
* @epf_vf: the virtual EP function to be removed
*
* Invoke to remove a virtual endpoint function from the physcial endpoint
* Invoke to remove a virtual endpoint function from the physical endpoint
* function.
*/
void pci_epf_remove_vepf(struct pci_epf *epf_pf, struct pci_epf *epf_vf)
......@@ -432,7 +432,7 @@ EXPORT_SYMBOL_GPL(pci_epf_destroy);
/**
* pci_epf_create() - create a new PCI EPF device
* @name: the name of the PCI EPF device. This name will be used to bind the
* the EPF device to a EPF driver
* EPF device to a EPF driver
*
* Invoke to create a new PCI EPF device by providing the name of the function
* device.
......
......@@ -22,7 +22,7 @@
* when the bridge is scanned and it loses a refcount when the bridge
* is removed.
* - When a P2P bridge is present, we elevate the refcount on the subordinate
* bus. It loses the refcount when the the driver unloads.
* bus. It loses the refcount when the driver unloads.
*/
#define pr_fmt(fmt) "acpiphp_glue: " fmt
......
......@@ -15,7 +15,7 @@
#define _CPQPHP_H
#include <linux/interrupt.h>
#include <asm/io.h> /* for read? and write? functions */
#include <linux/io.h> /* for read? and write? functions */
#include <linux/delay.h> /* for delays */
#include <linux/mutex.h>
#include <linux/sched/signal.h> /* for signal_pending() */
......
......@@ -519,7 +519,7 @@ static struct pci_resource *do_bridge_resource_split(struct pci_resource **head,
* @head: list to search
* @size: size of node to find, must be a power of two.
*
* Description: This function sorts the resource list by size and then returns
* Description: This function sorts the resource list by size and then
* returns the first node of "size" length that is not in the ISA aliasing
* window. If it finds a node larger than "size" it will split it up.
*/
......@@ -1202,7 +1202,7 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
mdelay(5);
/* Reenable interrupts */
/* Re-enable interrupts */
writel(0, ctrl->hpc_reg + INT_MASK);
pci_write_config_byte(ctrl->pci_dev, 0x41, reg);
......
......@@ -189,8 +189,10 @@ int cpqhp_set_irq(u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
/* This should only be for x86 as it sets the Edge Level
* Control Register
*/
outb((u8) (temp_word & 0xFF), 0x4d0); outb((u8) ((temp_word &
0xFF00) >> 8), 0x4d1); rc = 0; }
outb((u8)(temp_word & 0xFF), 0x4d0);
outb((u8)((temp_word & 0xFF00) >> 8), 0x4d1);
rc = 0;
}
return rc;
}
......
......@@ -352,7 +352,7 @@ struct resource_node {
u32 len;
int type; /* MEM, IO, PFMEM */
u8 fromMem; /* this is to indicate that the range is from
* from the Memory bucket rather than from PFMem */
* the Memory bucket rather than from PFMem */
struct resource_node *next;
struct resource_node *nextRange; /* for the other mem range on bus */
};
......@@ -736,7 +736,7 @@ struct controller {
int ibmphp_init_devno(struct slot **); /* This function is called from EBDA, so we need it not be static */
int ibmphp_do_disable_slot(struct slot *slot_cur);
int ibmphp_update_slot_info(struct slot *); /* This function is called from HPC, so we need it to not be be static */
int ibmphp_update_slot_info(struct slot *); /* This function is called from HPC, so we need it to not be static */
int ibmphp_configure_card(struct pci_func *, u8);
int ibmphp_unconfigure_card(struct slot **, int);
extern const struct hotplug_slot_ops ibmphp_hotplug_slot_ops;
......
......@@ -295,7 +295,7 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)
mutex_lock(&slot->ctrl->cmd_lock);
if (!shpc_poll_ctrl_busy(ctrl)) {
/* After 1 sec and and the controller is still busy */
/* After 1 sec and the controller is still busy */
ctrl_err(ctrl, "Controller is still busy after 1 sec\n");
retval = -EBUSY;
goto out;
......
......@@ -579,7 +579,8 @@ static int msi_capability_init(struct pci_dev *dev, int nvec,
return ret;
}
static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
static void __iomem *msix_map_region(struct pci_dev *dev,
unsigned int nr_entries)
{
resource_size_t phys_addr;
u32 table_offset;
......
......@@ -570,7 +570,7 @@ static int pci_pm_reenable_device(struct pci_dev *pci_dev)
{
int retval;
/* if the device was enabled before suspend, reenable */
/* if the device was enabled before suspend, re-enable */
retval = pci_reenable_device(pci_dev);
/*
* if the device was busmaster before the suspend, make it busmaster
......
......@@ -269,7 +269,7 @@ static int pci_dev_str_match_path(struct pci_dev *dev, const char *path,
const char **endptr)
{
int ret;
int seg, bus, slot, func;
unsigned int seg, bus, slot, func;
char *wpath, *p;
char end;
......@@ -5324,7 +5324,7 @@ const struct attribute_group pci_dev_reset_method_attr_group = {
*/
int __pci_reset_function_locked(struct pci_dev *dev)
{
int i, m, rc = -ENOTTY;
int i, m, rc;
might_sleep();
......@@ -6360,11 +6360,12 @@ EXPORT_SYMBOL_GPL(pci_pr3_present);
* cannot be left as a userspace activity). DMA aliases should therefore
* be configured via quirks, such as the PCI fixup header quirk.
*/
void pci_add_dma_alias(struct pci_dev *dev, u8 devfn_from, unsigned nr_devfns)
void pci_add_dma_alias(struct pci_dev *dev, u8 devfn_from,
unsigned int nr_devfns)
{
int devfn_to;
nr_devfns = min(nr_devfns, (unsigned) MAX_NR_DEVFNS - devfn_from);
nr_devfns = min(nr_devfns, (unsigned int)MAX_NR_DEVFNS - devfn_from);
devfn_to = devfn_from + nr_devfns - 1;
if (!dev->dma_alias_mask)
......
......@@ -57,7 +57,7 @@ struct aer_stats {
* "as seen by this device". Note that this may mean that if an
* end point is causing problems, the AER counters may increment
* at its link partner (e.g. root port) because the errors will be
* "seen" by the link partner and not the the problematic end point
* "seen" by the link partner and not the problematic end point
* itself (which may report all counters as 0 as it never saw any
* problems).
*/
......
......@@ -2585,11 +2585,12 @@ struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn)
}
EXPORT_SYMBOL(pci_scan_single_device);
static unsigned next_fn(struct pci_bus *bus, struct pci_dev *dev, unsigned fn)
static unsigned int next_fn(struct pci_bus *bus, struct pci_dev *dev,
unsigned int fn)
{
int pos;
u16 cap = 0;
unsigned next_fn;
unsigned int next_fn;
if (pci_ari_enabled(bus)) {
if (!dev)
......@@ -2648,7 +2649,7 @@ static int only_one_child(struct pci_bus *bus)
*/
int pci_scan_slot(struct pci_bus *bus, int devfn)
{
unsigned fn, nr = 0;
unsigned int fn, nr = 0;
struct pci_dev *dev;
if (only_one_child(bus) && (devfn > 0))
......
......@@ -501,7 +501,7 @@ static void quirk_s3_64M(struct pci_dev *dev)
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_868, quirk_s3_64M);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_968, quirk_s3_64M);
static void quirk_io(struct pci_dev *dev, int pos, unsigned size,
static void quirk_io(struct pci_dev *dev, int pos, unsigned int size,
const char *name)
{
u32 region;
......@@ -552,7 +552,7 @@ static void quirk_cs5536_vsa(struct pci_dev *dev)
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa);
static void quirk_io_region(struct pci_dev *dev, int port,
unsigned size, int nr, const char *name)
unsigned int size, int nr, const char *name)
{
u16 region;
struct pci_bus_region bus_region;
......@@ -666,7 +666,7 @@ static void piix4_io_quirk(struct pci_dev *dev, const char *name, unsigned int p
base = devres & 0xffff;
size = 16;
for (;;) {
unsigned bit = size >> 1;
unsigned int bit = size >> 1;
if ((bit & mask) == bit)
break;
size = bit;
......@@ -692,7 +692,7 @@ static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int
mask = (devres & 0x3f) << 16;
size = 128 << 16;
for (;;) {
unsigned bit = size >> 1;
unsigned int bit = size >> 1;
if ((bit & mask) == bit)
break;
size = bit;
......@@ -806,7 +806,7 @@ static void ich6_lpc_acpi_gpio(struct pci_dev *dev)
"ICH6 GPIO");
}
static void ich6_lpc_generic_decode(struct pci_dev *dev, unsigned reg,
static void ich6_lpc_generic_decode(struct pci_dev *dev, unsigned int reg,
const char *name, int dynsize)
{
u32 val;
......@@ -850,7 +850,7 @@ static void quirk_ich6_lpc(struct pci_dev *dev)
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0, quirk_ich6_lpc);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, quirk_ich6_lpc);
static void ich7_lpc_generic_decode(struct pci_dev *dev, unsigned reg,
static void ich7_lpc_generic_decode(struct pci_dev *dev, unsigned int reg,
const char *name)
{
u32 val;
......@@ -2700,7 +2700,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
* then the device can't use INTx interrupts. Tegra's PCIe root ports don't
* generate MSI interrupts for PME and AER events instead only INTx interrupts
* are generated. Though Tegra's PCIe root ports can generate MSI interrupts
* for other events, since PCIe specificiation doesn't support using a mix of
* for other events, since PCIe specification doesn't support using a mix of
* INTx and MSI/MSI-X, it is required to disable MSI interrupts to avoid port
* service drivers registering their respective ISRs for MSIs.
*/
......
......@@ -85,7 +85,7 @@ static size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom,
{
void __iomem *image;
int last_image;
unsigned length;
unsigned int length;
image = rom;
do {
......
......@@ -1525,7 +1525,7 @@ static void pci_bridge_release_resources(struct pci_bus *bus,
{
struct pci_dev *dev = bus->self;
struct resource *r;
unsigned old_flags = 0;
unsigned int old_flags = 0;
struct resource *b_res;
int idx = 1;
......
......@@ -8,7 +8,6 @@
* David Miller (davem@redhat.com)
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/errno.h>
......@@ -28,12 +27,13 @@ void pci_assign_irq(struct pci_dev *dev)
return;
}
/* If this device is not on the primary bus, we need to figure out
which interrupt pin it will come in on. We know which slot it
will come in on 'cos that slot is where the bridge is. Each
time the interrupt line passes through a PCI-PCI bridge we must
apply the swizzle function. */
/*
* If this device is not on the primary bus, we need to figure out
* which interrupt pin it will come in on. We know which slot it
* will come in on because that slot is where the bridge is. Each
* time the interrupt line passes through a PCI-PCI bridge we must
* apply the swizzle function.
*/
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
/* Cope with illegal. */
if (pin > 4)
......@@ -45,8 +45,8 @@ void pci_assign_irq(struct pci_dev *dev)
slot = (*(hbrg->swizzle_irq))(dev, &pin);
/*
* If a swizzling function is not used map_irq must
* ignore slot
* If a swizzling function is not used, map_irq() must
* ignore slot.
*/
irq = (*(hbrg->map_irq))(dev, slot, pin);
if (irq == -1)
......@@ -56,7 +56,9 @@ void pci_assign_irq(struct pci_dev *dev)
pci_dbg(dev, "assign IRQ: got %d\n", dev->irq);
/* Always tell the device, so the driver knows what is
the real IRQ to use; the device does not use it. */
/*
* Always tell the device, so the driver knows what is the real IRQ
* to use; the device does not use it.
*/
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}
......@@ -1502,19 +1502,8 @@ int pci_set_vga_state(struct pci_dev *pdev, bool decode,
#define PCI_IRQ_ALL_TYPES \
(PCI_IRQ_LEGACY | PCI_IRQ_MSI | PCI_IRQ_MSIX)
/* kmem_cache style wrapper around pci_alloc_consistent() */
#include <linux/dmapool.h>
#define pci_pool dma_pool
#define pci_pool_create(name, pdev, size, align, allocation) \
dma_pool_create(name, &pdev->dev, size, align, allocation)
#define pci_pool_destroy(pool) dma_pool_destroy(pool)
#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
#define pci_pool_zalloc(pool, flags, handle) \
dma_pool_zalloc(pool, flags, handle)
#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
struct msix_entry {
u32 vector; /* Kernel uses to write allocated vector */
u16 entry; /* Driver uses to specify entry, OS writes */
......
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