Commit 7aa91e76 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Tomi Valkeinen

drm/omap: Change the types of struct omap_video_timings members

omap_video_timings struct have the same members as struct videomode, but
their types are different. As first step change the types of the
omap_video_timings struct members to match their counterpart in
struct videomode to catch any type cast related issues.
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent d34afb73
......@@ -1023,7 +1023,7 @@ static int dsicm_memory_read(struct omap_dss_device *dssdev,
goto err1;
}
size = min(w * h * 3,
size = min((u32)w * h * 3,
dssdev->panel.timings.hactive *
dssdev->panel.timings.vactive * 3);
......
......@@ -2870,7 +2870,8 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
int wbdelay;
wbdelay = min(mgr_timings->vfront_porch +
mgr_timings->vsync_len + mgr_timings->vback_porch, 255);
mgr_timings->vsync_len + mgr_timings->vback_porch,
(u32)255);
/* WBDELAYCOUNT */
REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0);
......@@ -3242,7 +3243,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
ht = timings->pixelclock / xtot;
vt = timings->pixelclock / xtot / ytot;
DSSDBG("pck %u\n", timings->pixelclock);
DSSDBG("pck %lu\n", timings->pixelclock);
DSSDBG("hsync_len %d hfp %d hbp %d vsw %d vfp %d vbp %d\n",
t.hsync_len, t.hfront_porch, t.hback_porch,
t.vsync_len, t.vfront_porch, t.vback_porch);
......
......@@ -351,7 +351,7 @@ static int dpi_set_mode(struct dpi_data *dpi)
pck = fck / lck_div / pck_div;
if (pck != t->pixelclock) {
DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
DSSWARN("Could not find exact pixel clock. Requested %lu Hz, got %lu Hz\n",
t->pixelclock, pck);
t->pixelclock = pck;
......
......@@ -301,23 +301,23 @@ struct omap_dss_dsi_config {
struct omap_video_timings {
/* Unit: pixels */
u16 hactive;
u32 hactive;
/* Unit: pixels */
u16 vactive;
u32 vactive;
/* Unit: Hz */
u32 pixelclock;
unsigned long pixelclock;
/* Unit: pixel clocks */
u16 hsync_len; /* Horizontal synchronization pulse width */
u32 hsync_len; /* Horizontal synchronization pulse width */
/* Unit: pixel clocks */
u16 hfront_porch; /* Horizontal front porch */
u32 hfront_porch; /* Horizontal front porch */
/* Unit: pixel clocks */
u16 hback_porch; /* Horizontal back porch */
u32 hback_porch; /* Horizontal back porch */
/* Unit: line clocks */
u16 vsync_len; /* Vertical synchronization pulse width */
u32 vsync_len; /* Vertical synchronization pulse width */
/* Unit: line clocks */
u16 vfront_porch; /* Vertical front porch */
u32 vfront_porch; /* Vertical front porch */
/* Unit: line clocks */
u16 vback_porch; /* Vertical back porch */
u32 vback_porch; /* Vertical back porch */
enum display_flags flags;
};
......
......@@ -162,7 +162,7 @@ static int sdi_display_enable(struct omap_dss_device *dssdev)
pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div;
if (pck != t->pixelclock) {
DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
DSSWARN("Could not find exact pixel clock. Requested %lu Hz, got %lu Hz\n",
t->pixelclock, pck);
t->pixelclock = pck;
......
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