Commit 7c165ccf authored by David Mosberger's avatar David Mosberger Committed by Linus Torvalds

[PATCH] agp support for i460 and zx1 cleanup

The patch below adds first round of AGP support for the Intel 460
chipset

This won't actually build at the moment, but I think you prefer to
merge things piecemeal, and this portion of the patch is almost
guaranteed to be safe (affects only ia64).
parent e4086edc
No related merge requests found
......@@ -127,6 +127,10 @@ CONFIG_AGP_I810
815 and 830m chipset boards for their on-board integrated graphics. This
is required to do any useful video modes with these boards.
CONFIG_AGP_I460
This option gives you AGP GART support for the Intel 460GX chipset
for IA64 processors.
CONFIG_AGP_VIA
This option gives you AGP support for the GLX component of the
XFree86 4.x on VIA MPV3/Apollo Pro chipsets.
......@@ -170,6 +174,10 @@ CONFIG_AGP_ALI
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N.
CONFIG_AGP_HP_ZX1
This option gives you AGP GART support for the HP ZX1 chipset
for IA64 processors.
CONFIG_I810_TCO
Hardware driver for the TCO timer built into the Intel i810 and i815
chipset family. The TCO (Total Cost of Ownership) timer is a
......
......@@ -220,6 +220,7 @@ if [ "$CONFIG_AGP" != "n" ]; then
bool ' ALI chipset support' CONFIG_AGP_ALI
bool ' Serverworks LE/HE support' CONFIG_AGP_SWORKS
if [ "$CONFIG_IA64" = "y" ]; then
bool ' Intel 460GX support' CONFIG_AGP_I460
bool ' HP ZX1 AGP support' CONFIG_AGP_HP_ZX1
fi
fi
......
......@@ -229,6 +229,9 @@ struct agp_bridge_data {
#ifndef PCI_DEVICE_ID_INTEL_82443GX_1
#define PCI_DEVICE_ID_INTEL_82443GX_1 0x71a1
#endif
#ifndef PCI_DEVICE_ID_INTEL_460GX
#define PCI_DEVICE_ID_INTEL_460GX 0x84ea
#endif
#ifndef PCI_DEVICE_ID_AMD_IRONGATE_0
#define PCI_DEVICE_ID_AMD_IRONGATE_0 0x7006
#endif
......@@ -274,6 +277,15 @@ struct agp_bridge_data {
#define INTEL_NBXCFG 0x50
#define INTEL_ERRSTS 0x91
/* Intel 460GX Registers */
#define INTEL_I460_APBASE 0x10
#define INTEL_I460_BAPBASE 0x98
#define INTEL_I460_GXBCTL 0xa0
#define INTEL_I460_AGPSIZ 0xa2
#define INTEL_I460_ATTBASE 0xfe200000
#define INTEL_I460_GATT_VALID (1UL << 24)
#define INTEL_I460_GATT_COHERENT (1UL << 25)
/* intel i830 registers */
#define I830_GMCH_CTRL 0x52
#define I830_GMCH_ENABLED 0x4
......
This diff is collapsed.
......@@ -276,6 +276,7 @@ drm_agp_head_t *DRM(agp_init)(void)
case INTEL_I845: head->chipset = "Intel i845"; break;
#endif
case INTEL_I850: head->chipset = "Intel i850"; break;
case INTEL_460GX: head->chipset = "Intel 460GX"; break;
case VIA_GENERIC: head->chipset = "VIA"; break;
case VIA_VP3: head->chipset = "VIA VP3"; break;
......
......@@ -53,6 +53,7 @@ enum chipset_type {
INTEL_I845,
INTEL_I850,
INTEL_I860,
INTEL_460GX,
VIA_GENERIC,
VIA_VP3,
VIA_MVP3,
......
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