Commit 7c196e5a authored by Markos Chandras's avatar Markos Chandras Committed by Sasha Levin

MIPS: Kconfig: Disable MIPS MT and SMP implementations for R6

[ Upstream commit 5676319c ]

R6 does not support the MIPS MT ASE and the CMP/SMP options so
restrict them in order to prevent users from selecting incompatible
SMP configuration for R6 cores. We also disable the CPS/SMP option
because its support hasn't been added to the CPS code yet.
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10637/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarSasha Levin <sasha.levin@oracle.com>
parent e652be4b
...@@ -2103,7 +2103,7 @@ config CPU_R4K_CACHE_TLB ...@@ -2103,7 +2103,7 @@ config CPU_R4K_CACHE_TLB
config MIPS_MT_SMP config MIPS_MT_SMP
bool "MIPS MT SMP support (1 TC on each available VPE)" bool "MIPS MT SMP support (1 TC on each available VPE)"
depends on SYS_SUPPORTS_MULTITHREADING depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI select CPU_MIPSR2_IRQ_EI
select SYNC_R4K select SYNC_R4K
...@@ -2204,7 +2204,7 @@ config MIPS_VPE_APSP_API_MT ...@@ -2204,7 +2204,7 @@ config MIPS_VPE_APSP_API_MT
config MIPS_CMP config MIPS_CMP
bool "MIPS CMP framework support (DEPRECATED)" bool "MIPS CMP framework support (DEPRECATED)"
depends on SYS_SUPPORTS_MIPS_CMP depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
select MIPS_GIC_IPI select MIPS_GIC_IPI
select SMP select SMP
select SYNC_R4K select SYNC_R4K
...@@ -2221,7 +2221,7 @@ config MIPS_CMP ...@@ -2221,7 +2221,7 @@ config MIPS_CMP
config MIPS_CPS config MIPS_CPS
bool "MIPS Coherent Processing System support" bool "MIPS Coherent Processing System support"
depends on SYS_SUPPORTS_MIPS_CPS depends on SYS_SUPPORTS_MIPS_CPS && !CPU_MIPSR6
select MIPS_CM select MIPS_CM
select MIPS_CPC select MIPS_CPC
select MIPS_CPS_PM if HOTPLUG_CPU select MIPS_CPS_PM if HOTPLUG_CPU
......
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