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Commit 7e848ae1 authored by Giuseppe CAVALLARO's avatar Giuseppe CAVALLARO Committed by David S. Miller
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stmmac: rename mac100 as dwmac100 and fix spare coding style 

This patch renames the mac100.[ch] as dwmac100.[ch]; this
looks more specific and appropriate for these chip series.
The patch also fixes some spare coding style issues.
Signed-off-by: default avatarGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent aec7ff27
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Inline Side-by-side
Showing with 95 additions and 90 deletions
drivers/net/stmmac/Makefile
View file @ 7e848ae1
obj-$(CONFIG_STMMAC_ETH) += stmmac.o obj-$(CONFIG_STMMAC_ETH) += stmmac.o
stmmac-$(CONFIG_STMMAC_TIMER) += stmmac_timer.o stmmac-$(CONFIG_STMMAC_TIMER) += stmmac_timer.o
stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o dwmac_lib.o \ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o dwmac_lib.o \
mac100.o gmac.o $(stmmac-y) dwmac100.o gmac.o $(stmmac-y)
drivers/net/stmmac/common.h
View file @ 7e848ae1
...@@ -225,7 +225,7 @@ struct mac_device_info { ...@@ -225,7 +225,7 @@ struct mac_device_info {
}; };
struct mac_device_info *gmac_setup(unsigned long addr); struct mac_device_info *gmac_setup(unsigned long addr);
struct mac_device_info *mac100_setup(unsigned long addr); struct mac_device_info *dwmac100_setup(unsigned long addr);
extern void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6], extern void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6],
unsigned int high, unsigned int low); unsigned int high, unsigned int low);
......
drivers/net/stmmac/mac100.c → drivers/net/stmmac/dwmac100.c
View file @ 7e848ae1
...@@ -32,18 +32,18 @@ ...@@ -32,18 +32,18 @@
#include <linux/phy.h> #include <linux/phy.h>
#include "common.h" #include "common.h"
#include "mac100.h" #include "dwmac100.h"
#include "dwmac_dma.h" #include "dwmac_dma.h"
#undef MAC100_DEBUG #undef DWMAC100_DEBUG
/*#define MAC100_DEBUG*/ /*#define DWMAC100_DEBUG*/
#ifdef MAC100_DEBUG #ifdef DWMAC100_DEBUG
#define DBG(fmt, args...) printk(fmt, ## args) #define DBG(fmt, args...) printk(fmt, ## args)
#else #else
#define DBG(fmt, args...) do { } while (0) #define DBG(fmt, args...) do { } while (0)
#endif #endif
static void mac100_core_init(unsigned long ioaddr) static void dwmac100_core_init(unsigned long ioaddr)
{ {
u32 value = readl(ioaddr + MAC_CONTROL); u32 value = readl(ioaddr + MAC_CONTROL);
...@@ -55,43 +55,43 @@ static void mac100_core_init(unsigned long ioaddr) ...@@ -55,43 +55,43 @@ static void mac100_core_init(unsigned long ioaddr)
return; return;
} }
static void mac100_dump_mac_regs(unsigned long ioaddr) static void dwmac100_dump_mac_regs(unsigned long ioaddr)
{ {
pr_info("\t----------------------------------------------\n" pr_info("\t----------------------------------------------\n"
"\t MAC100 CSR (base addr = 0x%8x)\n" "\t DWMAC 100 CSR (base addr = 0x%8x)\n"
"\t----------------------------------------------\n", "\t----------------------------------------------\n",
(unsigned int)ioaddr); (unsigned int)ioaddr);
pr_info("\tcontrol reg (offset 0x%x): 0x%08x\n", MAC_CONTROL, pr_info("\tcontrol reg (offset 0x%x): 0x%08x\n", MAC_CONTROL,
readl(ioaddr + MAC_CONTROL)); readl(ioaddr + MAC_CONTROL));
pr_info("\taddr HI (offset 0x%x): 0x%08x\n ", MAC_ADDR_HIGH, pr_info("\taddr HI (offset 0x%x): 0x%08x\n ", MAC_ADDR_HIGH,
readl(ioaddr + MAC_ADDR_HIGH)); readl(ioaddr + MAC_ADDR_HIGH));
pr_info("\taddr LO (offset 0x%x): 0x%08x\n", MAC_ADDR_LOW, pr_info("\taddr LO (offset 0x%x): 0x%08x\n", MAC_ADDR_LOW,
readl(ioaddr + MAC_ADDR_LOW)); readl(ioaddr + MAC_ADDR_LOW));
pr_info("\tmulticast hash HI (offset 0x%x): 0x%08x\n", pr_info("\tmulticast hash HI (offset 0x%x): 0x%08x\n",
MAC_HASH_HIGH, readl(ioaddr + MAC_HASH_HIGH)); MAC_HASH_HIGH, readl(ioaddr + MAC_HASH_HIGH));
pr_info("\tmulticast hash LO (offset 0x%x): 0x%08x\n", pr_info("\tmulticast hash LO (offset 0x%x): 0x%08x\n",
MAC_HASH_LOW, readl(ioaddr + MAC_HASH_LOW)); MAC_HASH_LOW, readl(ioaddr + MAC_HASH_LOW));
pr_info("\tflow control (offset 0x%x): 0x%08x\n", pr_info("\tflow control (offset 0x%x): 0x%08x\n",
MAC_FLOW_CTRL, readl(ioaddr + MAC_FLOW_CTRL)); MAC_FLOW_CTRL, readl(ioaddr + MAC_FLOW_CTRL));
pr_info("\tVLAN1 tag (offset 0x%x): 0x%08x\n", MAC_VLAN1, pr_info("\tVLAN1 tag (offset 0x%x): 0x%08x\n", MAC_VLAN1,
readl(ioaddr + MAC_VLAN1)); readl(ioaddr + MAC_VLAN1));
pr_info("\tVLAN2 tag (offset 0x%x): 0x%08x\n", MAC_VLAN2, pr_info("\tVLAN2 tag (offset 0x%x): 0x%08x\n", MAC_VLAN2,
readl(ioaddr + MAC_VLAN2)); readl(ioaddr + MAC_VLAN2));
pr_info("\n\tMAC management counter registers\n"); pr_info("\n\tMAC management counter registers\n");
pr_info("\t MMC crtl (offset 0x%x): 0x%08x\n", pr_info("\t MMC crtl (offset 0x%x): 0x%08x\n",
MMC_CONTROL, readl(ioaddr + MMC_CONTROL)); MMC_CONTROL, readl(ioaddr + MMC_CONTROL));
pr_info("\t MMC High Interrupt (offset 0x%x): 0x%08x\n", pr_info("\t MMC High Interrupt (offset 0x%x): 0x%08x\n",
MMC_HIGH_INTR, readl(ioaddr + MMC_HIGH_INTR)); MMC_HIGH_INTR, readl(ioaddr + MMC_HIGH_INTR));
pr_info("\t MMC Low Interrupt (offset 0x%x): 0x%08x\n", pr_info("\t MMC Low Interrupt (offset 0x%x): 0x%08x\n",
MMC_LOW_INTR, readl(ioaddr + MMC_LOW_INTR)); MMC_LOW_INTR, readl(ioaddr + MMC_LOW_INTR));
pr_info("\t MMC High Interrupt Mask (offset 0x%x): 0x%08x\n", pr_info("\t MMC High Interrupt Mask (offset 0x%x): 0x%08x\n",
MMC_HIGH_INTR_MASK, readl(ioaddr + MMC_HIGH_INTR_MASK)); MMC_HIGH_INTR_MASK, readl(ioaddr + MMC_HIGH_INTR_MASK));
pr_info("\t MMC Low Interrupt Mask (offset 0x%x): 0x%08x\n", pr_info("\t MMC Low Interrupt Mask (offset 0x%x): 0x%08x\n",
MMC_LOW_INTR_MASK, readl(ioaddr + MMC_LOW_INTR_MASK)); MMC_LOW_INTR_MASK, readl(ioaddr + MMC_LOW_INTR_MASK));
return; return;
} }
static int mac100_dma_init(unsigned long ioaddr, int pbl, u32 dma_tx, static int dwmac100_dma_init(unsigned long ioaddr, int pbl, u32 dma_tx,
u32 dma_rx) u32 dma_rx)
{ {
u32 value = readl(ioaddr + DMA_BUS_MODE); u32 value = readl(ioaddr + DMA_BUS_MODE);
...@@ -118,7 +118,7 @@ static int mac100_dma_init(unsigned long ioaddr, int pbl, u32 dma_tx, ...@@ -118,7 +118,7 @@ static int mac100_dma_init(unsigned long ioaddr, int pbl, u32 dma_tx,
/* Store and Forward capability is not used at all.. /* Store and Forward capability is not used at all..
* The transmit threshold can be programmed by * The transmit threshold can be programmed by
* setting the TTC bits in the DMA control register.*/ * setting the TTC bits in the DMA control register.*/
static void mac100_dma_operation_mode(unsigned long ioaddr, int txmode, static void dwmac100_dma_operation_mode(unsigned long ioaddr, int txmode,
int rxmode) int rxmode)
{ {
u32 csr6 = readl(ioaddr + DMA_CONTROL); u32 csr6 = readl(ioaddr + DMA_CONTROL);
...@@ -135,11 +135,11 @@ static void mac100_dma_operation_mode(unsigned long ioaddr, int txmode, ...@@ -135,11 +135,11 @@ static void mac100_dma_operation_mode(unsigned long ioaddr, int txmode,
return; return;
} }
static void mac100_dump_dma_regs(unsigned long ioaddr) static void dwmac100_dump_dma_regs(unsigned long ioaddr)
{ {
int i; int i;
DBG(KERN_DEBUG "MAC100 DMA CSR \n"); DBG(KERN_DEBUG "DWMAC 100 DMA CSR \n");
for (i = 0; i < 9; i++) for (i = 0; i < 9; i++)
pr_debug("\t CSR%d (offset 0x%x): 0x%08x\n", i, pr_debug("\t CSR%d (offset 0x%x): 0x%08x\n", i,
(DMA_BUS_MODE + i * 4), (DMA_BUS_MODE + i * 4),
...@@ -152,8 +152,9 @@ static void mac100_dump_dma_regs(unsigned long ioaddr) ...@@ -152,8 +152,9 @@ static void mac100_dump_dma_regs(unsigned long ioaddr)
} }
/* DMA controller has two counters to track the number of /* DMA controller has two counters to track the number of
the receive missed frames. */ * the receive missed frames. */
static void mac100_dma_diagnostic_fr(void *data, struct stmmac_extra_stats *x, static void dwmac100_dma_diagnostic_fr(void *data,
struct stmmac_extra_stats *x,
unsigned long ioaddr) unsigned long ioaddr)
{ {
struct net_device_stats *stats = (struct net_device_stats *)data; struct net_device_stats *stats = (struct net_device_stats *)data;
...@@ -182,7 +183,8 @@ static void mac100_dma_diagnostic_fr(void *data, struct stmmac_extra_stats *x, ...@@ -182,7 +183,8 @@ static void mac100_dma_diagnostic_fr(void *data, struct stmmac_extra_stats *x,
return; return;
} }
static int mac100_get_tx_frame_status(void *data, struct stmmac_extra_stats *x, static int dwmac100_get_tx_frame_status(void *data,
struct stmmac_extra_stats *x,
struct dma_desc *p, unsigned long ioaddr) struct dma_desc *p, unsigned long ioaddr)
{ {
int ret = 0; int ret = 0;
...@@ -218,7 +220,7 @@ static int mac100_get_tx_frame_status(void *data, struct stmmac_extra_stats *x, ...@@ -218,7 +220,7 @@ static int mac100_get_tx_frame_status(void *data, struct stmmac_extra_stats *x,
return ret; return ret;
} }
static int mac100_get_tx_len(struct dma_desc *p) static int dwmac100_get_tx_len(struct dma_desc *p)
{ {
return p->des01.tx.buffer1_size; return p->des01.tx.buffer1_size;
} }
...@@ -227,14 +229,15 @@ static int mac100_get_tx_len(struct dma_desc *p) ...@@ -227,14 +229,15 @@ static int mac100_get_tx_len(struct dma_desc *p)
* and, if required, updates the multicast statistics. * and, if required, updates the multicast statistics.
* In case of success, it returns csum_none becasue the device * In case of success, it returns csum_none becasue the device
* is not able to compute the csum in HW. */ * is not able to compute the csum in HW. */
static int mac100_get_rx_frame_status(void *data, struct stmmac_extra_stats *x, static int dwmac100_get_rx_frame_status(void *data,
struct stmmac_extra_stats *x,
struct dma_desc *p) struct dma_desc *p)
{ {
int ret = csum_none; int ret = csum_none;
struct net_device_stats *stats = (struct net_device_stats *)data; struct net_device_stats *stats = (struct net_device_stats *)data;
if (unlikely(p->des01.rx.last_descriptor == 0)) { if (unlikely(p->des01.rx.last_descriptor == 0)) {
pr_warning("mac100 Error: Oversized Ethernet " pr_warning("dwmac100 Error: Oversized Ethernet "
"frame spanned multiple buffers\n"); "frame spanned multiple buffers\n");
stats->rx_length_errors++; stats->rx_length_errors++;
return discard_frame; return discard_frame;
...@@ -277,24 +280,24 @@ static int mac100_get_rx_frame_status(void *data, struct stmmac_extra_stats *x, ...@@ -277,24 +280,24 @@ static int mac100_get_rx_frame_status(void *data, struct stmmac_extra_stats *x,
return ret; return ret;
} }
static void mac100_irq_status(unsigned long ioaddr) static void dwmac100_irq_status(unsigned long ioaddr)
{ {
return; return;
} }
static void mac100_set_umac_addr(unsigned long ioaddr, unsigned char *addr, static void dwmac100_set_umac_addr(unsigned long ioaddr, unsigned char *addr,
unsigned int reg_n) unsigned int reg_n)
{ {
stmmac_set_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW); stmmac_set_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW);
} }
static void mac100_get_umac_addr(unsigned long ioaddr, unsigned char *addr, static void dwmac100_get_umac_addr(unsigned long ioaddr, unsigned char *addr,
unsigned int reg_n) unsigned int reg_n)
{ {
stmmac_get_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW); stmmac_get_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW);
} }
static void mac100_set_filter(struct net_device *dev) static void dwmac100_set_filter(struct net_device *dev)
{ {
unsigned long ioaddr = dev->base_addr; unsigned long ioaddr = dev->base_addr;
u32 value = readl(ioaddr + MAC_CONTROL); u32 value = readl(ioaddr + MAC_CONTROL);
...@@ -320,8 +323,8 @@ static void mac100_set_filter(struct net_device *dev) ...@@ -320,8 +323,8 @@ static void mac100_set_filter(struct net_device *dev)
/* Perfect filter mode for physical address and Hash /* Perfect filter mode for physical address and Hash
filter for multicast */ filter for multicast */
value |= MAC_CONTROL_HP; value |= MAC_CONTROL_HP;
value &= ~(MAC_CONTROL_PM | MAC_CONTROL_PR | MAC_CONTROL_IF value &= ~(MAC_CONTROL_PM | MAC_CONTROL_PR |
| MAC_CONTROL_HO); MAC_CONTROL_IF | MAC_CONTROL_HO);
memset(mc_filter, 0, sizeof(mc_filter)); memset(mc_filter, 0, sizeof(mc_filter));
for (i = 0, mclist = dev->mc_list; for (i = 0, mclist = dev->mc_list;
...@@ -348,7 +351,7 @@ static void mac100_set_filter(struct net_device *dev) ...@@ -348,7 +351,7 @@ static void mac100_set_filter(struct net_device *dev)
return; return;
} }
static void mac100_flow_ctrl(unsigned long ioaddr, unsigned int duplex, static void dwmac100_flow_ctrl(unsigned long ioaddr, unsigned int duplex,
unsigned int fc, unsigned int pause_time) unsigned int fc, unsigned int pause_time)
{ {
unsigned int flow = MAC_FLOW_CTRL_ENABLE; unsigned int flow = MAC_FLOW_CTRL_ENABLE;
...@@ -360,13 +363,15 @@ static void mac100_flow_ctrl(unsigned long ioaddr, unsigned int duplex, ...@@ -360,13 +363,15 @@ static void mac100_flow_ctrl(unsigned long ioaddr, unsigned int duplex,
return; return;
} }
/* No PMT module supported in our SoC for the Ethernet Controller. */ /* No PMT module supported for this Ethernet Controller.
static void mac100_pmt(unsigned long ioaddr, unsigned long mode) * Tested on ST platforms only.
*/
static void dwmac100_pmt(unsigned long ioaddr, unsigned long mode)
{ {
return; return;
} }
static void mac100_init_rx_desc(struct dma_desc *p, unsigned int ring_size, static void dwmac100_init_rx_desc(struct dma_desc *p, unsigned int ring_size,
int disable_rx_ic) int disable_rx_ic)
{ {
int i; int i;
...@@ -382,7 +387,7 @@ static void mac100_init_rx_desc(struct dma_desc *p, unsigned int ring_size, ...@@ -382,7 +387,7 @@ static void mac100_init_rx_desc(struct dma_desc *p, unsigned int ring_size,
return; return;
} }
static void mac100_init_tx_desc(struct dma_desc *p, unsigned int ring_size) static void dwmac100_init_tx_desc(struct dma_desc *p, unsigned int ring_size)
{ {
int i; int i;
for (i = 0; i < ring_size; i++) { for (i = 0; i < ring_size; i++) {
...@@ -394,32 +399,32 @@ static void mac100_init_tx_desc(struct dma_desc *p, unsigned int ring_size) ...@@ -394,32 +399,32 @@ static void mac100_init_tx_desc(struct dma_desc *p, unsigned int ring_size)
return; return;
} }
static int mac100_get_tx_owner(struct dma_desc *p) static int dwmac100_get_tx_owner(struct dma_desc *p)
{ {
return p->des01.tx.own; return p->des01.tx.own;
} }
static int mac100_get_rx_owner(struct dma_desc *p) static int dwmac100_get_rx_owner(struct dma_desc *p)
{ {
return p->des01.rx.own; return p->des01.rx.own;
} }
static void mac100_set_tx_owner(struct dma_desc *p) static void dwmac100_set_tx_owner(struct dma_desc *p)
{ {
p->des01.tx.own = 1; p->des01.tx.own = 1;
} }
static void mac100_set_rx_owner(struct dma_desc *p) static void dwmac100_set_rx_owner(struct dma_desc *p)
{ {
p->des01.rx.own = 1; p->des01.rx.own = 1;
} }
static int mac100_get_tx_ls(struct dma_desc *p) static int dwmac100_get_tx_ls(struct dma_desc *p)
{ {
return p->des01.tx.last_segment; return p->des01.tx.last_segment;
} }
static void mac100_release_tx_desc(struct dma_desc *p) static void dwmac100_release_tx_desc(struct dma_desc *p)
{ {
int ter = p->des01.tx.end_ring; int ter = p->des01.tx.end_ring;
...@@ -445,45 +450,45 @@ static void mac100_release_tx_desc(struct dma_desc *p) ...@@ -445,45 +450,45 @@ static void mac100_release_tx_desc(struct dma_desc *p)
return; return;
} }
static void mac100_prepare_tx_desc(struct dma_desc *p, int is_fs, int len, static void dwmac100_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,
int csum_flag) int csum_flag)
{ {
p->des01.tx.first_segment = is_fs; p->des01.tx.first_segment = is_fs;
p->des01.tx.buffer1_size = len; p->des01.tx.buffer1_size = len;
} }
static void mac100_clear_tx_ic(struct dma_desc *p) static void dwmac100_clear_tx_ic(struct dma_desc *p)
{ {
p->des01.tx.interrupt = 0; p->des01.tx.interrupt = 0;
} }
static void mac100_close_tx_desc(struct dma_desc *p) static void dwmac100_close_tx_desc(struct dma_desc *p)
{ {
p->des01.tx.last_segment = 1; p->des01.tx.last_segment = 1;
p->des01.tx.interrupt = 1; p->des01.tx.interrupt = 1;
} }
static int mac100_get_rx_frame_len(struct dma_desc *p) static int dwmac100_get_rx_frame_len(struct dma_desc *p)
{ {
return p->des01.rx.frame_length; return p->des01.rx.frame_length;
} }
struct stmmac_ops mac100_ops = { struct stmmac_ops dwmac100_ops = {
.core_init = mac100_core_init, .core_init = dwmac100_core_init,
.dump_regs = mac100_dump_mac_regs, .dump_regs = dwmac100_dump_mac_regs,
.host_irq_status = mac100_irq_status, .host_irq_status = dwmac100_irq_status,
.set_filter = mac100_set_filter, .set_filter = dwmac100_set_filter,
.flow_ctrl = mac100_flow_ctrl, .flow_ctrl = dwmac100_flow_ctrl,
.pmt = mac100_pmt, .pmt = dwmac100_pmt,
.set_umac_addr = mac100_set_umac_addr, .set_umac_addr = dwmac100_set_umac_addr,
.get_umac_addr = mac100_get_umac_addr, .get_umac_addr = dwmac100_get_umac_addr,
}; };
struct stmmac_dma_ops mac100_dma_ops = { struct stmmac_dma_ops dwmac100_dma_ops = {
.init = mac100_dma_init, .init = dwmac100_dma_init,
.dump_regs = mac100_dump_dma_regs, .dump_regs = dwmac100_dump_dma_regs,
.dma_mode = mac100_dma_operation_mode, .dma_mode = dwmac100_dma_operation_mode,
.dma_diagnostic_fr = mac100_dma_diagnostic_fr, .dma_diagnostic_fr = dwmac100_dma_diagnostic_fr,
.enable_dma_transmission = dwmac_enable_dma_transmission, .enable_dma_transmission = dwmac_enable_dma_transmission,
.enable_dma_irq = dwmac_enable_dma_irq, .enable_dma_irq = dwmac_enable_dma_irq,
.disable_dma_irq = dwmac_disable_dma_irq, .disable_dma_irq = dwmac_disable_dma_irq,
...@@ -494,35 +499,35 @@ struct stmmac_dma_ops mac100_dma_ops = { ...@@ -494,35 +499,35 @@ struct stmmac_dma_ops mac100_dma_ops = {
.dma_interrupt = dwmac_dma_interrupt, .dma_interrupt = dwmac_dma_interrupt,
}; };
struct stmmac_desc_ops mac100_desc_ops = { struct stmmac_desc_ops dwmac100_desc_ops = {
.tx_status = mac100_get_tx_frame_status, .tx_status = dwmac100_get_tx_frame_status,
.rx_status = mac100_get_rx_frame_status, .rx_status = dwmac100_get_rx_frame_status,
.get_tx_len = mac100_get_tx_len, .get_tx_len = dwmac100_get_tx_len,
.init_rx_desc = mac100_init_rx_desc, .init_rx_desc = dwmac100_init_rx_desc,
.init_tx_desc = mac100_init_tx_desc, .init_tx_desc = dwmac100_init_tx_desc,
.get_tx_owner = mac100_get_tx_owner, .get_tx_owner = dwmac100_get_tx_owner,
.get_rx_owner = mac100_get_rx_owner, .get_rx_owner = dwmac100_get_rx_owner,
.release_tx_desc = mac100_release_tx_desc, .release_tx_desc = dwmac100_release_tx_desc,
.prepare_tx_desc = mac100_prepare_tx_desc, .prepare_tx_desc = dwmac100_prepare_tx_desc,
.clear_tx_ic = mac100_clear_tx_ic, .clear_tx_ic = dwmac100_clear_tx_ic,
.close_tx_desc = mac100_close_tx_desc, .close_tx_desc = dwmac100_close_tx_desc,
.get_tx_ls = mac100_get_tx_ls, .get_tx_ls = dwmac100_get_tx_ls,
.set_tx_owner = mac100_set_tx_owner, .set_tx_owner = dwmac100_set_tx_owner,
.set_rx_owner = mac100_set_rx_owner, .set_rx_owner = dwmac100_set_rx_owner,
.get_rx_frame_len = mac100_get_rx_frame_len, .get_rx_frame_len = dwmac100_get_rx_frame_len,
}; };
struct mac_device_info *mac100_setup(unsigned long ioaddr) struct mac_device_info *dwmac100_setup(unsigned long ioaddr)
{ {
struct mac_device_info *mac; struct mac_device_info *mac;
mac = kzalloc(sizeof(const struct mac_device_info), GFP_KERNEL); mac = kzalloc(sizeof(const struct mac_device_info), GFP_KERNEL);
pr_info("\tMAC 10/100\n"); pr_info("\tDWMAC100\n");
mac->mac = &mac100_ops; mac->mac = &dwmac100_ops;
mac->desc = &mac100_desc_ops; mac->desc = &dwmac100_desc_ops;
mac->dma = &mac100_dma_ops; mac->dma = &dwmac100_dma_ops;
mac->pmt = PMT_NOT_SUPPORTED; mac->pmt = PMT_NOT_SUPPORTED;
mac->link.port = MAC_CONTROL_PS; mac->link.port = MAC_CONTROL_PS;
......
drivers/net/stmmac/stmmac_main.c
View file @ 7e848ae1
...@@ -1585,7 +1585,7 @@ static int stmmac_mac_device_setup(struct net_device *dev) ...@@ -1585,7 +1585,7 @@ static int stmmac_mac_device_setup(struct net_device *dev)
if (priv->is_gmac) if (priv->is_gmac)
device = gmac_setup(ioaddr); device = gmac_setup(ioaddr);
else else
device = mac100_setup(ioaddr); device = dwmac100_setup(ioaddr);
if (!device) if (!device)
return -ENOMEM; return -ENOMEM;
......
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