Commit 7f5ea7bc authored by Jeff Wiedemeier's avatar Jeff Wiedemeier Committed by Richard Henderson

[PATCH] Fix marvel irq count computation.

Found a buglet in the marvel code -- doesn't change the number of IRQS
just the logic to get there.. This applies on top of the other marvel
code.

/jeff
parent ca370702
......@@ -29,13 +29,14 @@
#include "pci_impl.h"
#include "machvec_impl.h"
#if NR_IRQS < MARVEL_NR_IRQS
# error NR_IRQS < MARVEL_NR_IRQS !!!
#endif
/*
* Interrupt handling.
*/
#define IRQ_VEC_PE_SHIFT (10)
#define IRQ_VEC_IRQ_MASK ((1 << IRQ_VEC_PE_SHIFT) - 1)
static void
io7_device_interrupt(unsigned long vector, struct pt_regs * regs)
{
......@@ -60,8 +61,8 @@ io7_device_interrupt(unsigned long vector, struct pt_regs * regs)
irq = ((vector & 0xffff) - 0x800) >> 4;
irq += 16; /* offset for legacy */
irq &= IRQ_VEC_IRQ_MASK; /* not too many bits */
irq |= pid << IRQ_VEC_PE_SHIFT; /* merge the pid */
irq &= MARVEL_IRQ_VEC_IRQ_MASK; /* not too many bits */
irq |= pid << MARVEL_IRQ_VEC_PE_SHIFT; /* merge the pid */
handle_irq(irq, regs);
}
......@@ -73,7 +74,7 @@ io7_get_irq_ctl(unsigned int irq, struct io7 **pio7)
unsigned int pid;
struct io7 *io7;
pid = irq >> IRQ_VEC_PE_SHIFT;
pid = irq >> MARVEL_IRQ_VEC_PE_SHIFT;
if (!(io7 = marvel_find_io7(pid))) {
printk(KERN_ERR
......@@ -82,7 +83,7 @@ io7_get_irq_ctl(unsigned int irq, struct io7 **pio7)
return NULL;
}
irq &= IRQ_VEC_IRQ_MASK; /* isolate the vector */
irq &= MARVEL_IRQ_VEC_IRQ_MASK; /* isolate the vector */
irq -= 16; /* subtract legacy bias */
if (irq >= 0x180) {
......@@ -273,7 +274,7 @@ init_io7_irqs(struct io7 *io7,
struct hw_interrupt_type *lsi_ops,
struct hw_interrupt_type *msi_ops)
{
long base = (io7->pe << IRQ_VEC_PE_SHIFT) + 16;
long base = (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT) + 16;
long i;
printk("Initializing interrupts for IO7 at PE %u - base %lx\n",
......@@ -383,8 +384,8 @@ marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
msg_dat);
printk(" reporting on %d IRQ(s) from %d (0x%x)\n",
1 << ((msg_ctl & PCI_MSI_FLAGS_QSIZE) >> 4),
(irq + 16) | (io7->pe << IRQ_VEC_PE_SHIFT),
(irq + 16) | (io7->pe << IRQ_VEC_PE_SHIFT));
(irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT),
(irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT));
#endif
#if 0
......@@ -398,7 +399,7 @@ marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
}
irq += 16; /* offset for legacy */
irq |= io7->pe << IRQ_VEC_PE_SHIFT; /* merge the pid */
irq |= io7->pe << MARVEL_IRQ_VEC_PE_SHIFT; /* merge the pid */
return irq;
}
......
......@@ -17,9 +17,11 @@
#include <asm/compiler.h>
#define MARVEL_MAX_PIDS 128
#define MARVEL_MAX_LSIS_PER_PID 256
#define MARVEL_NR_IRQS (MARVEL_MAX_PIDS * MARVEL_MAX_LSIS_PER_PID)
#define MARVEL_MAX_PIDS 32 /* as long as we rely on 43-bit superpage */
#define MARVEL_IRQ_VEC_PE_SHIFT (10)
#define MARVEL_IRQ_VEC_IRQ_MASK ((1 << MARVEL_IRQ_VEC_PE_SHIFT) - 1)
#define MARVEL_NR_IRQS \
(16 + (MARVEL_MAX_PIDS * (1 << MARVEL_IRQ_VEC_PE_SHIFT)))
/*
* EV7 RBOX Registers
......
......@@ -16,7 +16,7 @@
many places throughout the kernel to size static arrays. That's ok,
we'll use alpha_mv.nr_irqs when we want the real thing. */
# define NR_IRQS (32768 + 16) /* enough for MARVEL with 128 PIDs */
# define NR_IRQS (32768 + 16) /* marvel - 32 pids*/
#elif defined(CONFIG_ALPHA_CABRIOLET) || \
defined(CONFIG_ALPHA_EB66P) || \
......@@ -57,7 +57,7 @@
# define NR_IRQS 2048 /* enuff for 8 QBBs */
#elif defined(CONFIG_ALPHA_MARVEL)
# define NR_IRQS (32768 + 16) /* enough for MARVEL with 128 PIDs */
# define NR_IRQS (32768 + 16) /* marvel - 32 pids*/
#else /* everyone else */
# define NR_IRQS 16
......
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