Commit 825216b8 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

ARM: dts: r8a7745: Add Inter Connect RAM

RZ/G1E has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB).
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 06278baa
......@@ -468,6 +468,21 @@ hscif2: serial@e62d0000 {
status = "disabled";
};
icram2: sram@e6300000 {
compatible = "mmio-sram";
reg = <0 0xe6300000 0 0x40000>;
};
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
};
icram1: sram@e63c0000 {
compatible = "mmio-sram";
reg = <0 0xe63c0000 0 0x1000>;
};
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7745";
reg = <0 0xee700000 0 0x400>;
......
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