Commit 82a40b54 authored by Lucas Stach's avatar Lucas Stach Committed by Shawn Guo

ARM: imx53: clk: add ARM clock

The ARM clock is a virtual clock feeding the ARM partition of
the SoC. It controls multiple other clocks to ensure the right
sequencing when cpufreq changes the CPU clock rate.
Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent e0fed513
...@@ -541,6 +541,11 @@ static void __init mx53_clocks_init(struct device_node *np) ...@@ -541,6 +541,11 @@ static void __init mx53_clocks_init(struct device_node *np)
clk[IMX5_CLK_CKO2] = imx_clk_gate2("cko2", "cko2_podf", MXC_CCM_CCOSR, 24); clk[IMX5_CLK_CKO2] = imx_clk_gate2("cko2", "cko2_podf", MXC_CCM_CCOSR, 24);
clk[IMX5_CLK_SPDIF_XTAL_SEL] = imx_clk_mux("spdif_xtal_sel", MXC_CCM_CSCMR1, 2, 2, clk[IMX5_CLK_SPDIF_XTAL_SEL] = imx_clk_mux("spdif_xtal_sel", MXC_CCM_CSCMR1, 2, 2,
mx53_spdif_xtal_sel, ARRAY_SIZE(mx53_spdif_xtal_sel)); mx53_spdif_xtal_sel, ARRAY_SIZE(mx53_spdif_xtal_sel));
clk[IMX5_CLK_ARM] = imx_clk_cpu("arm", "cpu_podf",
clk[IMX5_CLK_CPU_PODF],
clk[IMX5_CLK_CPU_PODF_SEL],
clk[IMX5_CLK_PLL1_SW],
clk[IMX5_CLK_STEP_SEL]);
imx_check_clocks(clk, ARRAY_SIZE(clk)); imx_check_clocks(clk, ARRAY_SIZE(clk));
......
...@@ -200,6 +200,7 @@ ...@@ -200,6 +200,7 @@
#define IMX5_CLK_SATA_REF 188 #define IMX5_CLK_SATA_REF 188
#define IMX5_CLK_STEP_SEL 189 #define IMX5_CLK_STEP_SEL 189
#define IMX5_CLK_CPU_PODF_SEL 190 #define IMX5_CLK_CPU_PODF_SEL 190
#define IMX5_CLK_END 191 #define IMX5_CLK_ARM 191
#define IMX5_CLK_END 192
#endif /* __DT_BINDINGS_CLOCK_IMX5_H */ #endif /* __DT_BINDINGS_CLOCK_IMX5_H */
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